EP1954104A1 - Interface for switch signals and digital signals with protective circuit - Google Patents

Abstract

The interface has a protective circuit (9) that shifts a signal processing circuit (5) in a condition, in which the signal processing circuit processes pushbutton or switch signals. The protective circuit shifts the signal processing circuit in a condition, in which the signal processing circuit processes digital signals (UBus), only when the protective circuit detects the absence of a main voltage signal at ports (k, k') during a preset time period. A terminal (KS) is provided for shifting to a control unit (mu C1) of an operating device (6). An independent claim is also included for a method for operating an interface for an operating device that controls an illuminant.

Description

The application relates to an interface that can be supplied as permissible signals on the one hand digital signals and on the other hand signals from a button or switch to the same input-side terminals. Both signal types are passed on the output side of the interface such that logical states can be passed to a control unit according to the logic state of the respective input-side signal. Since both types of signal are permitted, for example, the concern of a mains voltage level in the case of a push-button or switch control must lead neither to destruction nor to a shutdown of the interface.

Preferably, the interface also has a receiving branch for digital signals, which are transmitted to the input-side terminals of the interface to the connected bus lines.

The output signals of the interface can, as I said, be passed to a control unit, which is part of a building services equipment, for example. Such building technology devices may include, for example, actuators, sensors or operating devices for lighting. In this context, the invention relates in particular to the control of dimmable operating devices for lighting, in which a dimming can be triggered both by digital signals and by push-button or switch signals.

The invention has set itself the task of achieving a safe execution of such an interface with relatively few electronic components. This object is achieved by the features of the independent claims. The dependent claims further form the central idea of the invention in a particularly advantageous manner.

A first aspect of the invention relates to an interface for operating devices for lighting. In this case, the interface has a first connection, to which signals or digital signals originating either from a mains-powered pushbutton or switch can be applied, a signal processing circuit which processes the respectively applied signals and at a second connection for transmission to a control unit of a connected operating device provides for controlling the lighting means according to the respective applied signal. Furthermore, a protection circuit is provided which prevents damage to the interface at the input-side concern of a mains voltage signal. In the normal state, the protection circuit sets the signal processing circuit in a state in which it is configured for the preparation of push-button or switch signals. Only when the protection circuit does not detect a presence of a mains voltage signal at the first terminal for a predetermined period of time does it place the signal processing circuit in a state where the latter is configured to process digital signals. The predetermined period of time can be at least as long as a half-wave of the mains voltage.

The protection circuit, which may be an integrated circuit, for example, can immediately configure the interface for line voltage signals when it is on Concerns a mains voltage signal detected.

To configure the interface for mains voltage signals, a current limiting resistor may be connected, which is bypassed by the protective circuit for configuring the interface for digital signals by closing a circuit breaker. The switch is designed such that the shutdown of the mains voltage takes place in any case faster than the mains voltage can rise above a defined reference voltage level. In addition, the current limiting resistor for safety against a permanent concern of the mains voltage at the input terminals of the interface is so high-impedance dimensioned that it can absorb such a fault.

To the current limiting resistor, a constant current source may be connected in parallel, which is connected in series with the circuit breaker to generate a defined current flow at the input-side concern of the digital signals.

The circuit breaker may e.g. a transistor which is optionally designed together with the protection circuit as an integrated circuit.

The two optocouplers (2, 3) and the rectifier can be integrated into a circuit.

Thus, the entire interface circuit can be incorporated as an integrated circuit in a standard IC package, which is very space-saving. This is especially advantageous for a LED control gear.

The interface can furthermore have a reception branch for digital signals, which can be connected to the first connection, which can be supplied to the interface of the control unit of a connected operating device.

In addition, the interface may include a potential separation unit (e.g., an optocoupler) connected on the primary side to the first terminal and on the secondary side to the second terminal.

The protection circuit may further comprise a microcontroller whose function will be explained in detail below.

The invention also relates to a system having an interface of the type described above and an operating device for lighting or other controllable building services equipment. The operating device may be e.g. to act a ballast for gas discharge lamps or LEDs.

In addition, the invention also relates to a method for operating an interface for operating devices for controlling lighting means, wherein the interface has a first terminal, to which either from a supplied with mains power button or switch originating signals or digital signals can be applied, a signal processing circuit , which processes the respectively applied signals and provides them at a second connection for transmission to a control unit of a connected operating device for controlling the lighting means in accordance with the respective applied signal. In the normal state, the signal processing circuit is set in a state in which it is configured for the preparation of push-button or switch signals. Only if for a predetermined period of time at the first port no concern a Mains voltage signal is detected, the signal processing circuit is placed in a state in which it is configured for conditioning of digital signals.

Fig. 1a

zeigt eine erste schaltungstechnische Realisierung der erfindungsgemäßen Schnittstelle mit einem angeschlossenen Betriebsgerät für ein Leuchtmittel,

Fig. 1b

zeigt eine schematische Darstellung eines digitalen Zeitschaltglieds mit Anzugsverzögerung, das als integrierte Schutzschaltung zum Schalten eines zwischen zwei verschiedenen Betriebsarten umschaltenden steuerbaren Leistungsschalters Teil der in Fig. 1a dargestellten Schnittstelle sein kann,

Fig. 2a

zeigt eine zweite schaltungstechnische Realisierung der erfindungsgemäßen Schnittstelle mit einem angeschlossenen Betriebsgerät für ein Leuchtmittel,

Fig. 2b

zeigt den Schaltungsaufbau einer als Fensterkomparator realisierten Diskriminatorschaltung, die als integrierte Schutzschaltung zum Schalten eines zwischen zwei verschiedenen Betriebsarten umschaltenden steuerbaren Leistungsschalters Teil der in Fig. 1b dargestellten Schnittstelle sein kann,

Fig. 3a

zeigt eine dritte schaltungstechnische Realisierung der erfindungsgemäßen, zur Ansteuerung eines Betriebsgeräts für ein Leuchtmittel verwendeten Schnittstelle mit einem zum Umschalten zwischen einer getasteten Netzwechselspannung und einem digitalen Busspannungssignal dienenden steuerbaren Leistungsschalter, der über ein aus diskreten elektronischen Bauelementen gebildetes passives Verzögerungsglied erster Ordnung zeitverzögert angesteuert wird, und

Fig. 3b

zeigt eine funktionsäquivalente Schaltungsvariante der in Fig. 3a skizzierten Schnittstelle.

Further features, advantages and characteristics of the present invention will now be explained in more detail with reference to the accompanying drawings.

Fig. 1a

shows a first circuit realization of the interface according to the invention with a connected operating device for a light source,

Fig. 1b

shows a schematic representation of a digital timing element with a pickup delay, which serves as an integrated protection circuit for switching a switchable between two different modes controllable power switch part of in Fig. 1a represented interface can be

Fig. 2a

shows a second circuit realization of the interface according to the invention with a connected operating device for a lamp,

Fig. 2b

shows the circuit structure of a discriminator circuit realized as a window comparator, which is part of the in FIG. 1 as integrated protection circuit for switching a controllable power switch which switches over between two different operating modes Fig. 1b represented interface can be

Fig. 3a

shows a third circuit realization of the invention used to control an operating device for a light emitting interface with a serving for switching between a sampled AC line voltage and a digital bus voltage signal controllable power switch, which is controlled by a time delay formed from a discrete electronic components passive delay element of the first, and

Fig. 3b

shows a functionally equivalent circuit variant of in Fig. 3a sketched interface.

In Fig. 1a an interface is shown, at whose input side terminals KK 'a signal level can be applied. The applied signal can either be a digital _bus voltage signal U _bus with DC voltage levels in an amplitude range of up to 30 V, as is the case with the industry standards DALI and DSI. As a further signal type is also allowed provided that a signal from a button or switch is applied. In this case, this button or switch for providing an AC mains voltage U can be designed _network with a peak voltage level of 220 V, for example, so that potentially, depending on the push button or switch operation, this AC mains voltage U _network can be applied to the terminals KK '.

Usually, the information is coded on the button or switch signals continuous time over the duration of the respective preferably manual operation. Push-button or switch signals are therefore of significantly lower frequency compared to digital signals.

Digital signals are encoded via high-frequency switching operations.

The concern of this mains AC voltage U _network must neither lead to a shutdown nor to destruction or other impairment of the interface. Rather, the interface must be able to provide a corresponding logic signal at a transmitting-side output terminal K _S , regardless of the concerns of the two signal types, which can be forwarded to an operating device 6 used for driving a light-emitting means 7, for example. In the case of pushbutton signals, a control unit of the operating device 6 evaluates, for example, the number and / or the duration of the respective pushbutton actuation, and generates control signals for the connected light source 7 from this.

Structurally, the interface can be separate from the operating device 6 or else integrated in the same housing or even on the same board.

The interface does not require its own separate power supply. However, a voltage supply can be done via the input-side connections, since the quiescent level (logic "zero") is selected at the DALI standard not equal to 0 volts.

The transmission branch is in Fig. 1a denoted by the reference numeral 5. In the event that even digital signals according to the DALI industry standard to be utilized, a reception branch can also be provided (in Fig. 1a designated by the reference numeral 4). For this purpose, the interface is supplied with control signals at a connection K _E by the operating device 6, and the interface then outputs digital signals conditioned on the respective standard at the external connections KK '. As will be explained later, the present invention also protects this optional receiving branch against a mains voltage U _Netz applied to the terminals KK ' .

To the input terminals KK 'is followed by a filter and overvoltage protection circuit 1, which has a choke coil and a voltage-dependent resistor VDR. This filter and overvoltage protection circuit 1 is followed by a rectifier 8 in the form of a full bridge. When applying a mains voltage U _network to the input terminals KK 'the rectifier thus supplies a rectified AC voltage with a frequency of, for example, 100 Hz.

The output signal of the rectifier 8 is fed to an optocoupler 2, which serves for potential separation between the output-side terminal K _{S of} the transmitting branch and the external terminals KK 'of the interface. In series with the optocoupler 2, a constant current source KSQ is connected. If a digital signal with a maximum "high" level of, for example, 30 V is applied to the input-side terminals KK ', a current flows through the optocoupler 2, which is predetermined by the constant current source KSQ and which is selected sufficiently to be the threshold of the optocoupler 2, so that on the output side a corresponding logic signal is output at the terminal K _S.

If, however, a mains voltage signal would now be applied to the terminals KK 'in this state, damage to the primary side of the optocoupler 2 would have to be feared due to the high voltage levels. It is therefore provided that a high-impedance resistor R ₁ (protective or current limiting resistor) is connected as a basic setting in series with the primary branch of the optocoupler 2. This resistor R ₁ is dimensioned such that when a voltage (eg a mains voltage) at the terminals KK 'a current flows through the resistor R ₁ and thus on the optocoupler 2 primary side, on the one hand again exceeds the threshold of the optocoupler 2, on the other hand but small enough to avoid damage to the optocoupler 2 or other components of the interface.

The current limiting resistor R ₁ is selectively connected in series with the optocoupler 2 and can be selectively bridged by means of a circuit breaker T ₁ . The circuit breaker is thus a way to actively switch between a configuration "digital signal" (as a default) and "button" (if certain conditions are met) or vice versa, this active transfer is based on detection and evaluation of the input voltage level ,

The circuit breaker T ₁ may in particular be a high-voltage-resistant npn bipolar transistor or MOS field-effect transistor.

The circuit breaker T ₁ is part of a protection circuit 9, which has a control unit μC ₁ . The control unit μC ₁ actively activates the circuit breaker T ₁ by outputting a switching signal, for example the gate voltage U _{G 1 of} a MOSFET. The control unit μC1 can be an integrated circuit, such as For example, be a microcontroller. Together with this control unit and the circuit breaker T ₁ can be integrated as a transistor with. The protection circuit can thus be constructed discretely and / or software-controlled.

The two optocouplers 2, 3 and the rectifier can be integrated into a circuit.

Thus, the entire interface circuit can be incorporated as an integrated circuit in a standard IC package, which is very space-saving. This is especially advantageous for a LED control gear.

The control unit .mu.C ₁ is also supplied with the signal applied to the external terminals KK 'of the interface. Thus, the control unit μC _{1 of} the protection circuit 9 detects whether a potentially dangerous mains voltage signal is present at the terminals KK '.

According to the invention, provision is now made for the switch T _{1 to be} open as the basic setting, ie for the high-resistance resistor R _{1 to be connected} in series with the primary branch of the opto-coupler 2. The control unit μC ₁ closes the switch T ₁ only if it has been determined during a predetermined period of time that no mains voltage signal is present at the terminals KK '. This time period is chosen so that it is at least the period of half a period of the mains voltage.

The bridging of the current limiting resistor R ₁ takes place only after a time delay, when certainly no mains voltage is applied. If, on the other hand, when the switch T _{1 is} closed, the presence of a mains voltage is detected, the switch T _{1 is} again opened immediately to the current limiting resistor R ₁ again in series with the optocoupler 2 to switch.

Moreover, this protective circuit also protects the receiving branch from being activated while a mains voltage signal is applied by the said mechanism.

Fig. 1b shows an embodiment for the control unit μC. ₁ Among other things, the control unit μC ₁ is supplied with an analog signal U _in on the input side, which is derived from the digital _bus voltage U _Bus applied to the input-side terminals of the interface or from the rectified and smoothed mains alternating voltage U _Netz . This signal is delayed by, for example, 5 ms by means of a delay unit, and the delayed signal is then supplied to the set input S of an RS flip-flop FF. The reset input R1 of this RS flip-flop FF, the instantaneous signal U _{in is} supplied.

More specifically, the undelayed signal U _in the non-inverting input of a comparator KP is supplied to the inverting input of a reference voltage U _{So is applied} with a DC level of, for example 22 V, that is, a level which is slightly lower than the maximum allowable high level of digital bus signal.

Since the reset input R1 of the RS flip-flop FF is a dominant reset input, the reset signal at the input R1 of the bistable flip-flop has priority, the output signal of the RS flip-flop FF is set to "logical zero" without a time delay. so that according to the switch T ₁ is opened again.

In Fig. 2a a second circuit implementation of the interface according to the invention is shown, which differs from the in Fig. 1a sketched embodiment differs only in that the switching between the two modes of protection T _{1 is} controlled by a discriminator circuit realized as a window comparator value-discriminated, which is the input side via the current limiting resistor R ₁ with the analog signal U _in acted upon. The digital output signal of the discriminator circuit forms the control signal U _{G1 of} the circuit breaker T ₁ . As in Fig. 2a ₁ , the discriminator circuit integrated in the transmitting branch 5 can be realized, for example, in connection with the controllable power switch T ₁ or individually as an application-specific, monolithically integrated circuit component.

The discriminator is then fed via a required for the operation of the supply voltage U _v, in which, as in the present invention provided, may for example, be the signal dependent on the mains alternating voltage U _mains or the digital bus voltage U _bus signal U _in. Thus, no additional power source is needed to power the discriminator circuit.

In addition, it can optionally be provided in this embodiment that the signal U _in acted upon input K _i 'of the discriminator circuit is connected to the live output line of an implemented as an RC element passive low-pass filter first order, consisting of the high-impedance input resistor R ₁ and a formed between K _i 'and the ground node of the interface filter capacitor C is formed and used for smoothing the guided to the input K _i ' of the discriminator circuit and rectified mains AC voltage U _network .

In Fig. 2b is the circuit construction of the present invention realized as a window comparator discriminator circuit for the embodiment of in Fig. 2a illustrated interface shown. The discriminator circuit, which according to the invention is constructed from two comparator stages KP ₁ and KP ₂ connected to the signal inputs of an AND gate G, ensures that the control signal input K _{2 of} the circuit breaker T _{1 is} connected to the amplitude values via a digital control signal U _G1 the derived from the AC mains voltage U _network or derived from the digital _bus voltage U _bus analog signal U _in depends, is discriminated value driven. Specifically, an output side connected to a first signal input of the AND gate G first comparator KP _{1 of} the window comparator, which is acted upon by an inverting input with the dependent of the AC mains voltage U _network analog signal U _in, serves to compare the amplitude values of this analog signal with the voltage potential a voltage applied to a non-inverting input of this first comparator KP _1, predeterminable reference voltage U _as with a DC level of, for example 24 V. According to the invention this first comparator stage supplied KP ₁ via U _in the energy required for operation.

An output side connected to a second signal input of the AND gate G second comparator stage KP _{2 of} the window comparator, which is acted upon by a non-inverting input with the dependent of the AC mains voltage U _network analog signal U _in , is used to compare the amplitude values of this analog signal with the voltage potential a predefinable reference voltage U _Su applied to an inverting input of this second comparator stage KP ₂ with a DC voltage level of, for example, 5 V. According to the invention, the second comparator stage KP ₂ as well as the first comparator stage KP ₁ are supplied via U _in with the energy required for operation. A reverse polarity zener diode D _z "having a suitably defined breakdown voltage of, for example, 30 V, connected between the inverting input of the first comparator stage KP ₁ connected to the non-inverting input of the second comparator stage KP ₂ and the ground node of the interface circuit as an overvoltage protection.

Are the amplitude values of the above-mentioned analog signal U _in below the voltage potential of the reference voltage U _way or above the breakdown voltage of D _Z "', ₁ the output voltage U _{out 1} of the first comparator CP, the voltage potential of its positive saturation voltage + U _sat at which (positive logic provided) corresponds to a "high" level of U _{out 1.} If the amplitude values of the aforementioned analog signal U _in lie in a value range between the voltage potential of the reference voltage U _so and the breakdown voltage of D _Z "', the output voltage U _{out 1 of} the first decreases Comparator stage KP _1, the voltage potential of their negative saturation voltage - U _sat , which (assuming positive logic) corresponds to a "low" level of U _{out 1} .

In the case of the second comparator stage KP ₂ , the conditions are different, since the roles of the two signals present at the non-inverting or inverting input of this comparator stage, as described above, are interchanged with those of the first comparator stage KP ₁ . Are the amplitude values of the above-mentioned analog signal U _in within a range of values between the voltage potential of the reference voltage U _Su and the breakdown voltage of D _Z "', takes the output voltage U _{out 2 of} the second comparator stage KP _2, the voltage potential of its positive saturation voltage + U _Sat to which (assuming positive logic) corresponds to a "high" level of U _{out 2} . Are the amplitude values of the above-mentioned analog signal U _in the other hand, below the voltage potential of the reference voltage U _Su or above the breakdown voltage of D _Z ''', the output voltage U ₂ takes _{out 2} of the second comparator stage KP, the voltage potential of its negative saturation voltage - U _satellite, which ( again assuming positive logic) corresponds to a "low" level of U _{out 2} .

Since only a binary signal with a "high" level is provided via the output of the AND gate G, if both input signals of this AND gate, which are the two digital output voltages U _{out 1} and U _{out 2 of} the comparator stages KP ₁ and KP ₂ are "high" level lead, the circuit breaker T ₁ is in a switching operation only when the amplitude values of the analog signal U _in the amount limited by the two reference voltages U _Su and U _{So of} the window comparator Fall _within range and thus the inequality chain U _Su < U _in < U _So satisfied. How out Fig. 2b can be seen, is connected between the output of the AND gate G and the control signal input K _{2 of} the circuit breaker T _{1 is} a monostable multivibrator SR whose output signal A ', which is the digital control signal U _{G 1 of} the circuit breaker T ₁ , when a binary signal E 'with a "high" level at its input after a certain switching delay of a few nanoseconds duration from a stable "low" state (idle state) for a residence time Δt' of a few milliseconds into an unstable "high" State before returning to its idle state by itself. Here, a change of the input signal E 'during the dwell time .DELTA.t' has no effect on the switching state the monostable multivibrator SR. The use of this univibrator ensures that even if the condition prescribed by the above inequality chain U _su < U _in < U for switching on the circuit breaker T _1, a short-circuiting of the mains voltage-carrying line via the transmitting branch 5 of the interface _according to the invention is only possible for one by the residence time .DELTA.t 'of the monostable multivibrator SR predetermined time persists.

After returning the output signal A 'in the idle state of the univibrator SR, the circuit breaker T _{1 is} again caused to switch to the blocking state. Thus, the interface operates in compliance with the condition for only one of the residence time Δ t 'of the monostable multivibrator SR predetermined time in a DALI / DSI operating mode in which the supplied via the line-voltage-carrying line mains alternating voltage U _{Net z} is shorted. In order to cause the controllable power switch T ₁ to switch to a safe operating mode with respect to the line voltage stability of the interface, it is only necessary to wait until the un-vibrator SR returns to its stable state.

If the condition specified by the above inequality chain is not satisfied, a binary signal having a "low" level is provided at the output of the AND gate G, which is passed on unchanged to the output of the monostable multivibrator SR, which results in the circuit breaker T ₁ blocks in this case and the mains voltage-carrying line is not short-circuited via the transmitting branch 5 of the interface according to the invention. This leads to the interface remaining in an operating mode in which the mains alternating voltage U _{Nets present} at its mains voltage input KK 'can not be short-circuited via T ₁ .

In this mode of operation, current flow is possible only via the high-impedance input resistor R _{1 of} the protective circuit 9, the primary branch of the transmitting-side opto-coupler 2 and via the secondary branch of the receiving-side optocoupler 3.

In Fig. 3a a third circuit realization of the interface according to the invention is shown, which differs from the in Fig. 1a and Fig. 2a sketched embodiments differs in that the switching between the two modes of protection circuit breaker T _{1 is} controlled by a built in the transmission branch 5 of the interface, constructed of discrete electronic components passive delay element with a delay, which acts on the input side with the AC mains voltage U _network or the digital _bus voltage U _bus becomes. The passive delay element may include, for example, a first-order passive low-pass filter connected on the output side to the control signal input K _{2 of} the circuit breaker T ₁ and the ground node of the interface, constituted by an RC element consisting of a gate capacitance C _{G 1} connected to the aforementioned ground node MOSFET realized circuit breaker T ₁ and one between the control signal input of T ₁ and the connection node between the constant current source KSQ and the primary branch of the transmitting side optocoupler 2 connected resistor R ₂ (discharge resistor) is formed. The product of the gate capacitance C _{G 1} and the discharge resistor R _{2 of} the MOSFET T ₁ forms a measure of the achievable switch-on delay time of its control signal U _{G. 1}

This time constant τ can be dimensioned by a suitable dimensioning of the ohmic and capacitive components of the RC element so that the voltage potential at a via a current limiting resistor R ₁ to the primary branch of the transmitting side optocoupler 2 and a in Reverse poled diode D to the control signal input K ₂ of the circuit breaker T ₁ connected nodes K ₁ in the stop operation of the circuit breaker _T1 faster the switching voltage of T _{1 is} reached when the voltage applied to its control signal input K ₂ voltage potential U _{G. 1}

The effective resistance component of the total impedance of the RC element can, according to the invention, however, also be formed from the equivalent resistance of the parallel connection of the two ohmic resistors R ₁ and R ₂ which are connected at one end respectively to the primary branch of the transmitting-side opto-coupler 2 and at another end to the aforementioned one Node K ₁ or to the control signal input K _{2 of} the circuit breaker T _{1 are} connected. The equivalent resistance value of the parallel circuit can be dimensioned by a suitable dimensioning of the two resistors R ₁ and R ₂ so that in the blocking operation of the circuit breaker, depending on the rms value of the rectified AC mains voltage U _network , enough power to operate the transmitting side optocoupler 2 by the transmitting branch 5 flows.

The control signal input K _{2 of} the circuit breaker T ₁ is connected in this embodiment via the reverse polarity reversed protective diode D with another constant current source KSQ ', which keeps the current flowing through the parallel connection of the two resistors R ₁ and R ₂ current at an approximately constant level. A cathodically connected via a collector resistor R _{C 3 of} a bipolar transistor T _3b required to operate this constant current source KSQ to the node K ₁ and the anode side connected to the ground node of the interface, reverse biased Zener diode D _Z 'with a suitably dimensioned breakdown voltage serves as overvoltage protection for the control signal input of T ₁ .

Since the two constant current sources KSQ and KSQ 'in the sketched embodiment are the same structure, they will be described together below, with the non-parenthesized reference numerals refer to the electronic components of the constant current source KSQ and the reference numbers in parentheses on the electronic components of the same Constant current source KSQ '. As in Fig. 3a 2, the two constant current sources KSQ and KSQ 'may comprise two mutually interacting bipolar transistors T _2a and T _2b (or T _3a and T _3b ) which are connected via their base electrodes to the collector or to the emitter of the respective other bipolar transistor and an ohmic resistor R _{E 2} ( R _{E 3} ) (emitter resistor) connected between the emitter electrodes of the respective bipolar transistors T _2a and T _2b (or T _3a and T _3b ).

With an increase in the current flowing through T _2b (T _3b ) collector current I _{C 2b} ( I _{C 3b} ), which is a by a voltage drop of the amplitude sampled and rectified mains AC voltage U _net or a voltage drop of the digital _bus voltage U _bus at a Collector resistance R _{C 2} ( R _{C 3} ) of the bipolar transistor T _2b (T _3b ) is caused, the emitter is raised in its voltage relative to the base of T _2b (T _3b ), which causes the base-emitter voltage U _{BE 2b} ( U _{BE 3b} ) of transistor T _2b (T _3b ) decreases. This controls the bipolar transistor T _2b (T _3b ) in a high-impedance state and makes the collector current I _{c 2b} ( I _{c 3b} ) drop immediately. With a decrease of the collector current I _{c2 b} (I _{c 3b)} on the other hand the base-emitter voltage U _{BE 2b} (U _{BE 3b)} is greater, whereby T _2b (T _3b) is controlled in a low impedance state and the collector current I _{c 2b} ( I _{c 3b} ) increases again. The constant current source KSQ holds in this way the current through the primary branch of the transmitting side optocoupler 2 current flowing at an approximately constant level, while the constant current source KSQ ', as already mentioned, serves to keep the current flowing through the parallel connection of the two ohmic resistors R ₁ and R ₂ current at an approximately constant level.

In Fig. 3b is a functionally equivalent circuit variant of in Fig. 3a illustrated interface, in which the discharge resistor R _{2 of} the RC element is not, as in Fig. 3a shown, as well as the current limiting resistor R _{1 is} connected to the connection node between the constant current source KSQ and the primary branch of the transmitting side optocoupler 2, but directly to the live output line of the full-wave rectifier. 8

Claims (17)

Interface for operating devices (6) for controlling lighting means (7), the interface comprising: a first connection (K-K ') to which signals or digital signals ( U _bus ) originating either from a switch or switch supplied with mains voltage ( U _network ) can be applied, - A signal processing circuit (5), which processes the respective applied signals ( U _network or U _bus ) and to - Provides a second terminal (K _S ) for transmission to a control unit of a connected operating device (6) for controlling the lighting means (7) corresponding to the respectively applied signal ( U _network or U _bus ), and a protection circuit (9) which, in the normal state, sets the signal processing circuit (5) in a state in which it is configured for processing pushbutton or switch signals ( U _{Net z} ) and only sets the signal processing circuit (5) in, it is configured to condition digital signals ( U _bus ) when the protection circuit (9) does not detect a presence of a mains voltage signal ( U _network ) at the first terminal (K-K ') for a predetermined period of time. Interface according to claim 1,
in which the protection circuit (9) immediately configures the interface for mains voltage signals ( U _network ) when it detects a concern of a mains voltage signal ( U _network ). Interface according to one of the preceding claims, in which the protection circuit (9) is an integrated circuit. Interface according to one of the preceding claims, in which for the configuration of the interface for mains voltage signals ( U _network ) a current limiting resistor ( R ₁ ) is connected, which is closed by the protective circuit (9) for the configuration of the interface for digital signals ( U _bus ) by closing a circuit breaker ( T ₁ ) is bridged. Interface according to claim 4,
wherein a constant current source (KSQ) is connected in parallel with the current limiting resistor ( R ₁ ) and in series with the circuit breaker (T ₁ ). Interface according to claim 4 or 5,
in the circuit breaker (T ₁ ) is a transistor which is designed together with the protection circuit (9) as an integrated circuit. An interface as claimed in any one of the preceding claims, wherein the predetermined period of time is at least as long as a half wave of the mains voltage. Interface according to one of the preceding claims, further comprising a with the first terminal (K-K ') connectable receiving branch (4) for digital signals which are the interface of the control unit of a connected operating device (6) can be supplied. Interface according to claim 8,
in which the interface releases the receiving branch (4) only if the protective circuit (9) at the first terminal (K-K ') does not register a concern of a mains voltage ( U _network ) during a predetermined period of time. Interface according to one of the preceding claims, which has a potential separation unit (2) which is connected on the primary side to the first terminal (K-K ') and on the secondary side to the second terminal (K _S ). Interface according to one of the preceding claims, in which the protective circuit (9) has a microcontroller (μC ₁ or μC ₂ ). Interface according to one of the preceding claims, which is designed as an integrated circuit. System comprising an interface according to one of the preceding claims and a control device (6) for lighting means (7). System according to claim 13,
in which the operating device (6) is a ballast for gas discharge lamps or LEDs. Interface for operating devices (6) for controlling light sources (7),
wherein the interface comprises: a transmitting branch (5) to which signals or digital signals ( U B _us ), which can be supplied optionally by a pushbutton or switch supplied with mains voltage ( U _mains ) , can be received, a signal processing circuit (5) which processes the respectively applied signals ( U _network or U _bus ) , - A reception branch (4) for transmitting digital signals and - A protection circuit (9), which releases the receiving branch (4) only if the protective circuit (9) for a predetermined period of time at the first terminal (K-K ') no concern of a mains voltage signal (U _network ) detected. Interface for operating devices (6) for controlling light sources (7),
wherein the interface comprises: a first connection (K-K ') to which signals or digital signals ( U _bus ) originating either from a switch or switch supplied with mains voltage ( U _network ) can be applied, - A signal processing circuit (5), which processes the respective applied signals ( U _network or U _bus ) and to - Provides a second terminal (K _s ) for transmission to a control unit of a connected operating device (6) for controlling the lighting means (7) in accordance with the respectively applied signal, and a protection circuit (9) which actively transfers the interface from a configuration "digital signal" ( U _bus ) to a configuration "probe signal" ( U _network ) or vice versa. Method for operating an interface for operating devices (6) for controlling lighting means (7),
wherein the interface comprises: a first connection (K-K ') to which signals or digital signals ( U _bus ) originating either from a switch or switch supplied with mains voltage ( U _Net ) can be applied, - A signal processing circuit (5), which processes the respective applied signals ( U _network or U _bus ) and to - Provides a second terminal (K _S ) for transmission to a control unit of a connected operating device (6) for controlling the lighting means (7) in accordance with the respectively applied signal, wherein in the normal state, the signal processing circuit (5) is put into a state in which they for processing of switch or switch signals ( U _network ) is configured, and the signal processing circuit (5) is only in a state in which it is configured for the preparation of digital signals ( U _bus ), when at the first port ( U ) for a predetermined period of time K-K ') no concern of a mains voltage signal ( U _network ) is detected.

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