EP1946625A1 - Electronic circuit arrangement and method for producing an electronic circuit arrangement - Google Patents
Electronic circuit arrangement and method for producing an electronic circuit arrangementInfo
- Publication number
- EP1946625A1 EP1946625A1 EP06807009A EP06807009A EP1946625A1 EP 1946625 A1 EP1946625 A1 EP 1946625A1 EP 06807009 A EP06807009 A EP 06807009A EP 06807009 A EP06807009 A EP 06807009A EP 1946625 A1 EP1946625 A1 EP 1946625A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- circuit
- circuit carrier
- heat sink
- carrier
- circuit arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/021—Components thermally connected to metal substrates or heat-sinks by insert mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/142—Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/1056—Metal over component, i.e. metal plate over component mounted on or embedded in PCB
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/049—Wire bonding
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
- H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
Definitions
- the present invention relates to an electronic scarf ⁇ tion arrangement and a method for producing a e- lektronischen circuit arrangement, in particular for use in the field of automotive electronics.
- Previous approaches to improve the heat dissipation are mainly to improve the thermal connection of the electronic component to the environment, for example by providing heat dissipation with high thermal conductivity within a circuit substrate (eg. "Horizontal heat spreading") and / or by attaching a specially provided for this heat sink in good thermal contact with the device.
- a circuit substrate eg. "Horizontal heat spreading”
- first circuit carrier coupled to a top surface of a heat sink surface resting thermally.
- the heat sink, the z. B. can also form part of a housing ei ⁇ ner concerned electronics unit, is preferably ⁇ from a material with high thermal conductivity gebil ⁇ det (eg., As a metal plate).
- gebil ⁇ det eg., As a metal plate.
- the heat sink has a flat O- berseite.
- the first scarf ⁇ tion carrier is plate-shaped with a flat bottom, so can the thermal coupling in simp ⁇ cher way z. B. accomplish by interposition of a heat conducting foil or a thermally conductive adhesive.
- On the side facing away from the heat sink side of the first circuit substrate can be provided in a conventional manner, an assembly with electronic components of the circuit, which are electrically connected to each other in accordance with the electrical layout by interconnects on and / or in the circuit carrier.
- the second circuit carrier is plate-shaped, for example formed as a substantially rectangular plate.
- the arrangement provided for this purpose for example, a bonding wire ⁇ arrangement and / or a (z. B. glued) comprise flex circuit. It is also favorable in this connection if the upper-side contact points ("pads") of the first circuit carrier and of the second circuit carrier to be electrically connected to one another or connected to one another are approximately at the same height. If both the first and the second circuit carrier each formed as a flat plate, this means that the thickness of the second
- Circuit carrier corresponds approximately to the corresponding Bauele ⁇ mentdicke reduced plate thickness of the first Heidelbergungsträ ⁇ gers. In principle it is, however, not been Schlos ⁇ sen that the second circuit carrier is thicker or thinner and thus upward out of the recess stands (only partially ⁇ is as received in the recess) and is lowered into the recess. A then resulting height difference can be easily z. B. be bridged by bonding wires.
- the recess provided for receiving the second circuit carrier may, in principle, also be provided at the edge of the first circuit carrier, which may be advantageous in certain cases. With regard to a stable arrangement of the second circuit carrier, however, it is generally preferred if the recess is provided in a central region of the first circuit substrate. In the case ⁇ sem can be a mechanically stable storage of the Second circuit carrier often already ensure by a ring ⁇ running around and / or the second circuit carrier covering electrical connection arrangement, or further improve.
- the electronic component arranged between the second circuit carrier and the heat sink is an unhoused chip (microelectronic component, in particular integrated circuit arrangement). This results in a certain space savings and dar ⁇ beyond a further advantage in terms of the dissipation of heat, which can be dissipated directly in this case (not a housing) to the heat sink.
- a particularly good thermal coupling between the Bauele ⁇ element and the heat sink results, for example when the bottom of the device with the top of the heat sink is lying flat ⁇ thermally coupled. It should not be excluded that z.
- a thin heat-conducting adhesive layer is interposed.
- the electronic component arranged between the second circuit carrier and the heat sink is ground on its underside.
- Such loops can provide len a whole series of ADVANTAGES ⁇ , particularly when the underside of the component interacts with the top of the heat sink in contact.
- To allow the heat dissipating path from the electrically ak ⁇ tive portions of the device to the heat sink (or an intermediate layer) may first be reduced to and / or the heat transfer resistance between the component and the top of the heat sink ⁇ be reduced.
- the height of the building ⁇ elements can be brought to a desired level, be it for Ensuring a predetermined height of the composite of the second circuit carrier and component or for adapting the component thickness to the thickness of one or more further components which are arranged between the same second circuit carrier and the heat sink.
- the electronic component arranged between the second circuit carrier and the heat sink is coupled to the upper side of the heat sink via a thermally conductive filling material, for example a heat-conductive adhesive layer.
- a thermally conductive filling material for example a heat-conductive adhesive layer.
- the same Golfma ⁇ TERIAL or another filler material may also be USAGE ⁇ det, for otherwise air-filled areas of the interim ⁇ rule space between the second circuit carrier and the heat mesenke.
- Such a filler which z. May possess as well elasti ⁇ specific properties, in some applications, the vibration can improve.
- the production of a circuit arrangement according to the invention can comprise, for example, the following steps:
- the component may be equipped with components before, during or after its connection to the heat sink, and the first circuit carrier may be provided with a plurality of such recesses. Provision of a second composite of a second circuit carrier and an electronic component, of which component terminals are electrically connected to lower-side contact points of the second circuit carrier (Here, several components in the ⁇ ser way can be connected to the second circuit carrier and / or several such second Networks are provided),
- B. by surface contact be it directly or indirectly via a heat-conducting intermediate layer (the recess can also be at least partially filled with a good heat-conducting compound before the insertion of the second composite, eg., A curable potting compound), and
- the circuit arrangement according to the invention ensures a good, since more or less immediate heat dissipation of the or the second circuit carrier contacted components to the heat sink out.
- a so-called unbundling of the component connections can take place with the second circuit substrate , which are in direct electrical contact with bottom contact points of the second circuit substrate and lead through the second circuit substrate to top contact locations.
- Dependent of the technology selected for the second circuit carrier eg LTCC
- further electronic components or electronic functionalities can be integrated on or in this circuit carrier, for example for adaptation to a "peripheral electronics" formed by the first circuit carrier together with its components becomes.
- the second circuit carrier is also equipped on its side facing away from the heat sink with at least one component.
- Such equipment can z. B. simultaneously with the production of the above-mentioned second composite, or later.
- the denominationablei of such additional components on the second circuit carrier is ⁇ processing capability is comparatively poor so that this mounting point, in particular for components suitable, which produce a much lower thermal loss Leis ⁇ tung than or the second under the circuit carrier arranged components.
- the invention provides according to a certain Mo ⁇ dularmaschine of the overall structure inasmuch as one or more electronic components are included in a modular manner (in conjunction with the second circuit substrate) in the circuit arrangement.
- This obviously has advantages in terms of repairability of the circuit arrangement (by exchanging modules) for the relevant circuit components as well as with regard to any subsequent changes in the circuit arrangement occurring in practice (assembly variants).
- the modular design makes it possible, under certain circumstances, to reuse the peripheral electronics (first circuit board including assembly) in conjunction with one or more modified modules (second circuit board including assembly).
- Fig. 1 is a schematic plan view of a scarf ⁇ tion arrangement
- Fig. 2 is a sectional view taken along the line II-II in Fig. 1.
- FIG. 1 shows a circuit arrangement 10 contained in a motor vehicle transmission control unit, comprising a heat sink 12 (which forms part of a control unit housing in the exemplary embodiment shown here), a first circuit carrier 16 lying on an upper side 14 of the heat sink, thermally coupled, and second circuit carrier 18-1 , 18-2, 18-3 and 18-4.
- the heat sink 12 is formed in a simple and efficient manner by a flat aluminum die-cast plate of uniform thickness forming a bottom of the circuit housing housing (not shown). The thickness of the heat sink 12 is substantially greater than the thickness of the circuit carrier 16.
- the first circuit carrier 16 is formed as a thick-film ceramic.
- a common material for the formation of Keramikträ ⁇ gerplatten is z. B. Al 2 O 3 .
- Such thick-film ceramics are well-known to experts in the field of high-temperature electronics and therefore require no further explanation.
- the circuit arrangement 10 comprises a multiplicity of electronic components, which are arranged in part in a manner known per se on the upper side of the first circuit carrier 16 and wired by means of same. From this part of the components, an unhoused integrated circuit 20 applied in so-called flip-chip technology and a housed integrated circuit 22 in the figure are shown by way of example only.
- BGAs BaIl grid arrays
- Another part of the components of the circuit assembly 10 (here, for alternatively in flip-chip technology as BGA.) Contrast, is arranged on the underside of the second circuit substrate 18, the through each case in a top surface 14 of the Wär ⁇ mesenke 12 toward Recess 24-1, 24-2 and 24-3 are included.
- the second circuit carriers 18 are designed as LTCC.
- Such multilayer in hybrid or micro hybrid technology produced ceramic carrier plates are known per se and allow in addition to their wiring function, the integration of other components in a three-dimensional structure.
- Each second circuit carrier 18 has at its top pads ("pads") 26, which are each electrically connected either with sol ⁇ chen contact points 26 of a directly adjacent in the same recess 24 second circuit substrate 18 or top contact points 28 of the first circuit substrate.
- the second scarf ⁇ tion carrier 18-2 and 18-3 are taken together next to each other in a provided in a central region of the first circuit substrate 16 recess 24-2.
- the second circuit carriers 18-1 and 18-4 are accommodated in separately provided recesses 24-1 and 24-3, of which the recess 24-3 is provided at the edge of the first circuit carrier 16.
- a recess 24 provided for receiving one or more second circuit carriers 18 could also be provided as an intermediate space between two laterally spaced-apart first circuit carriers 16.
- the electrical connection between the second circuitry inert 18-1, 18-2 and 18-3 on the one hand and the first shawl ⁇ tung carrier 16 is in the illustrated embodiment by bonding wires 30 to the pads 26, realized 28, whereas the connection between the second circuit carrier 18-4 and the first circuit substrate 16 is made here by a glued trace sheet 32 with corresponding traces. Following the bonding process, the bonding wires 30 are still ver ⁇ cast (mechanical protection and improvement of the vibration resistance).
- the arranged on the undersides of the second circuit substrate 18 components are in the figure 34-1 to 34-5 be ⁇ draws.
- these components 34 to unpackaged integrated circuits ( "bare dies"), of which component leads are connected with the lower-side contact points of the second circuit carrier 18 in question in flip chip technology electrically ver ⁇ and its bottom with the top 14 the heat sink 12 are surface-thermally coupled.
- the thermally active Be ⁇ rich of the component 34-1 is therefore optimally coupled with the heat sink 12th This is associated with the evaluation of the field of application of the relevant electronics towards higher ambient temperatures and / or higher power losses. In contrast to conventional flip-chip structures, the Heat dissipation of the device not over the circuit board.
- the device is optimally brought into thermal connec tion with a large and comparatively thick heat sink.
- the second circuit carrier 18-1 provides an electrical Ver ⁇ wiring from its lower-side contact point to its upper-side contact points 26 provided through which (in this case to the contact points 28 of the first circuit substrate 16) the above-mentioned additional contacting is effected.
- FIG. 1 Another type of electrical connection between the first circuit carrier and one of the second circuit carrier can be seen in FIG. 1 in the second circuit carrier 18-4.
- the connection between the pads 26, 28 realized by means of the glued printed circuit film 32 which simultaneously leads to additional upper side pads 36 of the first circuit substrate 16 to the circuit arrangement 10 with an external line connection and / or other circuit carriers or Circuit arrangements to connect, which are un ⁇ accommodated in the same electronic unit (control unit).
- each of these circuit carriers can in principle be manufactured in any other suitable technology, which allows an assembly and electrical ⁇ specific wiring of components.
- the so-called HTCC technology (high temperature cofired ceramics") is particularly suitable for the second circuit carriers 18.
- a first composite of the heat sink 12 and the first scarf ⁇ tion carrier 16 is first made, wherein the circuit substrate 16 before or after the components provided thereon (20, 22, etc.) is fitted.
- second networks gefer ⁇ be taken, each consisting of one of the second circuit substrate 18 and the one or more components disposed thereon (34).
- These second composites or modules are then inserted into the recesses 24 of the first circuit carrier 16 with the components first, with a good heat-conducting adhesive material or a suitable potting compound being provided for attachment and / or better thermal contact.
- the upper-side contact points of the first circuit carrier 16 are electrically connected to the adjacent upper-side contact points of the second circuit carriers 18, in the above embodiment partially by the bonding wires 30 and partly by the conductor foil 32.
- the components 34 that are thermally coupled more or less directly to the heat sink result in an outstanding heating.
- the particular design with regard to the arrangement of the components 34 is particularly suitable both for dard chips as well as specially prepared flip chips.
- at least one of these components 34 is a power module (eg ASIC or switching transistor) or a microcontroller chip.
- these devices 34 can together with the associated second circuit substrates 18 advantageous in practice over time changing electronic modules integrated into the otherwise unchanged, peripheral electronics ⁇ to which was created Marketung from the first circuit substrate 16 together with the loading , It is also worth mentioning that the so-called rewiring of more complex microelectronic circuits (eg the aforementioned microcontrollers or other microprocessor devices) to adapt to peripheral electronics or technology no longer has to take place at the wafer level but, if necessary, by the relevant second circuit carrier 18 can take place.
- more complex microelectronic circuits eg the aforementioned microcontrollers or other microprocessor devices
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102005053974A DE102005053974B3 (en) | 2005-11-11 | 2005-11-11 | Electrical circuit arrangement has heat sink thermally coupled to a circuit carrier for electronic components and a second carrier within the first having an electronic component between it and the heat sink |
PCT/EP2006/067101 WO2007054409A1 (en) | 2005-11-11 | 2006-10-05 | Electronic circuit arrangement and method for producing an electronic circuit arrangement |
Publications (1)
Publication Number | Publication Date |
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EP1946625A1 true EP1946625A1 (en) | 2008-07-23 |
Family
ID=37460233
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP06807009A Withdrawn EP1946625A1 (en) | 2005-11-11 | 2006-10-05 | Electronic circuit arrangement and method for producing an electronic circuit arrangement |
Country Status (5)
Country | Link |
---|---|
US (1) | US7911051B2 (en) |
EP (1) | EP1946625A1 (en) |
CN (1) | CN101356862B (en) |
DE (1) | DE102005053974B3 (en) |
WO (1) | WO2007054409A1 (en) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102008034654A1 (en) * | 2008-07-25 | 2010-02-04 | Knorr-Bremse Systeme für Nutzfahrzeuge GmbH | Sensor device for e.g. anti-lock brake system in commercial vehicle, has circuit carrier produced by thick-film technology, and formed such that pressure and acceleration sensors are surface mountable in production process step |
JP2010267954A (en) * | 2009-04-15 | 2010-11-25 | Panasonic Corp | Electronic device |
DE102010003678A1 (en) * | 2010-04-07 | 2011-10-13 | Zf Friedrichshafen Ag | Method for manufacturing control module for transmission control of motor car, involves providing recess in printed circuit board, and pressing functional printed circuit board module into recess |
JP5672305B2 (en) * | 2010-08-27 | 2015-02-18 | 株式会社村田製作所 | Semiconductor device |
US9504157B2 (en) | 2013-09-03 | 2016-11-22 | Raytheon Company | Hybrid circuit assembly |
DE102015223551A1 (en) | 2015-11-27 | 2017-06-01 | Robert Bosch Gmbh | Circuit carrier for an electrical circuit and associated manufacturing method |
DE102017217494A1 (en) * | 2017-09-29 | 2019-04-04 | Micro-Epsilon Messtechnik Gmbh & Co. Kg | Contactless working displacement sensor |
DE102020116621A1 (en) | 2020-06-24 | 2021-12-30 | Bayerische Motoren Werke Aktiengesellschaft | TELEMATICS DEVICE AND MOTOR VEHICLE |
DE102021208497A1 (en) | 2021-08-05 | 2023-02-09 | Vitesco Technologies Germany Gmbh | power circuit |
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US6807061B1 (en) * | 2003-04-28 | 2004-10-19 | Hewlett-Packard Development Company, L.P. | Stack up assembly |
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2005
- 2005-11-11 DE DE102005053974A patent/DE102005053974B3/en not_active Expired - Fee Related
-
2006
- 2006-10-05 EP EP06807009A patent/EP1946625A1/en not_active Withdrawn
- 2006-10-05 US US12/093,332 patent/US7911051B2/en not_active Expired - Fee Related
- 2006-10-05 WO PCT/EP2006/067101 patent/WO2007054409A1/en active Application Filing
- 2006-10-05 CN CN2006800508987A patent/CN101356862B/en not_active Expired - Fee Related
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US4879630A (en) * | 1987-09-03 | 1989-11-07 | Bendix Electronics S.A. | Housing for an electronic circuit |
DE4030532A1 (en) * | 1990-09-27 | 1992-04-02 | Bosch Gmbh Robert | Hybrid multilevel circuit with metal substrate - bonded directly to glass-ceramic layer of lowest circuit level |
US5297006A (en) * | 1991-08-13 | 1994-03-22 | Fujitsu Limited | Three-dimensional multi-chip module |
DE4129835A1 (en) * | 1991-09-07 | 1993-03-11 | Bosch Gmbh Robert | POWER ELECTRONIC SUBSTRATE AND METHOD FOR THE PRODUCTION THEREOF |
DE19859739A1 (en) * | 1998-12-23 | 2000-07-06 | Bosch Gmbh Robert | Heat sink for electronic control device has power component thermally coupled to heat sink block on underside of component carrier via heat conduction plate in component reception opening in component carrier |
Also Published As
Publication number | Publication date |
---|---|
CN101356862A (en) | 2009-01-28 |
US20090161319A1 (en) | 2009-06-25 |
CN101356862B (en) | 2010-11-17 |
US7911051B2 (en) | 2011-03-22 |
WO2007054409A1 (en) | 2007-05-18 |
DE102005053974B3 (en) | 2007-03-01 |
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