EP1902466A2 - Schottky diode with improved surge capability - Google Patents

Schottky diode with improved surge capability

Info

Publication number
EP1902466A2
EP1902466A2 EP06774471A EP06774471A EP1902466A2 EP 1902466 A2 EP1902466 A2 EP 1902466A2 EP 06774471 A EP06774471 A EP 06774471A EP 06774471 A EP06774471 A EP 06774471A EP 1902466 A2 EP1902466 A2 EP 1902466A2
Authority
EP
European Patent Office
Prior art keywords
diode
die
heat sink
package
anode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP06774471A
Other languages
German (de)
French (fr)
Other versions
EP1902466A4 (en
Inventor
Rossano Carta
Luigi Merlin
Diego Raffo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies Americas Corp
Original Assignee
International Rectifier Corp USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Rectifier Corp USA filed Critical International Rectifier Corp USA
Publication of EP1902466A2 publication Critical patent/EP1902466A2/en
Publication of EP1902466A4 publication Critical patent/EP1902466A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/60—Schottky-barrier diodes 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/461—Leadframes specially adapted for cooling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/481—Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07336—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/074—Connecting or disconnecting of anisotropic conductive adhesives
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/321—Structures or relative sizes of die-attach connectors
    • H10W72/325—Die-attach connectors having a filler embedded in a matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/381—Auxiliary members
    • H10W72/387—Flow barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/853—On the same surface
    • H10W72/856—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Definitions

  • This invention relates to semiconductor devices and more particularly relates to a structure to improve the surge capability of a Schottky diode.
  • SiC Schottky diodes are well known and have reduced switching losses, increased breakdown voltage and reduced volume and weight as compared to their silicon (Si) counterparts. Such devices are therefore replacing Si Schottky devices in numerous applications such as converter/inverters, motor drives, and the like.
  • SiC Schottky diodes such as those rated at 600 volts, for example, have a reduced surge capability than the equivalent Si device.
  • the surge capability of the conventional SiC Schottky diode was reduced by a factor of 4, compared to the equivalent Si Schottky diode.
  • a SiC Schottky die or even a silicon (Si) Schottky die is mounted in a package which is arranged to more
  • a SiC die or a Si die may be inverted from its usual orientation and the guard ring surrounding the active area is well insulated so that the active anode area can be soldered or secured with a conductive adhesive to the heat sink surface without shorting the guard ring.
  • the support surface may be a conventional lead frame as used for a TO-220 type package, or the like, or may be the interior surface of the conductive "can" of a DirectFET® type housing.
  • DirectFET® type housings or packages are shown in U.S. Patent No. 6,624,522 (IR- 1830) the disclosure of which is incorporated herein in its entirety.
  • solderable top metal of the type shown in copending application Serial No. 11/255,021, filed October 20, 2005 (IR-2769), the entirety of which is incorporated herein by reference, is formed on the anode surface of the die, particularly a SiC die.
  • Figure 1 shows a SiC Schottky diode, forward voltage drop and forward current at a plurality of different temperatures.
  • Figure 2 shows a measured forward voltage drop as a function of time for different values of 0.5m sec. pulses of forward current at 25 0 C in the prior art package of Figure 4.
  • Figure 3 is like Figure 2 but shows a reduced forward voltage drop when the Schottky die is mounted in accordance with the invention as shown in Figure 5.
  • Figure 4 is a cross-section of a SiC Schottky diode of the prior art in which the anode layer, or epitaxially formed layer faces away from the main package heat sink.
  • Figure 5 shows the structure of Figure 4 where the die is flipped over, and the hotter epi surface side of the die faces and is thermally coupled to the main heat sink surface of the device package or assembly.
  • the SiC or other die must be flipped with the epitaxial layer in the position of the cathode in the standard package.
  • the top metal on the epitaxial surface is preferably solderable, for example, using the solderable top metal disclosed in application Serial No. 11/255,021, filed October 20, 2005 (IR-2769).
  • the device back metal, now on the cathode side of the die may be any suitable bondable metal.
  • FIG. 4 there is shown a prior art SiC Schottky diode device 20 and at least a portion of the package for the device.
  • the Schottky die is shown as die 21, having a substrate 22 and a top epi layer 23.
  • the resistivity and thickness of the SiC is based on the blocking voltage required, for example, 600 volts.
  • a barrier metal interface 24 is atop epi layer 23 and receives a suitable anode contact 25, which may be Al or any bondable metal.
  • the active area of the device is terminated by a diffused termination guard ring 26 which is passivated by a suitable insolation layer 27, which could be an oxide.
  • a similar structure is present in the Si Schottky die.
  • the cathode side of substrate 22 receives a cathode electrode 28 which can, for example, be a tri-layer of CrNiAg or any suitable solderable metal.
  • the package for die 22 will include a heat sinking surface such as the metal lead frame 30 in Figure 4. Any other metal layer of the package will serve as a good heat sink for die 22, and in Figure 4, the die 22 is soldered or secured by a conductive cement or epoxy to lead frame 30 so that a good thermal connection is obtained. Frequently, the heat sink 30 will also serve as a cathode contact for the package.
  • Figure 2 shows the forward voltage drop for the device of Figure 4 as a function of time for different current values of 0.5m sec. current pulses at 25 0 C.
  • the plural curves shown are for pulses of 15 amperes (the bottom-most line) to 40 amperes (the top most line), with intermediate pulse currents of 17, 20, 22, 25, 27, 30, 32 and 37 Amperes. Note the dramatic increase in forward voltage drop at the 37 and 40 ampere levels.
  • Figure 3 shows curves like those of Figure 2 for the die of Figure 5, containing the novel invention. Note the substantially reduced forward voltage drop and thus the reduced heating of the die at the higher current pulse values.

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

An SiC OR Si Schottky diode die (20) is mounted with its epitaxial anode surface (the exposed surface of anode contact 25) connected to the best heat sink surface (the top surface of package metal leadframe 30) in the device package This produces a substantial increase in the surge current capability of the device.

Description

SCHOTTKY DIODE WITH IMPROVED SURGE CAPABILITY
RELATED APPLICATIONS
[0001] This application claims the benefit and priority of U.S. Provisional
Application No. 60/696,634, filed July 5, 2005 the entire disclosure of which is incorporated by reference herein.
FIELD OF THE INVENTION
[0002] This invention relates to semiconductor devices and more particularly relates to a structure to improve the surge capability of a Schottky diode.
BACKGROUND OF THE INVENTION
[0003] Silicon Carbide (SiC) Schottky diodes are well known and have reduced switching losses, increased breakdown voltage and reduced volume and weight as compared to their silicon (Si) counterparts. Such devices are therefore replacing Si Schottky devices in numerous applications such as converter/inverters, motor drives, and the like.
[0004] However, higher voltage SiC Schottky diodes, such as those rated at 600 volts, for example, have a reduced surge capability than the equivalent Si device. Thus, in an application such as an AC/DC power factor correction circuit, where surge ruggedness is important, the surge capability of the conventional SiC Schottky diode was reduced by a factor of 4, compared to the equivalent Si Schottky diode.
BRIEF SUMMARY OF THE INVENTION
[0005] In accordance with the present invention, a SiC Schottky die or even a silicon (Si) Schottky die is mounted in a package which is arranged to more
1 effectively remove heat from its epitaxial anode side, which is the hottest side of the die thereby to reduce the effect of "self heating", which we have recognized is the source of the reduced surge capability of the SiC Schottky diode and the equivalent Si Schottky die.
[0006] This is accomplished by mounting the die with its anode side well coupled to a conductive heat sink surface. Thus, a SiC die or a Si die may be inverted from its usual orientation and the guard ring surrounding the active area is well insulated so that the active anode area can be soldered or secured with a conductive adhesive to the heat sink surface without shorting the guard ring. The support surface may be a conventional lead frame as used for a TO-220 type package, or the like, or may be the interior surface of the conductive "can" of a DirectFET® type housing. Such DirectFET® type housings or packages are shown in U.S. Patent No. 6,624,522 (IR- 1830) the disclosure of which is incorporated herein in its entirety.
[0007] To ensure good electrical and/or thermal connection of the anode to the heat sink surface, a solderable top metal of the type shown in copending application Serial No. 11/255,021, filed October 20, 2005 (IR-2769), the entirety of which is incorporated herein by reference, is formed on the anode surface of the die, particularly a SiC die.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 shows a SiC Schottky diode, forward voltage drop and forward current at a plurality of different temperatures.
[0009] Figure 2 shows a measured forward voltage drop as a function of time for different values of 0.5m sec. pulses of forward current at 250C in the prior art package of Figure 4.
[0010] Figure 3 is like Figure 2 but shows a reduced forward voltage drop when the Schottky die is mounted in accordance with the invention as shown in Figure 5.
[0011] Figure 4 is a cross-section of a SiC Schottky diode of the prior art in which the anode layer, or epitaxially formed layer faces away from the main package heat sink.
1 [0012] Figure 5 shows the structure of Figure 4 where the die is flipped over, and the hotter epi surface side of the die faces and is thermally coupled to the main heat sink surface of the device package or assembly.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
[0013] We performed a thermal and electrical analysis of SiC Schottky diodes and learned that the reduction in their surge capability, as compared to equivalent Si devices is related to the "self heating" of the die under high current and relatively long pulse conditions when the die is unable to effectively dissipate the heat produced. This limitation on device performance during forward conduction since, at high current, the positive temperature coefficient forces a thermally reduced voltage drop which increases until device destruction.
[0014] This is due to the characteristic of SiC (of any of the various polytypes such as 4H, 3C, 6H and others) and is strongly dependent on temperature particularly with lightly doped material as is normally found in the top epitaxially grown layer of a typical SiC devices.
[0015] Thus, as shown in Figure 1, we have recognized from calculation and simulation the strong effect of temperature on the forward voltage drop and forward current due to self heating (R111 = 2.5 KAV). In Figure 1, current saturation is apparent.
[0016] The effect is strongly dependent on lightly doped material, (i.e. the epitaxial layer carrying the anode contact of the Schottky. Thus, mobility in this layer decreases with temperature according to the following formula:
where μ0 = 400.
1 [0017] From the above, it can be seen that the high mobility at high junction temperatures Tj will lead to high resistivity high forward voltage drop Vf and poor surge capability. It should be noted that the same analysis applies to the Si Schottky die as well as the SiC Schottky die and the benefits of the invention apply equally.
[0018] In accordance with the invention, and with the above understanding, it is critically necessary to improve the cooling of the epitaxial silicon side of the die (the anode) since that is the hottest side of the die. Thus, the epitaxial side of the die must contact the best heat dissipation surface available in the package for the die. Thus, in a plastic package, this would be the lead frame supporting the die, or the interior top surface of the can in a DirectFET® type package.
[0019] To this end, the SiC or other die must be flipped with the epitaxial layer in the position of the cathode in the standard package. The top metal on the epitaxial surface is preferably solderable, for example, using the solderable top metal disclosed in application Serial No. 11/255,021, filed October 20, 2005 (IR-2769). The device back metal, now on the cathode side of the die may be any suitable bondable metal.
[0020] When flipped die is used, special protection is needed to prevent the device termination region from contacting the lead frame. As will be shown, a suitable epoxy passivation mask, or the like can be used.
[0021] Referring next to Figure 4, there is shown a prior art SiC Schottky diode device 20 and at least a portion of the package for the device. The Schottky die is shown as die 21, having a substrate 22 and a top epi layer 23. The resistivity and thickness of the SiC is based on the blocking voltage required, for example, 600 volts. A barrier metal interface 24 is atop epi layer 23 and receives a suitable anode contact 25, which may be Al or any bondable metal. The active area of the device is terminated by a diffused termination guard ring 26 which is passivated by a suitable insolation layer 27, which could be an oxide. A similar structure is present in the Si Schottky die.
[0022] The cathode side of substrate 22 receives a cathode electrode 28 which can, for example, be a tri-layer of CrNiAg or any suitable solderable metal.
.1 [0023] The package for die 22 will include a heat sinking surface such as the metal lead frame 30 in Figure 4. Any other metal layer of the package will serve as a good heat sink for die 22, and in Figure 4, the die 22 is soldered or secured by a conductive cement or epoxy to lead frame 30 so that a good thermal connection is obtained. Frequently, the heat sink 30 will also serve as a cathode contact for the package.
[0024] The package is then completed in any desired manner to fully house the die 22.
[0025] As pointed out previously, this structure has produced unexpectedly poor surge capability.
[0026] In accordance with the invention, and as shone in Figure 4, the die
22 of Figure 4 is flipped so that the epi side 23 of the die makes contact with the best heat sink surface of the package.
[0027] In Figure 5, components identical to those of Figure 4 have the same identifying numeral. However, an epoxy passivation mass 40 is added around the edge of contact 25 and under termination passivation 27 to prevent the accidental contact of guard ring 26 to metal body 30. A solder paste 41 is also employed to thermally and electrically connect anode contact 25 to heat sink 30.
[0028] Figure 2 shows the forward voltage drop for the device of Figure 4 as a function of time for different current values of 0.5m sec. current pulses at 250C. The plural curves shown are for pulses of 15 amperes (the bottom-most line) to 40 amperes (the top most line), with intermediate pulse currents of 17, 20, 22, 25, 27, 30, 32 and 37 Amperes. Note the dramatic increase in forward voltage drop at the 37 and 40 ampere levels.
[0029] Figure 3 shows curves like those of Figure 2 for the die of Figure 5, containing the novel invention. Note the substantially reduced forward voltage drop and thus the reduced heating of the die at the higher current pulse values.
[0030] Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses
1 will become apparent to those skilled in the art. It is preferred, therefore, that the present invention be limited not by the specific disclosure herein.
.1

Claims

WHAT IS CLAIMED IS:
1. An Schottky diode comprising a semiconductor wafer having a body region and an epitaxially formed region atop the body region; an anode contact atop said epitaxially formed region and a cathode electrode on the bottom surface of said body region; a housing for said wafer; said housing including a primary heat sink having a surface; said anode contact being thermally connected and secured to said primary heat sink surface for the maximum removal of heat from said anode side of said wafer thereby to substantially improve the surge capability of said diode.
2. The Schottky diode of claim 1, wherein at least said body region consists of one of Silicon or Silicon Carbide.
3. The diode of claim 2, wherein said anode contact is a solderable material.
4. The diode of claim 2, which further includes a guard ring diffusion in said top of said epitaxially formed region and surrounding said anode contact; and an insulation ring disposed between said guard ring and said primary heat sink surface.
5. The diode of claim 3, which further includes a guard ring diffusion in said top of said epitaxially formed region and surrounding said anode contact; and an insulation ring disposed between said guard ring and said primary heat sink surface.
6. The diode of claim 2, wherein said primary heat sink is a lead frame.
7. The diode of claim 3, wherein said primary heat sink is a lead frame.
8. The diode of claim 5, wherein said primary heat sink is a lead frame.
00775157.1
9. The diode of claim 2, wherein said package is a DirectFET® type package having a shallow cup for receiving said die.; said anode electrode connected to the interior of the top of said cup.
10. The diode of claim 3, wherein said package is a DirectFET® type package having a shallow cup for receiving said die.; said anode electrode connected to the interior of the top of said cup.
11. The diode of claim 5 , wherein said package is a DirectFET® type package having a shallow cup for receiving said die.; said anode electrode connected to the interior of the top of said cup.
EP06774471A 2005-07-05 2006-07-05 SCHOTTKY DIODE HAS IMPROVED OVERVOLTAGE CAPACITY Withdrawn EP1902466A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US69663405P 2005-07-05 2005-07-05
PCT/US2006/026002 WO2007005844A2 (en) 2005-07-05 2006-07-05 Schottky diode with improved surge capability

Publications (2)

Publication Number Publication Date
EP1902466A2 true EP1902466A2 (en) 2008-03-26
EP1902466A4 EP1902466A4 (en) 2010-09-08

Family

ID=37605140

Family Applications (1)

Application Number Title Priority Date Filing Date
EP06774471A Withdrawn EP1902466A4 (en) 2005-07-05 2006-07-05 SCHOTTKY DIODE HAS IMPROVED OVERVOLTAGE CAPACITY

Country Status (4)

Country Link
EP (1) EP1902466A4 (en)
JP (1) JP2008545279A (en)
CN (1) CN101223638A (en)
WO (1) WO2007005844A2 (en)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030015708A1 (en) 2001-07-23 2003-01-23 Primit Parikh Gallium nitride based diodes with low forward voltage and low reverse current operation
US7534633B2 (en) 2004-07-02 2009-05-19 Cree, Inc. LED with substrate modifications for enhanced light extraction and method of making same
US9070850B2 (en) 2007-10-31 2015-06-30 Cree, Inc. Light emitting diode package and method for fabricating same
DE102006001195A1 (en) 2006-01-10 2007-07-12 Sms Demag Ag Casting-rolling process for continuous steel casting involves coordinating roll speeds and temperatures to provide higher end temperature
US7804147B2 (en) 2006-07-31 2010-09-28 Cree, Inc. Light emitting diode package element with internal meniscus for bubble free lens placement
US7813400B2 (en) 2006-11-15 2010-10-12 Cree, Inc. Group-III nitride based laser diode and method for fabricating same
US7769066B2 (en) 2006-11-15 2010-08-03 Cree, Inc. Laser diode and method for fabricating same
US7834367B2 (en) * 2007-01-19 2010-11-16 Cree, Inc. Low voltage diode with reduced parasitic resistance and method for fabricating
US7999283B2 (en) 2007-06-14 2011-08-16 Cree, Inc. Encapsulant with scatterer to tailor spatial emission pattern and color uniformity in light emitting diodes
US9012937B2 (en) 2007-10-10 2015-04-21 Cree, Inc. Multiple conversion material light emitting diode package and method of fabricating same
US10256385B2 (en) 2007-10-31 2019-04-09 Cree, Inc. Light emitting die (LED) packages and related methods
CN104124217B (en) * 2014-07-17 2017-12-29 西安电子科技大学 A kind of high-temperature carborundum power device packaging structure and preparation method thereof
CN108538924A (en) * 2018-05-16 2018-09-14 捷捷半导体有限公司 A kind of plastic packaging SiC Schottky diode device and its manufacturing method
KR102038525B1 (en) * 2018-09-27 2019-11-26 파워큐브세미(주) SiC SBD with ESD protection
CN113540257A (en) * 2021-06-16 2021-10-22 先之科半导体科技(东莞)有限公司 A Schottky diode with high surge capability

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4206540A (en) * 1978-06-02 1980-06-10 International Rectifier Corporation Schottky device and method of manufacture using palladium and platinum intermetallic alloys and titanium barrier
DE10002362A1 (en) * 2000-01-20 2001-08-02 Infineon Technologies Ag Semiconducting component enables heat to be easily conducted away - has diode with two connections connected to two carrier arrangement connecting parts via current and heat conducting connecting parts
JP2002158363A (en) * 2000-11-17 2002-05-31 Matsushita Electric Ind Co Ltd Electrode structure of Schottky barrier diode
US7119447B2 (en) * 2001-03-28 2006-10-10 International Rectifier Corporation Direct fet device for high frequency application
US6777800B2 (en) * 2002-09-30 2004-08-17 Fairchild Semiconductor Corporation Semiconductor die package including drain clip
US7109520B2 (en) * 2003-10-10 2006-09-19 E. I. Du Pont De Nemours And Company Heat sinks

Also Published As

Publication number Publication date
EP1902466A4 (en) 2010-09-08
WO2007005844A3 (en) 2007-10-04
CN101223638A (en) 2008-07-16
JP2008545279A (en) 2008-12-11
WO2007005844A2 (en) 2007-01-11

Similar Documents

Publication Publication Date Title
US9412880B2 (en) Schottky diode with improved surge capability
US7838907B2 (en) Semiconductor device and power conversion device using the same
CN109166833B (en) Power semiconductor modules
EP1902466A2 (en) Schottky diode with improved surge capability
US9324645B2 (en) Method and system for co-packaging vertical gallium nitride power devices
US11127853B2 (en) Power transistor device including first and second transistor cells having different on-resistances for improved thermal stability
WO2023154646A1 (en) Semiconductor package with creepage extension structures
US20100051963A1 (en) Power transistor
CN114846593B (en) Semiconductor device with a semiconductor device having a plurality of semiconductor chips
CN107680944B (en) Power semiconductor module
CN100533764C (en) Semiconductor device module structure
CN101065848A (en) Semiconductor devices and rectifiers
WO2004044984A2 (en) Chip-scale schottky device
JP6303776B2 (en) Semiconductor device
CN106356369B (en) Semiconductor device including clamp structure
WO2024186530A1 (en) Power semiconductor package
US20260068693A1 (en) Power semiconductor device package
JP7607834B1 (en) Semiconductor device, semiconductor device manufacturing method, and power conversion device
US20250343091A1 (en) Integration of Liner in Passivation Stack
KR100809940B1 (en) Surface-Mount Diode and its Manufacturing Method
CN118588701A (en) Power semiconductor device arrangement and power semiconductor device module
JPH11214710A (en) Power semiconductor device
JPH08124948A (en) Pressure contact type semiconductor device
JP2000294739A (en) Semiconductor resistance
HK1084507B (en) Chip-scale schottky device

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20080131

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR

AX Request for extension of the european patent

Extension state: AL BA HR MK YU

RAX Requested extension states of the european patent have changed

Extension state: RS

Extension state: MK

Extension state: HR

Extension state: BA

Extension state: AL

RIN1 Information on inventor provided before grant (corrected)

Inventor name: RAFFO, DIEGO

Inventor name: MERLIN, LUIGI

Inventor name: CARTA, ROSSANO

A4 Supplementary search report drawn up and despatched

Effective date: 20100810

RIC1 Information provided on ipc code assigned before grant

Ipc: H01L 23/495 20060101ALI20100804BHEP

Ipc: H01L 23/367 20060101ALI20100804BHEP

Ipc: H01L 23/36 20060101AFI20080121BHEP

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20110308