EP1852002A1 - Verfahren zur herstellung elektrisch leitender muster auf einer nicht entwickelbaren oberfläche eines isoliersubstrats und sich ergebende vorrichtung - Google Patents

Verfahren zur herstellung elektrisch leitender muster auf einer nicht entwickelbaren oberfläche eines isoliersubstrats und sich ergebende vorrichtung

Info

Publication number
EP1852002A1
EP1852002A1 EP06709341A EP06709341A EP1852002A1 EP 1852002 A1 EP1852002 A1 EP 1852002A1 EP 06709341 A EP06709341 A EP 06709341A EP 06709341 A EP06709341 A EP 06709341A EP 1852002 A1 EP1852002 A1 EP 1852002A1
Authority
EP
European Patent Office
Prior art keywords
layer
electrically conductive
portions
protective material
conductive patterns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP06709341A
Other languages
English (en)
French (fr)
Inventor
Christian Desagulier
Alain Lacombe
Bruno Esmiller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ArianeGroup SAS
Original Assignee
Astrium SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Astrium SAS filed Critical Astrium SAS
Publication of EP1852002A1 publication Critical patent/EP1852002A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q15/00Devices for reflection, refraction, diffraction or polarisation of waves radiated from an antenna, e.g. quasi-optical devices
    • H01Q15/14Reflecting surfaces; Equivalent structures
    • H01Q15/141Apparatus or processes specially adapted for manufacturing reflecting surfaces
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0284Details of three-dimensional rigid printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09018Rigid curved substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107Using laser light
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0026Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0073Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces
    • H05K3/0082Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces characterised by the exposure method of radiation-sensitive masks
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49156Manufacturing circuit on or in base with selective destruction of conductive paths
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49165Manufacturing circuit on or in base by forming conductive walled aperture in base

Definitions

  • the present invention relates to a method for producing electrically conductive patterns on a non-developable three-dimensional surface of an insulating substrate. Although not exclusively, it is particularly suitable for producing, on a surface at least approximately in the form of a paraboloid, a hyperboloid, etc., a polarization grid (frequency reuse antenna) or a series of resonant patterns (dichroic antennas).
  • the invention also relates to devices comprising such a substrate, said non-developable surface carrying said electrically conductive patterns, made according to the method.
  • the outline of said patterns is mechanically traced thereon by means of a tool that digs grooves whose depth is at least equal to the thickness of said layer of protection, and then said layers are subjected to the action of a chemical agent capable of selectively attacking said electrically conductive material without attacking said material. protection, this etching operation being continued for a time sufficient for said electrically conductive material to be removed over its entire thickness above said grooves, after which the parts of said layer are peeled off from the substrate; electrically conductive material exterior to said patterns.
  • electrically conductive patterns can be made directly on non-developable three-dimensional surfaces without resorting to a mask or an auxiliary substrate with which, moreover, it would be technically difficult to obtain optical characteristics. They are as precise in their shape as in their position on the said surfaces.
  • a tool for the tracing of the contours of said electrically conductive patterns, a tool provided with at least one etching tip or at least one cutting blade is used, said tool being mounted in a machine (eg controlled digital and five axes of rotation) responsible for moving relative to the non-developable surface.
  • a machine eg controlled digital and five axes of rotation
  • the implementation of this known method allows the realization of high quality grid reflectors, able to work in the Ku band (from 1 1 to 18 GHz) and formed of at least one network of parallel conductive wires, these conductors son having a width of 0.25 mm, a thickness of 35 micrometers and being distributed in a pitch of 1 mm on an area at least approximately in the form of paraboloid, whose opening diameter can reach 2300 mm.
  • the edge effects become significant, the tips or blades pushing, in the manner of a plow, the conductive material of reduced thickness and reducing the adhesion of the conductive wires to the substrate; and - the zones between wires are fragile and are therefore liable to break during peeling.
  • the present invention aims to overcome these disadvantages.
  • the method for producing electrically conductive patterns on a non-developable three-dimensional surface of an electrically insulating substrate the method according to which one begins by uniformly covering said non-developable surface with a layer of an electrically conductive material, which is in turn covered with a layer of a protective material, after which portions of said layer of protective material which do not cover areas of said layer of electrically conductors trice to form said patterns, and then removing portions of said layer of electrically conductive material discovered by the removal of said portions of said layer of protective material, is remarkable in that the removal of portions of the layer of protective material , which do not cover said zones of said layer of electrically conductive material to form said patterns, is made by laser ablation using a laser head that is moved, with respect to said non-developable surface covered with said layer of electrically conductive material and said layer of protective material, to cover all portions of said layer of protective material which do not cover said areas of said layer of electrically conductive material to form said electrically conductive patterns.
  • the portions of the layer of electrically conductive material are removed by the action of a chemical agent capable of attacking the material electrically conductive without attacking said protective material.
  • said chemical agent may be iron perchloride, when said layer is copper.
  • said protective material insensitive to the action of said chemical agent, may be an organic varnish.
  • a device such as a reflector for example, comprising an electrically insulating substrate carrying electrically conductive patterns on one of its non-developable surfaces with three dimensions and remarkable in that said electrically conductive patterns are realized by the implementation of the method according to the invention specified above.
  • FIG. 1 schematically represents an antenna device, whose reflector is provided with electrically conductive patterns produced by the implementation of the method according to the present invention.
  • FIGS. 3A to 3D schematically illustrate, in section, steps of the method according to the present invention, applied to the production of the electrically conductive patterns of FIGS. 1 and 2.
  • FIG. 1 diagrammatically shows a device antenna 1 provided with an antenna reflector 2 (shown in diametral section), supported by a bearing surface 3, via a support 4.
  • the reflector 2 comprises an electrically insulating substrate 5 (for example made of composite material), the surface 6 opposite the support 4 is concave and has a non-developable shape, for example the at least approximate shape of a paraboloid, a hyperbolo ⁇ de, etc ...
  • the reflector 2 carries electrically conductive patterns, formed in the example shown by conductors 7 parallel to each other and equidistant.
  • Each conductor 7 has a rectangular section of width et and thickness e and the distribution pitch of the parallel conductors 7 is designated p.
  • a separation zone 8 band-shaped having a width equal to p (see also Figure 2).
  • the reflector 2 begins by uniformly covering the non-developable surface 6 of the substrate 5 by a layer 9 of an electrically conductive material (see Figure 3A) of thickness equal to e .
  • a layer 9 may, for example, be deposited under vacuum on the surface 6 or be attached thereto by gluing. It may be metallic and for example constituted by copper or aluminum.
  • said layer of electrically conductive material 9 is covered by a layer 10 of a protective material, for example an organic varnish.
  • the laser protective ablation portions of the protective material layer 10 are then laser-ablated by means of a moving laser head. Placing the separation zones 8, that is to say which do not cover the zones of the layer 9 to form the conductors 7. After this laser ablation, it does not remain on the layer of electrically conductive material anymore. 9 lines 10.7 protective material, above the future conductors 7 and having the width I.
  • the protective lines 10.7 and the conductive layer 9 are subjected to the action of a chemical agent, for example applied by spraying or dipping.
  • This chemical agent attacks, between the lines 10.7, the layer of electrically conductive material 9, without attacking said lines 10.7 of protective material.
  • the chemical agent then selectively eliminating the conductive layer 9, is for example iron perchloride, when the layer 9 is copper.
  • the action of the chemical agent on the conductive layer 9 is continued until it is removed over its entire thickness in line with the separation zones 8 ( Figure 3C). This results in driver training 7.
  • the removal of the lines 10.7 covering the conductors 7 is also carried out.
  • the protective material of the layer 10 for example an organic varnish
  • the protective material of the layer 10 is chosen to possess characteristics that make it compatible with the environment. (eg spatial) in which the reflector will be called to work.
  • the lines 10.7 can then remain on the conductors 7 and serve as protection therefor, for example against corrosion.
  • the laser ablation speed can be very fast (for example 0.3 m / s) and that one can use multiple ablation laser sources simultaneously;
  • the ablation can resume after partial reconstitution of the layer 10 of protective material, without alteration of the substrate 5 and the conductive layer 9 ;

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
EP06709341A 2005-02-23 2006-02-20 Verfahren zur herstellung elektrisch leitender muster auf einer nicht entwickelbaren oberfläche eines isoliersubstrats und sich ergebende vorrichtung Withdrawn EP1852002A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0501815A FR2882490B1 (fr) 2005-02-23 2005-02-23 Procede pour la realisation de motifs electriquement conducteurs sur une surface non developpable d'un substrat isolant, et dispositif obtenu
PCT/FR2006/000373 WO2006090050A1 (fr) 2005-02-23 2006-02-20 Procede pour la realisation de motifs electriquement conducteurs sur une surface non developpable d'un substrat isolant, et dispositif obtenu

Publications (1)

Publication Number Publication Date
EP1852002A1 true EP1852002A1 (de) 2007-11-07

Family

ID=35115937

Family Applications (1)

Application Number Title Priority Date Filing Date
EP06709341A Withdrawn EP1852002A1 (de) 2005-02-23 2006-02-20 Verfahren zur herstellung elektrisch leitender muster auf einer nicht entwickelbaren oberfläche eines isoliersubstrats und sich ergebende vorrichtung

Country Status (4)

Country Link
US (1) US7721426B2 (de)
EP (1) EP1852002A1 (de)
FR (1) FR2882490B1 (de)
WO (1) WO2006090050A1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8296480B2 (en) * 2009-11-30 2012-10-23 Lsi Corporation Context execution in a media controller architecture
US10516216B2 (en) 2018-01-12 2019-12-24 Eagle Technology, Llc Deployable reflector antenna system
US10707552B2 (en) 2018-08-21 2020-07-07 Eagle Technology, Llc Folded rib truss structure for reflector antenna with zero over stretch
WO2024135216A1 (ja) * 2022-12-23 2024-06-27 Agc株式会社 反射パネル、電磁波反射装置、及び電磁波反射フェンス

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3264402A (en) * 1962-09-24 1966-08-02 North American Aviation Inc Multilayer printed-wiring boards
GB8531830D0 (en) * 1985-12-30 1986-02-05 Davies H J Photo fabrication
FR2596230B1 (fr) * 1986-03-19 1988-07-08 Aerospatiale Procede pour la realisation de motifs electriquement conducteurs sur une surface non developpable d'un substrat isolant, outil pour la mise en oeuvre du procede et dispositif obtenu
IT1195120B (it) * 1986-08-04 1988-10-12 Cselt Centro Studi Lab Telecom Procedimento per la fabbricazione di strutture dicroiche d antenna
US4842677A (en) * 1988-02-05 1989-06-27 General Electric Company Excimer laser patterning of a novel resist using masked and maskless process steps
JP3361556B2 (ja) * 1992-09-25 2003-01-07 日本メクトロン株式会社 回路配線パタ−ンの形成法
US5364493A (en) * 1993-05-06 1994-11-15 Litel Instruments Apparatus and process for the production of fine line metal traces
DE69418698T2 (de) * 1994-04-14 1999-10-07 Hewlett-Packard Gmbh Verfahren zur Herstellung von Leiterplatten
EP0787558B1 (de) * 1995-08-24 2001-12-19 Kabushiki Kaisha Toshiba Herstellungsverfahren eines Reflektors

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2006090050A1 *

Also Published As

Publication number Publication date
US7721426B2 (en) 2010-05-25
US20080210456A1 (en) 2008-09-04
WO2006090050A1 (fr) 2006-08-31
FR2882490B1 (fr) 2009-04-24
FR2882490A1 (fr) 2006-08-25

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