FR2882490B1 - Procede pour la realisation de motifs electriquement conducteurs sur une surface non developpable d'un substrat isolant, et dispositif obtenu - Google Patents

Procede pour la realisation de motifs electriquement conducteurs sur une surface non developpable d'un substrat isolant, et dispositif obtenu

Info

Publication number
FR2882490B1
FR2882490B1 FR0501815A FR0501815A FR2882490B1 FR 2882490 B1 FR2882490 B1 FR 2882490B1 FR 0501815 A FR0501815 A FR 0501815A FR 0501815 A FR0501815 A FR 0501815A FR 2882490 B1 FR2882490 B1 FR 2882490B1
Authority
FR
France
Prior art keywords
electrically conductive
insulating substrate
conductive patterns
device obtained
developable surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0501815A
Other languages
English (en)
Other versions
FR2882490A1 (fr
Inventor
Christian Desagulier
Alain Lacombe
Bruno Esmiller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EADS Space Transportation SA
Original Assignee
EADS Space Transportation SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EADS Space Transportation SA filed Critical EADS Space Transportation SA
Priority to FR0501815A priority Critical patent/FR2882490B1/fr
Priority to US11/815,447 priority patent/US7721426B2/en
Priority to EP06709341A priority patent/EP1852002A1/fr
Priority to PCT/FR2006/000373 priority patent/WO2006090050A1/fr
Publication of FR2882490A1 publication Critical patent/FR2882490A1/fr
Application granted granted Critical
Publication of FR2882490B1 publication Critical patent/FR2882490B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q15/00Devices for reflection, refraction, diffraction or polarisation of waves radiated from an antenna, e.g. quasi-optical devices
    • H01Q15/14Reflecting surfaces; Equivalent structures
    • H01Q15/141Apparatus or processes specially adapted for manufacturing reflecting surfaces
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0284Details of three-dimensional rigid printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09018Rigid curved substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107Using laser light
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0026Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0073Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces
    • H05K3/0082Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces characterised by the exposure method of radiation-sensitive masks
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49156Manufacturing circuit on or in base with selective destruction of conductive paths
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49165Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
FR0501815A 2005-02-23 2005-02-23 Procede pour la realisation de motifs electriquement conducteurs sur une surface non developpable d'un substrat isolant, et dispositif obtenu Expired - Fee Related FR2882490B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR0501815A FR2882490B1 (fr) 2005-02-23 2005-02-23 Procede pour la realisation de motifs electriquement conducteurs sur une surface non developpable d'un substrat isolant, et dispositif obtenu
US11/815,447 US7721426B2 (en) 2005-02-23 2006-02-20 Method of producing electrically conductive patterns on a substrate
EP06709341A EP1852002A1 (fr) 2005-02-23 2006-02-20 Procede pour la realisation de motifs electriquement conducteurs sur une surface non developpable d'un substrat isolant, et dispositif obtenu
PCT/FR2006/000373 WO2006090050A1 (fr) 2005-02-23 2006-02-20 Procede pour la realisation de motifs electriquement conducteurs sur une surface non developpable d'un substrat isolant, et dispositif obtenu

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0501815A FR2882490B1 (fr) 2005-02-23 2005-02-23 Procede pour la realisation de motifs electriquement conducteurs sur une surface non developpable d'un substrat isolant, et dispositif obtenu

Publications (2)

Publication Number Publication Date
FR2882490A1 FR2882490A1 (fr) 2006-08-25
FR2882490B1 true FR2882490B1 (fr) 2009-04-24

Family

ID=35115937

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0501815A Expired - Fee Related FR2882490B1 (fr) 2005-02-23 2005-02-23 Procede pour la realisation de motifs electriquement conducteurs sur une surface non developpable d'un substrat isolant, et dispositif obtenu

Country Status (4)

Country Link
US (1) US7721426B2 (fr)
EP (1) EP1852002A1 (fr)
FR (1) FR2882490B1 (fr)
WO (1) WO2006090050A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8868809B2 (en) * 2009-11-30 2014-10-21 Lsi Corporation Interrupt queuing in a media controller architecture
US10516216B2 (en) 2018-01-12 2019-12-24 Eagle Technology, Llc Deployable reflector antenna system
US10707552B2 (en) 2018-08-21 2020-07-07 Eagle Technology, Llc Folded rib truss structure for reflector antenna with zero over stretch

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3264402A (en) * 1962-09-24 1966-08-02 North American Aviation Inc Multilayer printed-wiring boards
GB8531830D0 (en) * 1985-12-30 1986-02-05 Davies H J Photo fabrication
FR2596230B1 (fr) 1986-03-19 1988-07-08 Aerospatiale Procede pour la realisation de motifs electriquement conducteurs sur une surface non developpable d'un substrat isolant, outil pour la mise en oeuvre du procede et dispositif obtenu
IT1195120B (it) * 1986-08-04 1988-10-12 Cselt Centro Studi Lab Telecom Procedimento per la fabbricazione di strutture dicroiche d antenna
US4842677A (en) * 1988-02-05 1989-06-27 General Electric Company Excimer laser patterning of a novel resist using masked and maskless process steps
JP3361556B2 (ja) * 1992-09-25 2003-01-07 日本メクトロン株式会社 回路配線パタ−ンの形成法
US5364493A (en) * 1993-05-06 1994-11-15 Litel Instruments Apparatus and process for the production of fine line metal traces
DE69418698T2 (de) * 1994-04-14 1999-10-07 Hewlett Packard Gmbh Verfahren zur Herstellung von Leiterplatten
EP0787558B1 (fr) * 1995-08-24 2001-12-19 Kabushiki Kaisha Toshiba Méthode de fabrication d'un réflecteur

Also Published As

Publication number Publication date
WO2006090050A1 (fr) 2006-08-31
US20080210456A1 (en) 2008-09-04
US7721426B2 (en) 2010-05-25
FR2882490A1 (fr) 2006-08-25
EP1852002A1 (fr) 2007-11-07

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Effective date: 20181031