EP1787394A4 - Procede, appareil et produit de programme informatique de discriminateur de repliement pour interfaces codeur - Google Patents

Procede, appareil et produit de programme informatique de discriminateur de repliement pour interfaces codeur

Info

Publication number
EP1787394A4
EP1787394A4 EP05786138A EP05786138A EP1787394A4 EP 1787394 A4 EP1787394 A4 EP 1787394A4 EP 05786138 A EP05786138 A EP 05786138A EP 05786138 A EP05786138 A EP 05786138A EP 1787394 A4 EP1787394 A4 EP 1787394A4
Authority
EP
European Patent Office
Prior art keywords
phase
iteration
output
velocity
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05786138A
Other languages
German (de)
English (en)
Other versions
EP1787394A2 (fr
Inventor
Zachary Buckner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Virginia UVA
University of Virginia Patent Foundation
Original Assignee
University of Virginia UVA
University of Virginia Patent Foundation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University of Virginia UVA, University of Virginia Patent Foundation filed Critical University of Virginia UVA
Publication of EP1787394A2 publication Critical patent/EP1787394A2/fr
Publication of EP1787394A4 publication Critical patent/EP1787394A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • G01D5/244—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing characteristics of pulses or pulse trains; generating pulses or pulse trains
    • G01D5/24471—Error correction
    • G01D5/24476—Signal processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0626—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by filtering
    • H03M1/0629—Anti-aliasing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/48—Servo-type converters

Definitions

  • Encoders translate rotary or linear motion into electrical signals. These- signals typically undergo several processing stages by the encoder interface before they are interpreted by control and measurement systems. The first stage within the encoder interface typically translates the sinusoidal signals into an instantaneous phase angle, modulo 2 ⁇ :
  • pos represents the instantaneous position to be measured
  • interval represents the encoder distance that corresponds to a complete sinusoid period.
  • the modulo limitation stems from the periodic nature of sinusoidal signals generated by the encoder.
  • encoder signals are sampled with digital-to-analog converters, and a calculation is produced at regular time intervals At .
  • the second stage of the encoder interface typically tracks the instantaneous modulo phase angle in Equation 1 to produce an absolute phase, which is linearly related to the position:
  • Equations 11 and 3 will correctly track absolute phase at sufficiently low angular velocities. However, since the angular difference operator can only produce values inside the range [- w[t] is constrained as
  • Various embodiments of the present invention include, but are not limited thereto, an improved encoder interface component, able to track absolute position at higher encoder velocities without aliasing.
  • the device and related apparatus, method and computer program product can perform this operation without loss of precision or accuracy.
  • ⁇ [t - 1] , ⁇ m ⁇ t - 1] and w[t - 1] are known, as they are the stored results from the previous iteration, and ⁇ m [t] is measured.
  • the new algorithm uses the angular difference between the predicted phase, labeled ⁇ predicted , and the actual phase, labeled ⁇ m [t], to determine a[t], a step factor due to acceleration.
  • the difference represents the change in position that is in excess of the predicted change, where the predicted change is based on the velocity from the previous iteration. In other words, the change in position for the current iteration is equal to the change in position for the previous iteration plus a[n], a measurable step factor due to acceleration.
  • An aspect of an embodiment of the present invention system provides for detecting motion from a sensor interface.
  • the system comprising: a signal acquisition means for acquiring an instantaneous phase during each iteration received from the sensor interface; a phase register means for holding the instantaneous phase from the previous iteration that is acquired by the signal acquisition means; an output register means for holding the instantaneous angular velocity output from the previous iteration that is acquired by the signal acquisition means; a phase predictor means for predicting a phase that will result from the current sensing iteration; a phase subtracter means for determining amount of angular movement for the current iteration relative to the predicted phased angle; an overflow corrector means for correcting erroneous overflow/underflow condition; and a final adder means for computing total velocity for the current iteration.
  • An aspect of an embodiment of the present invention method provides for detecting motion from a sensor interface.
  • the method comprising: acquiring an instantaneous phase received from the interface; holding the instantaneous phase acquired by the acquisition step for the current iteration; holding the instantaneous phase acquired by the acquisition step for the previous iteration; holding the computed velocity output from the previous iteration; predicting a phase that will result from the current sensing iteration; determining amount of angular movement for the current iteration relative to the predicted phased angle; correcting possible overflow/ underflow conditions; and computing output velocity for the current iteration relative to the position for the previous iteration.
  • An aspect of an embodiment of the present invention computer program product comprises a computer useable medium having computer program logic for enabling at least one processor in communication with an interface motion detection system.
  • the computer program logic comprising: acquiring an instantaneous phase received from the interface system; holding the instantaneous phase acquired by the acquisition step for the current iteration; holding the instantaneous phase acquired by the acquisition step for the previous iteration; holding the computed velocity output from the previous iteration; predicting a phase that will result from the current sensing iteration; determining amount of angular movement for the current iteration relative to the predicted phased angle; correcting possible overflow/underflow conditions; and computing output velocity for the current iteration relative to the position for the previous iteration.
  • Figure 1 is a schematic diagram, showing an interface and the signal processing components of an embodiment of the present invention in block form.
  • the various embodiments of the present invention provide for, but are not limited thereto, an improved encoder interface system, able to track absolute position at higher encoder velocities without aliasing (as well as operating at slower velocities if desired).
  • the device and related apparatus, method and computer program product can perform this operation without loss of precision or accuracy.
  • the improved encoder interface system can predict the phase angle of the signal for each sampling iteration and then measure the angular difference between the predicted phase angle and the actual, measured phase angle to account for acceleration. The predictive capacity of the system thereby minimizes the problem of aliasing.
  • an embodiment of the present invention may comprise software, running on a computer or the like with analog-to-digital conversion circuitry, sampling data from its input.
  • An embodiment of the present invention may comprise software, running on a microcontroller or digital signal processor with analog-to-digital conversion circuitry, sampling data from its input.
  • An embodiment of the present invention may comprise discrete digital electronic components including an analog-to-digital converter. These components would be controlled using a field programmable gate array (or other programmable digital logic device like a PAL or PLC), sampling data from its input.
  • An embodiment of the present invention may comprise discrete analog electronic components. These components would be controlled using a field programmable gate array (or other programmable digital logic device like a PAL or PLC), sampling data from its input.
  • the input may be received from any one of or any combination of the following: i) linear encoder, ⁇ ) rotary encoder, ⁇ i) stroboscope with imaging circuitry, iv) interferometer, v) other sensor with quadrature output or other devices sensing position, angle and/ or displacement (or any combination of sensing position, angle and/ or displacement).
  • An embodiment of the present invention device may include the following parts, which correspond to elements in the exemplary System Diagram in Figure 1.
  • This signal 12 represents the instantaneous phase of the encoder 10. It is assumed to be an unsigned discrete signal with values ranging from about 0 to ⁇ resolution — 1), where the variable resolution is an arbitrary constant that will be referenced throughout the document. Other analog or digital signals could be simply converted to this format through the use of analog to digital converters and linear scaling.
  • the instantaneous phase at time step n is indicated as # tine,!/], and referenced as 14, in Figure 1.
  • the digital controller 16 (or other select type of controller) manages the flow-of- control for all of the components in the System Diagram, as it connects to each component or select components of the system 2.
  • the controller may include an MSP430 Mixed Signal Processor manufactured by Texas Instruments.
  • MSP430 Mixed Signal Processor manufactured by Texas Instruments.
  • Texas Instruments it should be appreciated that many other configurations are possible.
  • One promising alternative is to make some or all of the components within the box separate, discrete components, and to control the flow-of- control using a finite state machine on an FPGA.
  • the output 20 of the phase register 18 holds the phase value from the previous discrete time step.
  • the triggering of this component is timed by the digital controller 16. If implemented as separate digital logic components, this component may consist of two registers in series (the first stage to keep the input signal from changing during a single iteration, and the second stage to maintain die phase from the previous iteration).
  • the output 20 of the phase register is labeled ⁇ m ⁇ in Figure 1.
  • the output 22 of the phase register 23 holds the output value from the previous time step.
  • the triggering of this component is timed by the digital controller 16. If implemented as separate digital logic components, this component may consist of two registers in series (the first stage to keep the input signal from changing during a single iteration, and the second stage to maintain the phase from the previous iteration).
  • the output 20 of the phase register is labeled w[t-1] in Figure 1.
  • the phase predictor 25 uses the phase from the previous iteration, ⁇ m - 1], and the total movement from the previous iteration, w[t-l], as referenced as 22, to predict the phase that will result from the current sensing iteration (i.e., the computed ⁇ predicted [t] , as referenced as 28, which shall be discussed below).
  • the phase predictor consists of an adder 24 and a modulo division unit 26, and yields the following behavior indicated in Equation 13, i.e., ⁇ p r edi cted ⁇ ⁇ a s referenced as 28.
  • This phase subtractor component 30 determines the amount of angular movement for the current iteration, relative to the predicted phase angle. This movement is simply the difference between the actual phase value, ⁇ m [t], and the phase value for the phase predictor, ⁇ predicted The resulting digital output from this component is the signal labeled m z,. as referenced as 32, in Figure 1.
  • Phase angle transitions from about 359° to about 0° or from about 0° to about 359° yield an apparent movement of about —359° or about 359°, respectively, though an actual movement of only about 1° or about —1°, respectively.
  • the following technique as provided by the overflow corrector 34 corrects this type of erroneous overflow/underflow condition:
  • phase subtracter 30 and the overflow corrector 34 implement the "angular difference function.”
  • the final adder 38 in Figure 1 is used to compute w[t], as referenced as 40, which is proportional to velocity for the current iteration.
  • the operation parallels Equation 11.
  • the counter 42 is a register-based component that counts w[t] values for successive iterations. This operation parallels Equation 10. This counter 42 produces the system output 44 for the invention, and represents the absolute phase.
  • deltaDeltaPos currentPhase - predictedPhase
  • the method of present invention may be implemented using hardware, software or a combination thereof and may be implemented in one (or with) or more computer systems, processors, controllers or other processing systems.
  • the computer system may include a display interface that forwards graphics, text, and other data from the communication infrastructure.
  • the computer system also includes a main memory, preferably random access memory (RAM), and may also include a secondary memory.
  • the secondary memory may include, for example, a hard disk drive and/or a removable storage drive, representing a floppy disk drive, a magnetic tape drive, an optical disk drive, a flash memory etc.
  • the removable storage drive reads from and/ or writes to a removable storage unit in a well known manner.
  • Removable storage unit represents a floppy disk, magnetic tape, optical disk, etc. which is read by and written to by removable storage drive.
  • the removable storage unit includes a computer usable storage medium having stored therein computer software and/or data.
  • secondary memory may include other means for allowing computer programs or other instructions to be loaded into computer system.
  • Such means may include, for example, a removable storage unit and an interface. Examples of such removable storage units/interfaces include a program cartridge and cartridge interface (such as that found in video game devices), a removable memory chip (such as a ROM, PROM, EPROM or EEPROM) and associated socket, and other removable storage units and interfaces which allow software and data to be transferred from the removable storage unit to computer system.
  • Computer system may also include a communications interface.
  • Communications interface allows software and data to be transferred between computer system and external devices. Examples of communications interface may include a modem, a network interface (such as an Ethernet card), a serial or parallel communications port, a PCMCIA slot and card, a modem etc.
  • Software and data transferred via communications interface are in the form of signals, which may be electronic, electromagnetic, optical or other signals capable of being received by communications interface. Signals are provided to communications interface via a communications path (Le., channel).
  • a channel (or any other communication means or channel disclosed herein) carries signals and may be implemented using wire or cable, fiber optics, a phone line, a cellular phone link, an RF link, an infrared link and other communications channels.
  • computer program medium and “computer usable medium” are used to generally refer to media such as removable storage drive, a hard disk installed in hard disk drive, and signals.
  • These computer program products are means for providing software to computer system.
  • the various embodiments of the present invention include such computer program products.
  • Computer programs also called computer control logic
  • Computer programs are stored in main memory and/ or secondary memory. Computer programs may also be received via communications interface. Such computer programs, when executed, enable computer system to perform the features of the present invention as discussed herein. In particular, the computer programs, when executed, enable processor to perform the functions of the present invention. Accordingly, such computer programs represent controllers of computer system.
  • the software may be stored in a computer program product and loaded into computer system using removable storage drive, hard drive or communications interface.
  • the control logic (software), when executed by the processor, causes the processor to perform the functions of the invention as described herein.
  • the invention may be implemented primarily in hardware using, for example, hardware components such as application specific integrated circuits (ASICs). Implementation of the hardware state machine to perform the functions described herein will be apparent to persons skilled in the relevant art(s).
  • the invention is implemented using a combination of both hardware and software.
  • the methods described above may be implemented in various programs and programming language known to those skilled in the art.
  • any activity can be repeated, any activity can be performed by multiple entities, and/ or any element can be duplicated. Further, any activity or element can be excluded, the sequence of activities can vary, and/ or the interrelationship of elements can vary. Unless clearly specified to the contrary, there is no requirement for any particular described or illustrated activity or element, any particular sequence or such activities, any particular size, speed, material, dimension or frequency, or any particularly interrelationship of such elements. Accordingly, the descriptions and drawings are to be regarded as illustrative in nature, and not as restrictive. Moreover, when any number or range is described herein, unless clearly stated otherwise, that number or range is approximate. When any range is described herein, unless clearly stated otherwise, that range includes all values therein and all sub ranges therein.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Transmission And Conversion Of Sensor Element Output (AREA)
  • Magnetic Resonance Imaging Apparatus (AREA)

Abstract

L'invention concerne un système d'interface codeur amélioré, capable de repérer une position absolue à des vitesses de codage élevées sans repliement. Le dispositif et l'appareil connexe, le procédé et le produit de programme informatique peuvent exécuter cette opération sans perte de précision ou d'exactitude. Ledit système d'interface codeur amélioré peut prédire le déphasage du signal pour chaque itération d'échantillonnage, puis mesurer la différence angulaire entre le déphasage prédit et le déphasage réel pour tenir compte de l'accélération. La capacité prédictive du système minimise ainsi le problème du repliement. Il en résulte que le repliement ne surviendra que lorsque l'accélération de l'objet observé dépasse un certain seuil qui, comme la fréquence de Nyquist, est fonction de la vitesse d'échantillonnage du composant d'acquisition de signaux. A souligner que, dans la plupart des applications, cette limite d'accélération dépasse largement toutes les accélérations possibles que le système subira.
EP05786138A 2004-08-12 2005-08-12 Procede, appareil et produit de programme informatique de discriminateur de repliement pour interfaces codeur Withdrawn EP1787394A4 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US60104304P 2004-08-12 2004-08-12
PCT/US2005/028942 WO2006020963A2 (fr) 2004-08-12 2005-08-12 Procede, appareil et produit de programme informatique de discriminateur de repliement pour interfaces codeur

Publications (2)

Publication Number Publication Date
EP1787394A2 EP1787394A2 (fr) 2007-05-23
EP1787394A4 true EP1787394A4 (fr) 2008-07-16

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EP05786138A Withdrawn EP1787394A4 (fr) 2004-08-12 2005-08-12 Procede, appareil et produit de programme informatique de discriminateur de repliement pour interfaces codeur

Country Status (4)

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EP (1) EP1787394A4 (fr)
JP (1) JP2008510148A (fr)
CA (1) CA2576857A1 (fr)
WO (1) WO2006020963A2 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0840096A1 (fr) * 1996-10-29 1998-05-06 Mitutoyo Corporation Circuit d'interpolation d'un codeur
US6167108A (en) * 1998-03-03 2000-12-26 Nec Corporation Method of processing signals of encoders and apparatus employing the same
US6518897B1 (en) * 2001-08-29 2003-02-11 Trw Inc. Angle quantization using log division

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6630659B1 (en) 1994-06-01 2003-10-07 Stridsberg Innovation Ab Position transducer
FR2792403B1 (fr) 1999-04-14 2001-05-25 Roulements Soc Nouvelle Capteur de position et/ou de deplacement comportant une pluralite d'elements sensibles alignes
US6518756B1 (en) * 2001-06-14 2003-02-11 Halliburton Energy Services, Inc. Systems and methods for determining motion tool parameters in borehole logging
US6556153B1 (en) 2002-01-09 2003-04-29 Anorad Corporation System and method for improving encoder resolution

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0840096A1 (fr) * 1996-10-29 1998-05-06 Mitutoyo Corporation Circuit d'interpolation d'un codeur
US6167108A (en) * 1998-03-03 2000-12-26 Nec Corporation Method of processing signals of encoders and apparatus employing the same
US6518897B1 (en) * 2001-08-29 2003-02-11 Trw Inc. Angle quantization using log division

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2006020963A2 *

Also Published As

Publication number Publication date
JP2008510148A (ja) 2008-04-03
WO2006020963A3 (fr) 2006-06-08
CA2576857A1 (fr) 2006-02-23
EP1787394A2 (fr) 2007-05-23
WO2006020963A2 (fr) 2006-02-23

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