EP1787394A4 - Method, apparatus and computer program product of aliasing discriminator for encoder interfaces - Google Patents

Method, apparatus and computer program product of aliasing discriminator for encoder interfaces

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Publication number
EP1787394A4
EP1787394A4 EP05786138A EP05786138A EP1787394A4 EP 1787394 A4 EP1787394 A4 EP 1787394A4 EP 05786138 A EP05786138 A EP 05786138A EP 05786138 A EP05786138 A EP 05786138A EP 1787394 A4 EP1787394 A4 EP 1787394A4
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EP
European Patent Office
Prior art keywords
phase
iteration
output
velocity
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05786138A
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German (de)
French (fr)
Other versions
EP1787394A2 (en
Inventor
Zachary Buckner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Virginia UVA
University of Virginia Patent Foundation
Original Assignee
University of Virginia UVA
University of Virginia Patent Foundation
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Application filed by University of Virginia UVA, University of Virginia Patent Foundation filed Critical University of Virginia UVA
Publication of EP1787394A2 publication Critical patent/EP1787394A2/en
Publication of EP1787394A4 publication Critical patent/EP1787394A4/en
Withdrawn legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01DMEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D5/00Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • G01D5/244Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing characteristics of pulses or pulse trains; generating pulses or pulse trains
    • G01D5/24471Error correction
    • G01D5/24476Signal processing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0626Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by filtering
    • H03M1/0629Anti-aliasing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/48Servo-type converters

Definitions

  • Encoders translate rotary or linear motion into electrical signals. These- signals typically undergo several processing stages by the encoder interface before they are interpreted by control and measurement systems. The first stage within the encoder interface typically translates the sinusoidal signals into an instantaneous phase angle, modulo 2 ⁇ :
  • pos represents the instantaneous position to be measured
  • interval represents the encoder distance that corresponds to a complete sinusoid period.
  • the modulo limitation stems from the periodic nature of sinusoidal signals generated by the encoder.
  • encoder signals are sampled with digital-to-analog converters, and a calculation is produced at regular time intervals At .
  • the second stage of the encoder interface typically tracks the instantaneous modulo phase angle in Equation 1 to produce an absolute phase, which is linearly related to the position:
  • Equations 11 and 3 will correctly track absolute phase at sufficiently low angular velocities. However, since the angular difference operator can only produce values inside the range [- w[t] is constrained as
  • Various embodiments of the present invention include, but are not limited thereto, an improved encoder interface component, able to track absolute position at higher encoder velocities without aliasing.
  • the device and related apparatus, method and computer program product can perform this operation without loss of precision or accuracy.
  • ⁇ [t - 1] , ⁇ m ⁇ t - 1] and w[t - 1] are known, as they are the stored results from the previous iteration, and ⁇ m [t] is measured.
  • the new algorithm uses the angular difference between the predicted phase, labeled ⁇ predicted , and the actual phase, labeled ⁇ m [t], to determine a[t], a step factor due to acceleration.
  • the difference represents the change in position that is in excess of the predicted change, where the predicted change is based on the velocity from the previous iteration. In other words, the change in position for the current iteration is equal to the change in position for the previous iteration plus a[n], a measurable step factor due to acceleration.
  • An aspect of an embodiment of the present invention system provides for detecting motion from a sensor interface.
  • the system comprising: a signal acquisition means for acquiring an instantaneous phase during each iteration received from the sensor interface; a phase register means for holding the instantaneous phase from the previous iteration that is acquired by the signal acquisition means; an output register means for holding the instantaneous angular velocity output from the previous iteration that is acquired by the signal acquisition means; a phase predictor means for predicting a phase that will result from the current sensing iteration; a phase subtracter means for determining amount of angular movement for the current iteration relative to the predicted phased angle; an overflow corrector means for correcting erroneous overflow/underflow condition; and a final adder means for computing total velocity for the current iteration.
  • An aspect of an embodiment of the present invention method provides for detecting motion from a sensor interface.
  • the method comprising: acquiring an instantaneous phase received from the interface; holding the instantaneous phase acquired by the acquisition step for the current iteration; holding the instantaneous phase acquired by the acquisition step for the previous iteration; holding the computed velocity output from the previous iteration; predicting a phase that will result from the current sensing iteration; determining amount of angular movement for the current iteration relative to the predicted phased angle; correcting possible overflow/ underflow conditions; and computing output velocity for the current iteration relative to the position for the previous iteration.
  • An aspect of an embodiment of the present invention computer program product comprises a computer useable medium having computer program logic for enabling at least one processor in communication with an interface motion detection system.
  • the computer program logic comprising: acquiring an instantaneous phase received from the interface system; holding the instantaneous phase acquired by the acquisition step for the current iteration; holding the instantaneous phase acquired by the acquisition step for the previous iteration; holding the computed velocity output from the previous iteration; predicting a phase that will result from the current sensing iteration; determining amount of angular movement for the current iteration relative to the predicted phased angle; correcting possible overflow/underflow conditions; and computing output velocity for the current iteration relative to the position for the previous iteration.
  • Figure 1 is a schematic diagram, showing an interface and the signal processing components of an embodiment of the present invention in block form.
  • the various embodiments of the present invention provide for, but are not limited thereto, an improved encoder interface system, able to track absolute position at higher encoder velocities without aliasing (as well as operating at slower velocities if desired).
  • the device and related apparatus, method and computer program product can perform this operation without loss of precision or accuracy.
  • the improved encoder interface system can predict the phase angle of the signal for each sampling iteration and then measure the angular difference between the predicted phase angle and the actual, measured phase angle to account for acceleration. The predictive capacity of the system thereby minimizes the problem of aliasing.
  • an embodiment of the present invention may comprise software, running on a computer or the like with analog-to-digital conversion circuitry, sampling data from its input.
  • An embodiment of the present invention may comprise software, running on a microcontroller or digital signal processor with analog-to-digital conversion circuitry, sampling data from its input.
  • An embodiment of the present invention may comprise discrete digital electronic components including an analog-to-digital converter. These components would be controlled using a field programmable gate array (or other programmable digital logic device like a PAL or PLC), sampling data from its input.
  • An embodiment of the present invention may comprise discrete analog electronic components. These components would be controlled using a field programmable gate array (or other programmable digital logic device like a PAL or PLC), sampling data from its input.
  • the input may be received from any one of or any combination of the following: i) linear encoder, ⁇ ) rotary encoder, ⁇ i) stroboscope with imaging circuitry, iv) interferometer, v) other sensor with quadrature output or other devices sensing position, angle and/ or displacement (or any combination of sensing position, angle and/ or displacement).
  • An embodiment of the present invention device may include the following parts, which correspond to elements in the exemplary System Diagram in Figure 1.
  • This signal 12 represents the instantaneous phase of the encoder 10. It is assumed to be an unsigned discrete signal with values ranging from about 0 to ⁇ resolution — 1), where the variable resolution is an arbitrary constant that will be referenced throughout the document. Other analog or digital signals could be simply converted to this format through the use of analog to digital converters and linear scaling.
  • the instantaneous phase at time step n is indicated as # tine,!/], and referenced as 14, in Figure 1.
  • the digital controller 16 (or other select type of controller) manages the flow-of- control for all of the components in the System Diagram, as it connects to each component or select components of the system 2.
  • the controller may include an MSP430 Mixed Signal Processor manufactured by Texas Instruments.
  • MSP430 Mixed Signal Processor manufactured by Texas Instruments.
  • Texas Instruments it should be appreciated that many other configurations are possible.
  • One promising alternative is to make some or all of the components within the box separate, discrete components, and to control the flow-of- control using a finite state machine on an FPGA.
  • the output 20 of the phase register 18 holds the phase value from the previous discrete time step.
  • the triggering of this component is timed by the digital controller 16. If implemented as separate digital logic components, this component may consist of two registers in series (the first stage to keep the input signal from changing during a single iteration, and the second stage to maintain die phase from the previous iteration).
  • the output 20 of the phase register is labeled ⁇ m ⁇ in Figure 1.
  • the output 22 of the phase register 23 holds the output value from the previous time step.
  • the triggering of this component is timed by the digital controller 16. If implemented as separate digital logic components, this component may consist of two registers in series (the first stage to keep the input signal from changing during a single iteration, and the second stage to maintain the phase from the previous iteration).
  • the output 20 of the phase register is labeled w[t-1] in Figure 1.
  • the phase predictor 25 uses the phase from the previous iteration, ⁇ m - 1], and the total movement from the previous iteration, w[t-l], as referenced as 22, to predict the phase that will result from the current sensing iteration (i.e., the computed ⁇ predicted [t] , as referenced as 28, which shall be discussed below).
  • the phase predictor consists of an adder 24 and a modulo division unit 26, and yields the following behavior indicated in Equation 13, i.e., ⁇ p r edi cted ⁇ ⁇ a s referenced as 28.
  • This phase subtractor component 30 determines the amount of angular movement for the current iteration, relative to the predicted phase angle. This movement is simply the difference between the actual phase value, ⁇ m [t], and the phase value for the phase predictor, ⁇ predicted The resulting digital output from this component is the signal labeled m z,. as referenced as 32, in Figure 1.
  • Phase angle transitions from about 359° to about 0° or from about 0° to about 359° yield an apparent movement of about —359° or about 359°, respectively, though an actual movement of only about 1° or about —1°, respectively.
  • the following technique as provided by the overflow corrector 34 corrects this type of erroneous overflow/underflow condition:
  • phase subtracter 30 and the overflow corrector 34 implement the "angular difference function.”
  • the final adder 38 in Figure 1 is used to compute w[t], as referenced as 40, which is proportional to velocity for the current iteration.
  • the operation parallels Equation 11.
  • the counter 42 is a register-based component that counts w[t] values for successive iterations. This operation parallels Equation 10. This counter 42 produces the system output 44 for the invention, and represents the absolute phase.
  • deltaDeltaPos currentPhase - predictedPhase
  • the method of present invention may be implemented using hardware, software or a combination thereof and may be implemented in one (or with) or more computer systems, processors, controllers or other processing systems.
  • the computer system may include a display interface that forwards graphics, text, and other data from the communication infrastructure.
  • the computer system also includes a main memory, preferably random access memory (RAM), and may also include a secondary memory.
  • the secondary memory may include, for example, a hard disk drive and/or a removable storage drive, representing a floppy disk drive, a magnetic tape drive, an optical disk drive, a flash memory etc.
  • the removable storage drive reads from and/ or writes to a removable storage unit in a well known manner.
  • Removable storage unit represents a floppy disk, magnetic tape, optical disk, etc. which is read by and written to by removable storage drive.
  • the removable storage unit includes a computer usable storage medium having stored therein computer software and/or data.
  • secondary memory may include other means for allowing computer programs or other instructions to be loaded into computer system.
  • Such means may include, for example, a removable storage unit and an interface. Examples of such removable storage units/interfaces include a program cartridge and cartridge interface (such as that found in video game devices), a removable memory chip (such as a ROM, PROM, EPROM or EEPROM) and associated socket, and other removable storage units and interfaces which allow software and data to be transferred from the removable storage unit to computer system.
  • Computer system may also include a communications interface.
  • Communications interface allows software and data to be transferred between computer system and external devices. Examples of communications interface may include a modem, a network interface (such as an Ethernet card), a serial or parallel communications port, a PCMCIA slot and card, a modem etc.
  • Software and data transferred via communications interface are in the form of signals, which may be electronic, electromagnetic, optical or other signals capable of being received by communications interface. Signals are provided to communications interface via a communications path (Le., channel).
  • a channel (or any other communication means or channel disclosed herein) carries signals and may be implemented using wire or cable, fiber optics, a phone line, a cellular phone link, an RF link, an infrared link and other communications channels.
  • computer program medium and “computer usable medium” are used to generally refer to media such as removable storage drive, a hard disk installed in hard disk drive, and signals.
  • These computer program products are means for providing software to computer system.
  • the various embodiments of the present invention include such computer program products.
  • Computer programs also called computer control logic
  • Computer programs are stored in main memory and/ or secondary memory. Computer programs may also be received via communications interface. Such computer programs, when executed, enable computer system to perform the features of the present invention as discussed herein. In particular, the computer programs, when executed, enable processor to perform the functions of the present invention. Accordingly, such computer programs represent controllers of computer system.
  • the software may be stored in a computer program product and loaded into computer system using removable storage drive, hard drive or communications interface.
  • the control logic (software), when executed by the processor, causes the processor to perform the functions of the invention as described herein.
  • the invention may be implemented primarily in hardware using, for example, hardware components such as application specific integrated circuits (ASICs). Implementation of the hardware state machine to perform the functions described herein will be apparent to persons skilled in the relevant art(s).
  • the invention is implemented using a combination of both hardware and software.
  • the methods described above may be implemented in various programs and programming language known to those skilled in the art.
  • any activity can be repeated, any activity can be performed by multiple entities, and/ or any element can be duplicated. Further, any activity or element can be excluded, the sequence of activities can vary, and/ or the interrelationship of elements can vary. Unless clearly specified to the contrary, there is no requirement for any particular described or illustrated activity or element, any particular sequence or such activities, any particular size, speed, material, dimension or frequency, or any particularly interrelationship of such elements. Accordingly, the descriptions and drawings are to be regarded as illustrative in nature, and not as restrictive. Moreover, when any number or range is described herein, unless clearly stated otherwise, that number or range is approximate. When any range is described herein, unless clearly stated otherwise, that range includes all values therein and all sub ranges therein.

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Abstract

An improved encoder interface system, able to track absolute position at higher encoder velocities without aliasing. The device and related apparatus, method and computer program product can perform this operation without loss of precision or accuracy. The improved encoder interface system can predict the phase angle of the signal for each sampling iteration and then measure the angular difference between the predicted phase angle and the actual phase angle to account for acceleration. The predictive capacity of the system thereby minimizes the problem of aliasing. As a result of this technique, aliasing will only occur when the acceleration of the object being observed exceeds a certain threshold that, like the Nyquist frequency, is dependent on the sampling rate of the signal acquisition component. Importantly, in most applications, this acceleration limit greatly exceeds any possible acceleration that the system will undergo.

Description

Method, Apparatus and Computer Program Product of Aliasing Discriminator for Encoder Interfaces
Cross-references to Related Applications
The present application claims priority from U.S. Provisional Patent Application Serial No. 60/601,043, filed August 12, 2004, entitled "Method, Apparatus and Computer Program Product of Aliasing Discriminator for Encoder Interfaces," the disclosure of which is hereby incorporated by reference herein in its entirety.
The present Application is also related to PCT International Application No. PCT/US2004/039380, filed November 22, 2004, entitled "Method and System for Enhanced Resolution, Automatically-calibrated Position Sensor," the disclosure of which is hereby incorporated by reference herein in their entirety. The systems, methods and computer program products discussed herein may be utilized with the aforementioned PCT Application.
Background of the Invention
Encoders translate rotary or linear motion into electrical signals. These- signals typically undergo several processing stages by the encoder interface before they are interpreted by control and measurement systems. The first stage within the encoder interface typically translates the sinusoidal signals into an instantaneous phase angle, modulo 2π :
where pos represents the instantaneous position to be measured, and interval represents the encoder distance that corresponds to a complete sinusoid period. The modulo limitation stems from the periodic nature of sinusoidal signals generated by the encoder. In digital systems, encoder signals are sampled with digital-to-analog converters, and a calculation is produced at regular time intervals At . Thus, the discrete variable /takes on integer values 0, 1, 2, ... corresponding to the time instants 0 • At , I - At, 2 ■ At , ... The second stage of the encoder interface typically tracks the instantaneous modulo phase angle in Equation 1 to produce an absolute phase, which is linearly related to the position:
interval
A common approach for this second stage is to compare the difference between modulo phase values θm on successive time steps. Thus, at each time step, the following difference equations are evaluated:
where Z is the "apparent motion" angular difference operator defined as
and where θ\t\ and relate to encoder position and velocity as follows:
H nX -i interval
7 π π interval velocity \t \ = w \t x (7)
1 1 L J At - 2π W
The technique outlined in Equations 11 and 3 will correctly track absolute phase at sufficiently low angular velocities. However, since the angular difference operator can only produce values inside the range [- w[t] is constrained as
Thus, by applying this constraint to Equation 7, it becomes
(9) This inequality can be shown to identify the well-known Nyquist sampling frequency. In the case of a fixed sampling frequency (a technological limitation for circuits), this corresponds to a limited encoder velocity. If velocity exceeds this bound, a phenomenon known as aliasing'wiΑ. occur, causing erroneous results. Thus, the traditional method used for interfacing encoders has a severe drawback: limited operational speed.
Brief Summary of the Invention
Various embodiments of the present invention include, but are not limited thereto, an improved encoder interface component, able to track absolute position at higher encoder velocities without aliasing. The device and related apparatus, method and computer program product can perform this operation without loss of precision or accuracy.
As described in the Background above, existing encoder interfaces use a simple method to track absolute position that yields limited operational velocity. However, various embodiments of the present invention provide a new technique developed to overcome this limitation. The following difference equations describe aspects of the new approach:
ø[f]= ø[f -l]+ w[r] (10) w[/]= w[t -l]+ α[t] (11)
4]= 4θm[t]- θpredicted[t]) (12) θpredicteΛtλ = (θm{t -\-\ + w\t -ψ/o 2π , (13) subject to the initial conditions
0[O] = w[θ] = fl[θ]= O (14) where θm [t] is the measured phase input to the system, as described for Equation 1, and where 6>[/|,w[t], and a[t] axe calculated quantities that relate to encoder position, velocity, and acceleration as follows:
position^] = θ[t] x ΞL?HΞ_ ^15)
T π π interval velocιty[t\ = w[t\ x (16)
Δt - 2π
, . r i π interval acceleratιon\t\ - a[t\ x (17)
(Δt)2 • 2π
For each iteration, θ[t - 1] , θm \t - 1] and w[t - 1] are known, as they are the stored results from the previous iteration, and θm [t] is measured. The new algorithm uses the angular difference between the predicted phase, labeled θpredicted , and the actual phase, labeled θm[t], to determine a[t], a step factor due to acceleration. The difference represents the change in position that is in excess of the predicted change, where the predicted change is based on the velocity from the previous iteration. In other words, the change in position for the current iteration is equal to the change in position for the previous iteration plus a[n], a measurable step factor due to acceleration.
The same rationale that limits maximum velocity in the traditional encoder scheme (as described in Equations 8 and 9) can be applied to the new technique. However, under the new technique, the limited range of the angular difference function limits only
- π < a[t]< π (18)
By applying this constraint to Equation 17, it becomes:
Thus, the original velocity constraint has been replaced with an acceleration constraint. In most applications, this acceleration limit greatly exceeds any possible acceleration that the system could undergo.
An aspect of an embodiment of the present invention system provides for detecting motion from a sensor interface. The system comprising: a signal acquisition means for acquiring an instantaneous phase during each iteration received from the sensor interface; a phase register means for holding the instantaneous phase from the previous iteration that is acquired by the signal acquisition means; an output register means for holding the instantaneous angular velocity output from the previous iteration that is acquired by the signal acquisition means; a phase predictor means for predicting a phase that will result from the current sensing iteration; a phase subtracter means for determining amount of angular movement for the current iteration relative to the predicted phased angle; an overflow corrector means for correcting erroneous overflow/underflow condition; and a final adder means for computing total velocity for the current iteration.
An aspect of an embodiment of the present invention method provides for detecting motion from a sensor interface. The method comprising: acquiring an instantaneous phase received from the interface; holding the instantaneous phase acquired by the acquisition step for the current iteration; holding the instantaneous phase acquired by the acquisition step for the previous iteration; holding the computed velocity output from the previous iteration; predicting a phase that will result from the current sensing iteration; determining amount of angular movement for the current iteration relative to the predicted phased angle; correcting possible overflow/ underflow conditions; and computing output velocity for the current iteration relative to the position for the previous iteration.
An aspect of an embodiment of the present invention computer program product comprises a computer useable medium having computer program logic for enabling at least one processor in communication with an interface motion detection system. The computer program logic comprising: acquiring an instantaneous phase received from the interface system; holding the instantaneous phase acquired by the acquisition step for the current iteration; holding the instantaneous phase acquired by the acquisition step for the previous iteration; holding the computed velocity output from the previous iteration; predicting a phase that will result from the current sensing iteration; determining amount of angular movement for the current iteration relative to the predicted phased angle; correcting possible overflow/underflow conditions; and computing output velocity for the current iteration relative to the position for the previous iteration.
These and other aspects of the disclosed technology and systems, along with their advantages and features, will be made more apparent from the description, drawings and claims that follow.
Brief Description of the Drawings
The accompanying drawings, which are incorporated into and form a part of the instant specification, illustrate several aspects and embodiments of the present invention and, together with the description herein, serve to explain the principles of the invention. The drawings are provided only for the purpose of illustrating select embodiments of the invention and are not to be construed as limiting the invention.
Figure 1 is a schematic diagram, showing an interface and the signal processing components of an embodiment of the present invention in block form.
Detailed Description of the Invention
The various embodiments of the present invention provide for, but are not limited thereto, an improved encoder interface system, able to track absolute position at higher encoder velocities without aliasing (as well as operating at slower velocities if desired). The device and related apparatus, method and computer program product can perform this operation without loss of precision or accuracy. The improved encoder interface system can predict the phase angle of the signal for each sampling iteration and then measure the angular difference between the predicted phase angle and the actual, measured phase angle to account for acceleration. The predictive capacity of the system thereby minimizes the problem of aliasing. As a result of this technique, aliasing will only occur when the acceleration of the object being observed exceeds a certain threshold that, like the Nyquist frequency, is dependent on the sampling rate of the signal acquisition component. Importantly, in most applications, this acceleration limit greatly exceeds any possible acceleration that the system will undergo.
This section provides a detailed description of a hardware implementation of various embodiments of the present invention. A software implementation (along with the apparatus and method) is also possible, and is described in the next section. In addition to these alternatives, there is a wide variety of possible configurations. The various embodiments of the present invention could be integrated directly within an encoder housing, integrated within an encoder interface, built as a separate component, or implemented on a personal computer.
For example, an embodiment of the present invention may comprise software, running on a computer or the like with analog-to-digital conversion circuitry, sampling data from its input. An embodiment of the present invention may comprise software, running on a microcontroller or digital signal processor with analog-to-digital conversion circuitry, sampling data from its input. An embodiment of the present invention may comprise discrete digital electronic components including an analog-to-digital converter. These components would be controlled using a field programmable gate array (or other programmable digital logic device like a PAL or PLC), sampling data from its input. An embodiment of the present invention may comprise discrete analog electronic components. These components would be controlled using a field programmable gate array (or other programmable digital logic device like a PAL or PLC), sampling data from its input. It should be appreciated that in any of the embodiments discussed herein the input may be received from any one of or any combination of the following: i) linear encoder, ϋ) rotary encoder, ϋi) stroboscope with imaging circuitry, iv) interferometer, v) other sensor with quadrature output or other devices sensing position, angle and/ or displacement (or any combination of sensing position, angle and/ or displacement).
An embodiment of the present invention device may include the following parts, which correspond to elements in the exemplary System Diagram in Figure 1.
Phase Input
This signal 12 represents the instantaneous phase of the encoder 10. It is assumed to be an unsigned discrete signal with values ranging from about 0 to {resolution — 1), where the variable resolution is an arbitrary constant that will be referenced throughout the document. Other analog or digital signals could be simply converted to this format through the use of analog to digital converters and linear scaling. The instantaneous phase at time step n is indicated as #„,!/], and referenced as 14, in Figure 1.
Digital Controller
The digital controller 16 (or other select type of controller) manages the flow-of- control for all of the components in the System Diagram, as it connects to each component or select components of the system 2.
For an exemplary prototype, the controller may include an MSP430 Mixed Signal Processor manufactured by Texas Instruments. However, it should be appreciated that many other configurations are possible. One promising alternative is to make some or all of the components within the box separate, discrete components, and to control the flow-of- control using a finite state machine on an FPGA.
Phase Register
The output 20 of the phase register 18 holds the phase value from the previous discrete time step. The triggering of this component is timed by the digital controller 16. If implemented as separate digital logic components, this component may consist of two registers in series (the first stage to keep the input signal from changing during a single iteration, and the second stage to maintain die phase from the previous iteration). The output 20 of the phase register is labeled θm ϊ\ in Figure 1.
Output Register
The output 22 of the phase register 23 holds the output value from the previous time step. The triggering of this component is timed by the digital controller 16. If implemented as separate digital logic components, this component may consist of two registers in series (the first stage to keep the input signal from changing during a single iteration, and the second stage to maintain the phase from the previous iteration). The output 20 of the phase register is labeled w[t-1] in Figure 1.
Phase Predictor
The phase predictor 25 uses the phase from the previous iteration, θm - 1], and the total movement from the previous iteration, w[t-l], as referenced as 22, to predict the phase that will result from the current sensing iteration (i.e., the computed θpredicted [t] , as referenced as 28, which shall be discussed below). The phase predictor consists of an adder 24 and a modulo division unit 26, and yields the following behavior indicated in Equation 13, i.e., θ predicted^ ^ as referenced as 28.
Phase Subtractor
This phase subtractor component 30 determines the amount of angular movement for the current iteration, relative to the predicted phase angle. This movement is simply the difference between the actual phase value, θm [t], and the phase value for the phase predictor, θpredicted The resulting digital output from this component is the signal labeled m z,. as referenced as 32, in Figure 1.
Overflow Corrector
Phase angle transitions from about 359° to about 0° or from about 0° to about 359° yield an apparent movement of about —359° or about 359°, respectively, though an actual movement of only about 1° or about —1°, respectively. The following technique as provided by the overflow corrector 34 corrects this type of erroneous overflow/underflow condition:
The combination of the phase subtracter 30 and the overflow corrector 34 implement the "angular difference function."
Adder
The final adder 38 in Figure 1 is used to compute w[t], as referenced as 40, which is proportional to velocity for the current iteration. The operation parallels Equation 11.
Counter
The counter 42 is a register-based component that counts w[t] values for successive iterations. This operation parallels Equation 10. This counter 42 produces the system output 44 for the invention, and represents the absolute phase.
Turning to a software aspect, the following is C source code to describe an exemplary software implementation of an exemplary embodiment of the present invention and which the software functions provided below is copyrighted by the assignee:
// Initialize absolutePhase = 0; lastPhase = 0; lastDeltaPos = 0;
// Infinite Loop while (TRUE) {
// Read the current phase (this corresponds to signal 'thatam[tj' // in the System Diagram. currentPhase = readPhaselnputQ;
// Determine the predicted phase (this corresponds to signal // 'theta.predicted[tj' in the system diagram). Note that '%' is // the modulo division operator, and the constant 'resolution' is // defined in disclosure text. predictedPhase = (lastPhase + lastDeltaPos) % resolution;
// Determine the component due to acceleration (this corresponds to // signal 'm' in the System Diagram). deltaDeltaPos = currentPhase - predictedPhase;
// Check for overflow or underflow (the output of this operation // corresponds to signal 'a[t]' in the System Diagram), if (deltaDeltaPos > (resolution / 2)) { deltaDeltaPos = deltaDeltaPos - resolution; } else if (deltaDeltaPos < -(resolution / 2)) { deltaDeltaPos = deltaDeltaPos + resolution;
}
// Determine the total change in position for the current timestep // (this corresponds to signal 'w[tj' in the system diagram). currentDeltaPos = lastDeltaPos + deltaDeltaPos;
// Generate absolute phase, the output (this corresponds to signal
// 'thetaftf in the system diagram absolutePhase = absolutePhase + currentDeltaPos;
// Prepare for the next iteration (this corresponds to triggering // the "Phase Register" and "Output Register" in the System Diagram). lastDeltaPos = currentDeltaPos; lastPhase = currentPhase; }
It should be appreciated that the method of present invention may be implemented using hardware, software or a combination thereof and may be implemented in one (or with) or more computer systems, processors, controllers or other processing systems. Further, the computer system may include a display interface that forwards graphics, text, and other data from the communication infrastructure. The computer system also includes a main memory, preferably random access memory (RAM), and may also include a secondary memory. The secondary memory may include, for example, a hard disk drive and/or a removable storage drive, representing a floppy disk drive, a magnetic tape drive, an optical disk drive, a flash memory etc. The removable storage drive reads from and/ or writes to a removable storage unit in a well known manner. Removable storage unit, represents a floppy disk, magnetic tape, optical disk, etc. which is read by and written to by removable storage drive. As will be appreciated, the removable storage unit includes a computer usable storage medium having stored therein computer software and/or data. In alternative embodiments, secondary memory may include other means for allowing computer programs or other instructions to be loaded into computer system. Such means may include, for example, a removable storage unit and an interface. Examples of such removable storage units/interfaces include a program cartridge and cartridge interface (such as that found in video game devices), a removable memory chip (such as a ROM, PROM, EPROM or EEPROM) and associated socket, and other removable storage units and interfaces which allow software and data to be transferred from the removable storage unit to computer system. Computer system may also include a communications interface. Communications interface allows software and data to be transferred between computer system and external devices. Examples of communications interface may include a modem, a network interface (such as an Ethernet card), a serial or parallel communications port, a PCMCIA slot and card, a modem etc. Software and data transferred via communications interface are in the form of signals, which may be electronic, electromagnetic, optical or other signals capable of being received by communications interface. Signals are provided to communications interface via a communications path (Le., channel). A channel (or any other communication means or channel disclosed herein) carries signals and may be implemented using wire or cable, fiber optics, a phone line, a cellular phone link, an RF link, an infrared link and other communications channels. In this document, the terms "computer program medium" and "computer usable medium" are used to generally refer to media such as removable storage drive, a hard disk installed in hard disk drive, and signals. These computer program products are means for providing software to computer system. The various embodiments of the present invention include such computer program products. Computer programs (also called computer control logic) are stored in main memory and/ or secondary memory. Computer programs may also be received via communications interface. Such computer programs, when executed, enable computer system to perform the features of the present invention as discussed herein. In particular, the computer programs, when executed, enable processor to perform the functions of the present invention. Accordingly, such computer programs represent controllers of computer system. In an embodiment where the invention is implemented using software, the software may be stored in a computer program product and loaded into computer system using removable storage drive, hard drive or communications interface. The control logic (software), when executed by the processor, causes the processor to perform the functions of the invention as described herein. In another embodiment, the invention may be implemented primarily in hardware using, for example, hardware components such as application specific integrated circuits (ASICs). Implementation of the hardware state machine to perform the functions described herein will be apparent to persons skilled in the relevant art(s). In yet another embodiment, the invention is implemented using a combination of both hardware and software. In an example software embodiment of the invention, the methods described above may be implemented in various programs and programming language known to those skilled in the art.
The various embodiments of the present invention system and method may be utilized for a variety of interfaces, functions, purposes, methods and systems including as discussed in the following patents and publications listed below and of which are hereby incorporated by reference herein in their entirety:
U.S. Patent No. 6,630,659 Bl to Stridsberg, entitled "Position Transducer";
U.S. Patent No. 6,573,710 Bl to Santos et al., entitled "Position and/or Displacement Sensor Including a Plurality of Aligned Sensor Elements";
U.S. Patent No. 6,556,153 Bl to Cardamone, entitled "System and Method for Improving Encoder Resolution"; U.S. Patent No. 6,459,261 Bl to Luetzow et al., entitled "Magnetic Incremental Motion Detection System and Method";
U.S. Patent No. 6,456,063 Bl to Moreno et al., entitled "Self Compensating Control Circuit for Digital Magnetic Sensors";
U.S. Patent No. 6,294,910 Bl to Travostino et al., entitled "Digital Position Sensor for Sensing Position of a Moving Target";
U.S. Patent No. 6,232,739 Bl to Krefta et al., entitled "High-Resolution Incremental Position Sensor With Pulse Switching Strategy";
U.S. Patent No. 6,191,415 Bl to Stridsberg, entitled "Position Transducer";
U.S. Patent No. 6,172,359 Bl to Stridsberg, entitled "Position Transducer";
U.S. Patent No. 6,084,234 to Stridsberg, entitled "Position Transducer";
U.S. Patent No. 5,719,789 to Kawamata, entitled "Method of and Apparatus for Detecting an Amount of Displacement";
U.S. Patent No. 5,442,313 to Santos et al., entitled "Resolution Multiplying Circuit";
U.S. Patent No. 5,067,089 to Ishϋ et al., entitled "Device Having Signal Interpolation Circuit and Displacement Measuring Apparatus Comprising the Device";
U.S. Patent No. 5,041,784 to Griebeler, entitled "Magnetic Sensor With Rectangular Field Distorting Flux Bar";
U.S. Patent No. 5,012,239 to Griebeler, entitled "High Resolution Position Sensor Circuit";
U.S. Patent No. 4,972,080 to Taniguchi, entitled "Signal Processing Apparatus for Pulse Encoder With A/D Conversion and Clocking";
U.S. Patent No. 4,630,928 to Klingler et al., entitled "Length Measuring Device";
U.S. Patent No. 4,587,485 to Papiernik, entitled "Evaluation Arrangement for a Digital Incremental Transmitter";
U.S. Patent No. 3,956,973 to Pomplas, entitled "Die Casting Machine With Piston Positioning Control;" and
Z. Buckner, "Enhanced Resolution Quadrature Encoder Interface," master's thesis, Department of Electrical and Computer Engineering, University of Virginia, CharlottesviHe, 2004.
Still other embodiments will become readily apparent to those skilled in this art from reading the above-recited detailed description and drawings of certain exemplary embodiments. It should be understood that numerous variations, modifications, and additional embodiments are possible, and accordingly, all such variations, modifications, and embodiments are to be regarded as being within the spirit and scope of this application. For example, regardless of the content of any portion (e.g., title, field, background, summary, abstract, drawing figure, etc.) of this application, unless clearly specified to the contrary, there is no requirement for the inclusion in any claim herein or of any application claiming priority hereto of any particular described or illustrated activity or element, any particular sequence of such activities, or any particular interrelationship of such elements. Moreover, any activity can be repeated, any activity can be performed by multiple entities, and/ or any element can be duplicated. Further, any activity or element can be excluded, the sequence of activities can vary, and/ or the interrelationship of elements can vary. Unless clearly specified to the contrary, there is no requirement for any particular described or illustrated activity or element, any particular sequence or such activities, any particular size, speed, material, dimension or frequency, or any particularly interrelationship of such elements. Accordingly, the descriptions and drawings are to be regarded as illustrative in nature, and not as restrictive. Moreover, when any number or range is described herein, unless clearly stated otherwise, that number or range is approximate. When any range is described herein, unless clearly stated otherwise, that range includes all values therein and all sub ranges therein. Any information in any material (e.g., a United States/foreign patent, United States/foreign patent application, book, article, etc.) that has been incorporated by reference herein, is only incorporated by reference to the extent that no conflict exists between such information and the other statements and drawings set forth herein. In the event of such conflict, including a conflict that would render invalid any claim herein or seeking priority hereto, then any such conflicting information in such incorporated by reference material is specifically not incorporated by reference herein.

Claims

Claims
We claim:
1. A system for detecting motion from a sensor interface, said system comprising: a signal acquisition means for acquiring an instantaneous phase during each iteration received from said sensor interface; a phase register means for holding the instantaneous phase from the previous iteration that is acquired by said signal acquisition means; an output register means for holding the instantaneous angular velocity output from the previous iteration that is acquired by said signal acquisition means; a phase predictor means for predicting a phase that will result from the current sensing iteration; a phase subtracter means for determining amount of angular movement for the current iteration relative to the predicted phased angle; an overflow corrector means for correcting erroneous overflow/underflow condition; and a final adder means for computing total velocity for the current iteration.
2. The system of claim 1, wherein absolution position, angle, or motion, or any combination thereof, is accumulated by a counter means.
3. The system of claim 2, wherein the instantaneous phase of the input at time step n is indicated as θm [t] .
4. The system of claim 3, wherein output said phase register is indicated as
5. The system of claim 4, wherein said phase predictor means comprises using the previous iteration, as indicated as θm and the total movement from the previous iteration, as depicted as w[t-l], to predict the phase that will result from the current sensing iteration. 6. The system of claim 5, wherein the amount of angular movement for the current iteration, relative to the predicted phase is determined by the difference between the actual phase value, as indicated as θm \t\, and the phase value for the phase predictor, as indicated as θ predicted\t\, wherein, the resulting digital output from this component is the signal as indicated as m.
7. The system of claim 6, wherein the overflow/underflow condition is determined according the following formula:
8. The system of claim 7, wherein the computed velocity relative to the position or angle from the previous iteration is reflected by w[tj.
9. The system of claim 8, wherein said counter means counts w[t] values for successive iterations to provide the actual, absolute phase or position as reflected as #[tj.
10. The system of claim 2, wherein said counter means comprises at least one of a summing apparatus and/or an accumulator apparatus.
11. The system of claim 1, wherein said signal acquisition means comprises an analog to digital converter.
12. The system of claim 1, wherein said signal acquisition means and the sensor interface are integral with one another.
13. The system of claim 1, wherein said phase predictor means comprises an adder means and a modulo division unit means. 14. The system of claim 1, wherein said sensor interface comprises at least one of linear encoder, rotary encoder, stroboscope with imaging circuitry, interferometer, other sensor with quadrature output or other devices sensing position, angle and/or displacement, or any combination thereof.
15. The system of claim 1, further comprising a controller in communication with the system.
16. The system of claim 15, wherein said controller comprises a computer controller.
17. A method for detecting motion from a sensor interface, said method comprising: acquiring an instantaneous phase received from the interface; holding the instantaneous phase acquired by said acquisition step for the current iteration; holding the instantaneous phase acquired by said acquisition step for the previous iteration; holding the computed velocity output from the previous iteration; predicting a phase that will result from the current sensing iteration; determining amount of angular movement for the current iteration relative to the predicted phased angle; correcting possible overflow/underflow conditions; and computing output velocity for the current iteration relative to the position for the previous iteration.
18. The method of claim 17, wherein said sensor interface accumulates absolute or actual phase based on the velocity outputs from successive iterations.
19. The method of claim 17, wherein said sensor interface comprises at least one of linear encoder, rotary encoder, stroboscope with imaging circuitry, interferometer, other sensor with quadrature output or other devices sensing position, angle and/ or displacement, or any combination thereof. 20. The method of claim 17, further comprising a computer controller adapted to control at least some of the steps listed in claim 17.
21. A computer program product comprising a computer useable medium having computer program logic for enabling at least one processor in communication with an interface motion detection system, said computer program logic comprising: acquiring an instantaneous phase received from said interface system; holding the instantaneous phase acquired by said acquisition step for the current iteration; holding the instantaneous phase acquired by said acquisition step for the previous iteration; holding the computed velocity output from the previous iteration; predicting a phase that will result from the current sensing iteration; determining amount of angular movement for the current iteration relative to the predicted phased angle; correcting possible overflow/underflow conditions; and computing output velocity for the current iteration relative to the position for the previous iteration.
22. The computer program product of claim 21, wherein said interface accumulates absolute or actual phase based on velocity outputs from successive iterations.
23. The computer program product of claim 21, wherein said interface motion detection system comprises at least one of linear encoder, rotary encoder, stroboscope with imaging circuitry, interferometer, other sensor with quadrature output or other devices sensing position, angle and/or displacement, or any combination thereof.
EP05786138A 2004-08-12 2005-08-12 Method, apparatus and computer program product of aliasing discriminator for encoder interfaces Withdrawn EP1787394A4 (en)

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FR2792403B1 (en) 1999-04-14 2001-05-25 Roulements Soc Nouvelle POSITION AND / OR DISPLACEMENT SENSOR COMPRISING A PLURALITY OF ALIGNED SENSITIVE ELEMENTS
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US6167108A (en) * 1998-03-03 2000-12-26 Nec Corporation Method of processing signals of encoders and apparatus employing the same
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Title
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WO2006020963A2 (en) 2006-02-23

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