EP1706902A2 - Plasma-excited chemical vapor deposition method, silicon/oxygen/nitrogen-containing material and layered assembly - Google Patents

Plasma-excited chemical vapor deposition method, silicon/oxygen/nitrogen-containing material and layered assembly

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Publication number
EP1706902A2
EP1706902A2 EP05714893A EP05714893A EP1706902A2 EP 1706902 A2 EP1706902 A2 EP 1706902A2 EP 05714893 A EP05714893 A EP 05714893A EP 05714893 A EP05714893 A EP 05714893A EP 1706902 A2 EP1706902 A2 EP 1706902A2
Authority
EP
European Patent Office
Prior art keywords
layer
nitrogen
silicon
oxygen
electrically conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05714893A
Other languages
German (de)
French (fr)
Inventor
Zvonimir Gabric
Werner Pamler
Günther SCHINDLER
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
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Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1706902A2 publication Critical patent/EP1706902A2/en
Withdrawn legal-status Critical Current

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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/308—Oxynitrides
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
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    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H01L21/3145—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers formed by deposition from a gas or vapour
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    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/764—Air gaps
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
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    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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    • H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
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    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
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Definitions

  • the invention relates to a plasma-excited chemical vapor deposition process, a silicon-oxygen-nitrogen-containing material and a layer arrangement.
  • low-k materials are used, ie materials with a low value ⁇ r as material for intermetallic dielectrics.
  • the insulating dielectric which determines the capacitance between the conductor tracks, has one in the region of cavities Relative dielectric constant ⁇ r , which is approximately equal to one.
  • the conductor tracks themselves are surrounded by a material layer made of silicon oxide or a low-k material for decoupling from the surroundings.
  • the cavity or trench can be sealed in a layer arrangement by depositing a cover layer covering the trench.
  • a cover layer covering the trench.
  • Silicon oxide (so-called "ozone / TEOS") formed by ozone-activated decomposition of tetraethyl orthosilicate (TEOS) is suitable as material for such a top layer, which can be selectively deposited on silane-based silicon oxide as the material of the top layer, but not on silicon nitride as material inside the trench.
  • selective Deposition means that the material to be deposited grows as a cover layer to close the cavity on silane-based silicon oxide, but not on silicon nitride or only at a very low rate.
  • silicon nitride is often used as the material between air gap structures between conductor tracks, whereas a surface layer of such a layer arrangement, which is to be grown with a cover layer, is often formed from silane-based silicon oxide.
  • [5] describes a method for forming a silicon oxynitride layer by means of a CVD method using a plasma and a mixed gas, the mixed gas containing an organic silane gas and a nitriding gas on and between conductor tracks
  • the silicon oxynitride layer has good edge coverage according to the information in [5].
  • [8] describes the formation of a structure with airgaps between the conductor tracks.
  • the layer formed with airgaps is formed using SiH 4 and thus under
  • the invention is based in particular on the problem of providing a material, a method for producing the material and a layer arrangement with this material, which material has a sufficiently low relative dielectric constant and can be deposited selectively or only poorly on ozone / TEOS.
  • nitrogen material is supplied using an organic silicon precursor material during the supply of silicon material and oxygen material.
  • silicon-oxygen-nitrogen-containing material is created according to the invention, which is produced according to the plasma-excited chemical vapor deposition method with the features described above.
  • the layer arrangement according to the invention contains a substrate and two electrically conductive structures on the substrate. At least a partial area between the two electrically conductive structures is free of material. Silicon-oxygen-nitrogen-containing material with the features described above is at least partially formed on and / or between the two electrically conductive structures. Furthermore, the layer arrangement contains an intermediate layer made of electrically insulating material on the silicon-oxygen Nitrogen-containing material and a cover layer selectively formed on the intermediate layer, by means of which the material-free area between the two electrically conductive structures is sealed from the environment.
  • a basic idea of the invention is to provide a production method for a material containing silicon-oxygen-nitrogen, with which method a material is obtained which predominantly contains silicon-oxygen components and thus a relative one
  • the silicon-oxygen-nitrogen-containing material produced according to the plasma-excited chemical vapor deposition process claimed according to the invention additionally contains rather small amounts of
  • Nitrogen (preferably in the one-digit percentage range).
  • the nitrogen component of the silicon-oxygen-nitrogen-containing material produced by means of the method according to the invention clearly causes properties similar to silicon nitride with regard to the separability of ozone / TEOS thereon.
  • the material of the invention is very poor at allowing ozone / TEOS to be deposited on it.
  • the combination of a low core and a low tendency to serve as a carrier for separating ozone / TEOS makes the material produced according to the invention extremely suitable as an intermetallic dielectric of an integrated circuit with air gap structures.
  • the material produced according to the invention essentially has the favorable dielectric properties of silicon oxide (i.e. a low value of the relative dielectric constant and thus a low RC switching delay), and simultaneously the material composition (probably especially that
  • Nitrogen component therein the effect that the material that is formed on the basis of an organic precursor with regard to the selective deposition of ozone / TEOS has material properties that are more similar to silicon nitride. This makes it an ideal material
  • Intermetallic dielectric provided between conductor tracks of a low-k arrangement. Due to the good mechanical stability of the material, it also allows airgaps to be formed between structures of the material.
  • This material is produced according to the invention by introducing nitrogen material into the PECVD process chamber ("plasma enhanced chemical vapor deposition") in addition to an organic silicon precursor material as a source for the silicon component and the oxygen component of the material according to the invention, thereby obtaining the material according to the invention becomes.
  • plasma enhanced chemical vapor deposition an organic silicon precursor material as a source for the silicon component and the oxygen component of the material according to the invention.
  • Silicon oxide is often deposited using a plasma-activated TEOS process (so-called "PE-TEOS"). Based on the observation that silicon nitride has no or very little; low ozone / TEOS separation takes place, according to the invention nitrogen is added to the PE-TEOS process. By installing low nitrogen tightness, typically in the percentage range, the selectivity of the ozone / TEOS separation can be greatly increased, so that, as with silicon nitride, none or only an extremely low one
  • ozone / TEOS takes place on the layer.
  • the properties of silicon oxide remain largely simultaneous receive.
  • the nitrogen content of the material according to the invention is typically in the atomic percent range. A separation of ozone / TEOS does not take place or only very poorly on this type of silicon oxide provided with small amounts of nitrogen.
  • Essential for achieving the advantageous material properties of the material of the invention is the use of an organic (ie based on carbon compounds) silicon precursor material, preferably tetraethyl orthosilicate (TEOS), also referred to as tetraethoxysilane.
  • TEOS tetraethyl orthosilicate
  • SiH 4 silane
  • the material with the advantageous properties cannot be obtained.
  • PECVD plasma-excited chemical vapor deposition process
  • the CVD process is a coating technology for depositing thin layers from the gas phase on a solid substrate.
  • the principle of the CVD process is that gaseous starting materials, so-called precursors, are passed over a substrate and chemically broken down into their constituent parts, whereby a new layer grows on the substrate surface.
  • the disassembly the precursors are mostly thermal, ie by heating the substrate.
  • the actual separation takes place with the participation of a chemical reaction.
  • a volatile gaseous component reacts with another gas to form a solid material that is deposited on the substrate.
  • the process temperatures in the CVD process are relatively high.
  • PECVD plasma-excited chemical vapor deposition
  • plasma enhanced chemical vapor deposition can be carried out with significantly lower process temperatures. While in a CVD process the gas phase reaction is triggered by thermal energy due to the heating of the substrate, a PECVD process is based on the conversion of a gas into the plasma state in the vicinity of the substrate surface. One of the reaction products is a solid substance which is deposited on the surface, as a result of which a new layer is formed from the material according to the invention. In a PECVD reactor is between the substrate holder, which serves as an electrode, and another
  • a plasma is ignited by a strong alternating electric field.
  • the energy of the field breaks bonds in the gas molecules introduced into the PECVD reactor and the gas molecules are broken down.
  • a layer of oxygen material nitrogen material is formed over a substrate with a plurality of electrically conductive structures and / or over part of the surface of the electrically conductive structures by means of a plasma-excited chemical vapor deposition process
  • the layer of oxygen material nitrogen- Material is formed in such a way that a material-free area remains between the conductor tracks
  • a cover layer is selectively applied to the intermediate layer, by means of which the material-free area between the electrically conductive structures is sealed from the surroundings, so that the material-free area forms a cavity.
  • a layer arrangement is also provided,
  • Dielectric constant of the material containing silicon-oxygen-nitrogen can be seen.
  • An oxygen-containing material is preferably used as the organic silicon precursor material.
  • This oxygen-containing material can serve as an oxygen source for forming the silicon-oxygen-nitrogen-containing material according to the invention.
  • TEOS tetraethyl orthosilicate
  • methyltriethoxysilane MBEOS
  • DMDEOS dimethyldiethoxysilane
  • Trimethylethoxysilane TrMEOS
  • TMS tetramethylsilane
  • TEOS tetraethyl orthosilicate
  • N 2 nitrogen
  • the flow rate ratio is the quotient of the flow rates (eg in sccm, standard cubic centimeters per minute) of the two individual components.
  • the flow rate ratio of tetraethyl orthosilicate to nitrogen is set between 1: 5 and 1: 2.
  • Helium can be supplied as a carrier gas during the plasma-excited chemical vapor deposition process.
  • the pressure in the process chamber is preferably set between 440 Pa and 1750 Pa, more preferably between 700 Pa and 10OOPa.
  • the temperature in the process chamber can be between 300 ° C and 500 ° C, a temperature between 380 ° C and 430 ° C being particularly advantageous.
  • Nitrogen-containing material which is produced in accordance with the plasma-excited chemical vapor deposition method according to the invention is described in more detail. Refinements of the plasma-excited chemical vapor deposition process also apply to the material containing silicon-oxygen-nitrogen, and refinements of the silicon-oxygen Nitrogen-containing material also applies to the plasma-excited chemical vapor deposition process.
  • the silicon-oxygen-nitrogen-containing material preferably contains between 0.1 atomic percent and 10 atomic percent
  • Nitrogen More preferably, between 0.5 atom percent and 5 atom percent nitrogen are contained in the material according to the invention. It is particularly advantageous to set the parameters of the plasma-excited chemical vapor deposition process in such a way that the material contains between 1.4 atomic percent and 2.3 atomic percent nitrogen. In this case, a particularly good balance between low dielectric constant and particularly poor selectivity with regard to the growth of ozone / TEOS can be achieved.
  • the atomic percentage ratio between oxygen and silicon is preferably between 1.8 and 1.99.
  • the silicon-oxygen-nitrogen-containing material is compared to stoichiometric silicon oxide with one
  • the material according to the invention can have between 0.4 atom percent and 2.4 atom percent carbon. Possibly the carbon can also contribute to the favorable material properties, since the aim according to the invention only takes place when an organic, i.e. carbon-containing, silicon precursor material is achieved.
  • the silicon-oxygen-nitrogen-containing material of the invention may have between 3 atom percent and 13 atom percent hydrogen. Particularly favorable material properties are achieved with a material of the formula Sii .00 ° l . 9 0 H 0 . 27 c 0 .0 4 5 N 0 . 0 6 reached.
  • Each of the index numbers (1.00, 1.90, etc.) in the above formula can vary up or down by 20 percent, more preferably by 10 percent, even more preferably by 3 percent, without the advantageous properties of the material being lost.
  • Embodiments of the silicon-oxygen-nitrogen material also apply to the layer arrangement and vice versa.
  • Intermediate layer can be formed from silane-based (SiH) silicon oxide. If a cover layer made of silicon oxide, which is formed based on ozone-activated tetraethyl orthosilicate, is then selectively deposited, a layer arrangement is obtained which is securely closed to the outside, since the material of the cover layer can clearly overgrow a trench of the layer arrangement. Simultaneously, due to the combination of materials, it is avoided that when such a cover layer grows, the trench is partially filled with cover layer material, which results from the poor ability to separate the material of the cover layer onto the material according to the invention within the trench.
  • SiH silane-based
  • FIG. 1 shows a cross-sectional view of a layer arrangement according to a first exemplary embodiment of the invention
  • FIG. 2 shows an electron microscopic cross-sectional view of a layer arrangement without using the material according to the invention
  • FIG. 3 shows an electron microscopic cross-sectional view of a layer arrangement using the material according to the invention
  • FIG. 4 shows another cross-sectional view of an electron microscope of a layer arrangement using the material according to the invention
  • FIG. 5 shows a cross-sectional view of a layer arrangement according to a second exemplary embodiment of the invention
  • FIG. 6 shows a cross-sectional view of a layer arrangement according to a third exemplary embodiment of the invention.
  • Table 1 shows the steps and parameters of a process sequence for a "P5000" system from Applied TM Materials, with which silicon-oxygen-nitrogen-containing material (ie a modified PE-TEOS layer) is produced in accordance with a preferred exemplary embodiment of the invention can.
  • the pressure in the process chamber is set to 880 Pa with a maximum step time of 10.0 s.
  • the temperature of the susceptor is increased from the standard temperature of 400 ° C. to 415 ° C., so that the susceptor does not cool down when the cold silicon wafer is later loaded.
  • the gas flows set for a 02 component (oxygen) are 700sccm (standard cubic centimeters per minute), for a helium carrier gas 2500sccm, for TEOS as an organic silicon precursor a flow rate of 700sccm and for nitrogen a flow rate of 2000sccm.
  • the maximum step time is kept at 10.0s.
  • the pressure in the process chamber is maintained at 880 Pa.
  • the temperature of the susceptor is then brought to 400 ° C. and the gas flows are modified such that the 02 component is 155sccm, the helium carrier gas component is 850sccm
  • TEOS component is brought to 550sccm and the nitrogen component to 2000sccm.
  • the step time is set according to the desired layer thickness. With a step time of 60.0s, for example, a layer of approx. 450 nm thickness is grown.
  • the pressure in the chamber is kept at 880Pa and high frequency is switched on with a power of 900W.
  • the temperature of the susceptor is kept at 400 ° C.
  • the gas flows are set as follows: the O2 component is set to 150sccm, the helium component to 700sccm, the TEOS component to 550sccm and the nitrogen component to 2000sccm.
  • the maximum step time is reduced to 5 s.
  • the throttle is opened completely, the high-frequency power is switched back to 0W.
  • the gas flows of oxygen, helium, TEOS and nitrogen are also reduced.
  • a layer arrangement 100 according to a first exemplary embodiment of the invention is described below with reference to FIG.
  • the layer arrangement 100 has a silicon substrate 101, on which a first copper conductor track 102 and a second copper conductor track 103 are formed.
  • the area between the two electrically conductive structures 102, 103 is material-free, namely the area of airgaps 107.
  • material 104 produced according to the invention is electrically conductive on the two Structures 102, 103 are formed on the Sii_Q0 ° 1.90 H 0.27 c 0.045 N 0.06 ⁇ Mater i a l 1 ° 4, a silam-based silicon oxide intermediate layer 105.
  • silane-based silicon oxide intermediate layer 105 On the silane-based silicon oxide intermediate layer 105 is an ozone / TEOS cover layer 106 (ie silicon oxide formed by ozone-activated decomposition of tetraethyl orthosilicate), by means of which the material-free region 107 between the two electrically conductive structures 102, 103 is sealed from the environment.
  • ozone / TEOS cover layer 106 ie silicon oxide formed by ozone-activated decomposition of tetraethyl orthosilicate
  • the Si ⁇ invention. 00 ° 1 . 90 H 0 . 27 ⁇ 0 . 045 N 0 .06 ⁇ Ma TERIAL 104 partially covers the copper traces 102, 103.
  • the material of the invention has with respect to its dielectric properties substantially that of silicon oxide.
  • FIG. 2 shows an electron microscope image 200 of a cross-sectional view of a layer arrangement in which conventional TEOS material has been used as the dielectric 204 between airgaps 202.
  • a cover layer 201 is formed using a selective O 3 / TEOS deposition method, an edge region 203 between the air gaps 202 and the dielectric 204 is undesirably covered with material, which undesirably increases the dielectric constant of the air gap region ,
  • a cover layer 201 formed by means of a selective ozone / TEOS Deposition process, forms no structures on the side walls of Airgaps 202.
  • FIG. 4 shows another electron microscope image 400 as a cross-sectional view of a layer arrangement according to the invention, in which copper conductor tracks 401 are formed in addition to the components shown in FIG. Since the effective relative dielectric constant is reduced due to the material 301 according to the invention between airgaps 202 between the copper conductor tracks 401 (since an undesired side wall covering of the airgaps 202 with ozone / TEOS material of a cover layer 201 is avoided according to the invention), the RC delay times are the circuit Arrangement 400 from FIG. 4 significantly improved compared to the prior art.
  • the conductor track arrangement 500 has a base substrate 502. Silicon dioxide (SiO 2 ) is selected as the material for this base substrate 502. Two conductor tracks 503 made of aluminum or copper are formed in the base substrate 502.
  • Both the conductor tracks 503 and the base substrate 502 are covered by a first stop layer 504.
  • Above the first stop layer 504 is a layer stack of successively a first insulation layer 505, a second stop layer 506, a second insulation layer 507, a third stop layer 508, a third Insulation layer 509, a buffer layer 510 and a support layer 511 are arranged.
  • the first stop layer 504, the second stop layer 506, the third stop layer 508 and a fourth stop layer 512 each have silicon nitride (Si3N 4. ), which is electrically insulating.
  • the material used for the first insulation layer 505, the second insulation layer 507, the third insulation layer 509 and the buffer layer 510 in accordance with the present exemplary embodiment is Si 0 ° .90 H 0.27 c 0.045 N 0.06 ⁇ Mater: '- a l.
  • Plasma-excited silicon dioxide (SiO 2) based on silane (SiH4) is used for the base layer 511 (also referred to as the intermediate layer).
  • the plasma-excited silicon dioxide (SiO 2) based on silane (SiH4) is usually deposited in a PECVD process (PECVD, “plasma enhanced chemical vapor deposition” or plasma-excited chemical vapor deposition).
  • the base substrate 502, the first stop layer 504, the first insulation layer 505, the second stop layer 506, the second insulation layer 507, the third stop layer 508, the third insulation layer 509 and the fourth stop layer 512 are formed in the ascending direction of the layer stack.
  • the buffer layer 510 is bounded at the top by a buffer layer surface 513.
  • a cavity 514 is formed in the buffer layer 510 and the layers arranged underneath, which protrudes from the buffer layer surface 513 to the second stop layer 506 into the layers arranged below and has a cavity depth TJI.
  • the cavity 514 insulates the two buried conductor tracks 503, which partially replace the third stop layer 508 and the third insulation layer 509 and together define a trace level.
  • the conductor tracks 503, which are electrically insulated by means of the cavity 514, are arranged next to one another at a conductor track spacing A such that the respective lower conductor track surface is at a distance perpendicular to the buffer layer surface 513
  • Conductor depth TL has, which is greater than the vertical thickness of the conductor tracks 503.
  • the cavity depth TJJ is greater than the conductor path depth TL, as a result of which stray fields between adjacent conductor paths 503 in the regions of the buffer layer 510 directly above and below the
  • the cavity 514 has a width which is equal to the interconnect spacing A.
  • the conductor tracks 503, which partially replace the third stop layer 508 and the third insulation layer 509, are electrically coupled by means of an electrical contact 515 to the conductor track 503 located in the base substrate 502 and, according to the present exemplary embodiment, have the same material as the conductor track 503 located in the base substrate 502.
  • the electrical contact 515 penetrates the first stop layer 504, the first insulation layer 505, the second stop layer 506 and the second insulation layer 507.
  • the buffer layer 510 and the support layer 511 are located one above the other, the cavity 514 projecting through the buffer layer 510 and partially projecting into the support layer 511.
  • the cavity 514 is closed off at the top by means of a cover layer 516 with respect to the buffer layer surface 513.
  • the cover layer 516 has an insulation material which selectively adheres exclusively to the support layer 511.
  • the material for the top layer 516 is based on ozone-activated tetraethyl orthosilicate (O 3 / TEOS)
  • the cover layer 516 is formed such that it has a gusset-shaped recess facing the cavity 514. Consequently, the support layer 511 perpendicular to the buffer layer surface 513 should have a sufficient thickness so that the cavity 514 is completely closed off from the cover layer 516 even above the gore-shaped recess of the cover layer 516.
  • the cover layer 516 and the support layer 511 have a common cover layer / support layer surface 517, which limits these two layers 516, 511 essentially parallel to the substrate surface 501.
  • a fifth stop layer 518 is arranged on this cover layer / base layer surface 517, on which additional interconnect levels can be applied.
  • the geometry of the cavity 514 is preferably selected such that the conductor track arrangement 500 has a sufficiently good electrical insulation of the conductor tracks 503 within a conductor track level with a sufficient reduction in the relative dielectric constant e r .
  • the conductor track spacing A and thus the cavity 514 have a width of 400 nm to 500 nm, which is almost equal to the width of the conductor tracks 503.
  • the cavity depth TJJ has a value which corresponds to twice the thickness of the conductor tracks 503. According to this, the conductor tracks 503
  • Embodiment a thickness of about 600nm.
  • the individual stop layers each have a thickness of approximately 50 nm.
  • the insulation layers apart from the third insulation layer 509 as well as the buffer layer 510 and the support layer 511 have a thickness according to the present exemplary embodiment about 150nm each. Alternatively, other suitable dimensions can of course also be selected.
  • the Damascene technique is preferably used when copper is used as the material for the conductor tracks 503, while the metal etching technique is preferably used when aluminum is used as the material for the conductor tracks 503.
  • the cavity 514 can additionally pass through the second
  • FIG. 6 shows a cross-sectional view of a layer arrangement 600 (also referred to as conductor arrangement 600) according to a third exemplary embodiment of the invention.
  • the conductor arrangement 600 according to the third exemplary embodiment is essentially identical to the conductor arrangement 500 according to the second exemplary embodiment. The differences between the conductor arrangement 600 according to the third
  • Exemplary embodiment and the conductor track arrangement 500 according to the second exemplary embodiment are as follows:
  • the cavity 514 has, with respect to the substrate surface 501 parallel to the plane of the drawing, a cavity width B which is greater than the interconnect spacing A.
  • the result of this is that the shape of the cavity 514 is clearly comparable to an "I" or a bone.
  • the greater extent of the cavity 514 above and below the conductor track level formed by the adjacent conductor tracks 503 contributes to an additional reduction in the effective relative dielectric constant e r in the conductor track arrangement 600. This is because the larger cavity 514 additionally reduces interfering electrical stray fields between the conductor tracks 503.
  • the third stop layer 508 and the fourth stop layer 512 have a hole width C in the region of the cavity 514 which is smaller than the conductor path spacing A. This is a consequence of the special manufacturing process with which the bulged cavity 514 in the conductor path arrangement 600 according to FIG third embodiment is produced.
  • Sii. Q 0 ° 1 . 90 H 0 . 27 ⁇ 0 . 045 N 0 . 06 ⁇ Ma -material is used.
  • Exposed surface areas, in particular of the layers 507, 510, are reliably protected against this during subsequent formation of the ozone / TEOS cover layer 516 by means of a selective deposition process, undesirably with material of the
  • Cover layer 516 to be covered, which would lead to a partial filling of the cavity 514. This, in turn, would undesirably increase the effective relative dielectric constant of the area between interconnects 503. Due to the provision of layers 505, 507, 509, 510 made of Sii.

Abstract

The invention relates to a plasma-excited chemical vapor deposition method for forming a silicon/oxygen/nitrogen-containing material. The invention provides that during the supply of silicon material and oxygen material, nitrogen material is supplied while using an organic silicon precursor material.

Description

B e s c hr e ibungDescription
Plasmaangeregtes chemisches Gasphasenabscheide-Verfahren, Silizium-Sauerstoff-Stiσkstoff-haltiges Material und Schicht- AnordnungPlasma-excited chemical vapor deposition process, silicon-oxygen-containing material and layer arrangement
Die Erfindung betrifft ein plasmaangeregtes chemisches Gasphasenabscheide-Verfahren, ein Silizium-Sauerstoff- Stickstoff-haltiges Material und eine Schicht-Anordnung.The invention relates to a plasma-excited chemical vapor deposition process, a silicon-oxygen-nitrogen-containing material and a layer arrangement.
Integrierte Schaltungs-Anordnungen werden mit immer höherer Packungsdichte erzeugt. Dies hat zur Folge, dass Leiterbahnen in Metallisierungsebenen einen immer kleineren Abstand voneinander aufweisen. Dadurch -steigen Kapazitäten, die zwischen den Leiterbahnen gebildet werden und zu hohen Signallaufzeiten, einer hohen Verlustleistung und unerwünschtem Übersprechen führen, d.h. zu einer Wechselwirkung zwischen auf benachbarten Leiterbahnen angelegten Signalen.Integrated circuit arrangements are being produced with ever increasing packing density. The consequence of this is that conductor tracks in metallization planes have an increasingly smaller distance from one another. This increases capacities that are formed between the conductor tracks and lead to long signal propagation times, high power loss and undesired crosstalk, i.e. on an interaction between signals applied to adjacent conductor tracks.
Häufig wird als Isolationsmaterial zwischen den Leiterbahnen Siliziumoxid als Dielektrikum verwendet, dessen relative Dielektrizitätskonstante εr=3.9 beträgt.Silicon oxide, the relative dielectric constant of which is ε r = 3.9, is frequently used as the insulating material between the conductor tracks.
Zum Reduzieren der relativen Dielektrizitätskonstante εr, was zu einer Verringerung des Werts der Koppelkapazitäten zwischen in ein Isolationsmaterial eingebetteten Leiterbahnen führt, werden so genannte Low-k-Materialien verwendet, d.h. Materialien mit einem geringen Wert εr als Material für Intermetalldielektrika.To reduce the relative dielectric constant ε r , which leads to a reduction in the value of the coupling capacitances between conductor tracks embedded in an insulation material, so-called low-k materials are used, ie materials with a low value ε r as material for intermetallic dielectrics.
Aus dem Stand der Technik ist auch bekannt, Hohlräume zwischen Leiterbahnen innerhalb einer Leiterbahnebene zu erzeugen, um den Wert der relativen Dielektrizitätskonstante und somit den Wert der Koppelkapazität zu verringern. Das isolierende Dielektrikum, das die Kapazität zwischen den Leiterbahnen bestimmt, weist im Bereich von Hohlräumen eine relative Dielektrizitätskonstante εr auf, die annähernd gleich eins ist. Die Leiterbahnen selbst sind zum Entkoppeln von der Umgebung von einer Materialschicht aus Siliziumoxid oder einem Low-k-Material umgeben.It is also known from the prior art to create cavities between conductor tracks within a conductor track level in order to reduce the value of the relative dielectric constant and thus the value of the coupling capacitance. The insulating dielectric, which determines the capacitance between the conductor tracks, has one in the region of cavities Relative dielectric constant ε r , which is approximately equal to one. The conductor tracks themselves are surrounded by a material layer made of silicon oxide or a low-k material for decoupling from the surroundings.
Die hohen Koppelkapazitäten C zwischen benachbarten Leiterbahnen, die bei zunehmend miniaturisierten Schaltkreisen immer größer werden, führen gemeinsam mit dem Widerstand R einer Leiterbahn zu einer RC-Schalt erzögerung von auf den Leiterbahnen transportierten Signalen. Diese RC- Schaltverzögerung kann unter Verwendung von Luftlöchern (Airgaps) als Alternative zu Low-k-Materialien verringert werden, da bei Verwendung von Luftlöchern zwischen Leiterbahnen die effektive Dielektrizitätskonstante εr als Isolationsmaterial zwischen Metallisierungsbahnen erheblich verringert wird. Realisierungsmöglichkeiten für Airgaps sind beispielsweise in [1] bis [4] offenbart.The high coupling capacitances C between adjacent conductor tracks, which are becoming ever larger with increasingly miniaturized circuits, together with the resistance R of a conductor track lead to an RC switching delay of signals carried on the conductor tracks. This RC switching delay can be reduced using air holes (air gaps) as an alternative to low-k materials, since when using air holes between interconnects the effective dielectric constant ε r as insulation material between metallization tracks is considerably reduced. Implementation options for airgaps are disclosed, for example, in [1] to [4].
Um einen Hohlraum zwischen benachbarten Leiterbahnen nach außen hin abzudichten bzw. zu verschließen, kann ein solcherIn order to seal or close a cavity between adjacent conductor tracks from the outside, one can
Hohlraum oder Graben in einer Schicht-Anordnung mittels Abscheidens einer den Graben bedeckenden Deckschicht versiegelt werden. Beim Abdichten eines grabenartigen Hohlraums zwischen Leiterbahnen wird angestrebt, dass das Material einer solchen Deckschicht sich auf der obersten Schicht gut abscheidet, nicht hingegen in den Graben eindringt und somit den Hohlraum zwischen benachbarten Leiterbahnen in unerwünschter Weise mit Material auffüllt, wodurch wiederum die relative Dielektrizitätskonstante εr zwischen den Leiterbahnen erhöht werden würde.The cavity or trench can be sealed in a layer arrangement by depositing a cover layer covering the trench. When sealing a trench-like cavity between conductor tracks, the aim is that the material of such a covering layer is deposited well on the top layer, but does not penetrate into the trench and thus undesirably fills the cavity between adjacent conductor tracks with material, which in turn causes the relative dielectric constant ε r between the conductor tracks would be increased.
Als Material für eine solche Deckschicht eignet sich durch Ozon-aktivierte Zersetzung von Tetraethylorthosilikat (TEOS) gebildetes Siliziumoxid (sogenanntes "Ozon/TEOS" ) , das sich selektiv gut auf Silan-basiertem Siliziumoxid als Material der obersten Schicht abscheiden lässt, nicht hingegen auf Siliziumnitrid als Material im Inneren des Grabens. Selektive Abscheidung bedeutet, dass das abzuscheidende Material als Deckschicht zum Verschließen des Hohlraums auf Silan- basiertem Siliziumoxid aufwächst, auf Siliziumnitrid hingegen nicht oder nur mit sehr geringer Rate.Silicon oxide (so-called "ozone / TEOS") formed by ozone-activated decomposition of tetraethyl orthosilicate (TEOS) is suitable as material for such a top layer, which can be selectively deposited on silane-based silicon oxide as the material of the top layer, but not on silicon nitride as material inside the trench. selective Deposition means that the material to be deposited grows as a cover layer to close the cavity on silane-based silicon oxide, but not on silicon nitride or only at a very low rate.
Daher wird gemäß dem Stand der Technik als Material zwischen Airgap-Strukturen zwischen Leiterbahnen häufig Siliziumnitrid verwendet, wohingegen eine mit einer Deckschicht zuzuwachsende Oberflächenschicht einer solchen Schicht- Anordnung häufig aus Silan-basiertem Siliziumoxid gebildet wird. Allerdings hat diese Materialkonfiguration den Nachteil, dass aufgrund der hohen relativen Dielektrizitätskonstante von Siliziumnitrid (εr=8) eine für viele Anwendungen zu hohe RC-Schaltverzögerung auftritt.Therefore, according to the prior art, silicon nitride is often used as the material between air gap structures between conductor tracks, whereas a surface layer of such a layer arrangement, which is to be grown with a cover layer, is often formed from silane-based silicon oxide. However, this material configuration has the disadvantage that, due to the high relative dielectric constant of silicon nitride (ε r = 8), the RC switching delay is too high for many applications.
In [5] ist ein Verfahren zum Bilden einer Siliziumoxynitridschicht beschrieben mittels eines CVD- Verfahrens unter Verwendung eines Plasmas und eines Mischgases, wobei das Mischgas ein organisches Silangas und ein Nitriergas enthält auf und zwischen Leiterbahnen eines[5] describes a method for forming a silicon oxynitride layer by means of a CVD method using a plasma and a mixed gas, the mixed gas containing an organic silane gas and a nitriding gas on and between conductor tracks
Halbleiterchips. Die Siliziumoxynitridschicht weist gemäß den Angaben in [5] eine gute Kantenbedeckung auf.Semiconductor chips. The silicon oxynitride layer has good edge coverage according to the information in [5].
Andere Verfahren zum Bilden einer Siliziumoxynitridschicht mit einer guten Kantenbedeckung sind in [6] und [7] beschriebenOther methods of forming a silicon oxynitride layer with good edge coverage are described in [6] and [7]
[8] beschreibt das Bilden einer Struktur mit Airgaps zwischen den Leiterbahnen. Die gebildete Schicht mit Airgaps wird jedoch unter Verwendung von SiH4 gebildet und damit unter[8] describes the formation of a structure with airgaps between the conductor tracks. However, the layer formed with airgaps is formed using SiH 4 and thus under
Verwendung eines anorganischen Silizium-Precursormaterials .Use of an inorganic silicon precursor material.
Eine andere Airgap-Struktur ist in [9] beschrieben, wobei diese Struktur unter Verwendung nur einer „Airgap-Schicht " und, zur Erhöhung des "Aspektverhältnisses" zwischen denAnother airgap structure is described in [9], this structure using only one "airgap layer" and, to increase the "aspect ratio" between the
Leiterbahnen und damit zur automatischen Bildung von Airgaps, einer auf die Leiterbahnen zusätzlich aufgebrachten Pad-Oxid- Schicht, erzeugt wird.Conductor tracks and thus for the automatic formation of airgaps, a pad oxide layer additionally applied to the conductor tracks.
Der Erfindung liegt insbesondere das Problem zugrunde, ein Material, ein Verfahren zum Herstellen des Materials und eine Schicht-Anordnung mit diesem Material bereitzustellen, welches Material eine ausreichend geringe relative Dielektrizitätskonstante hat und sich nicht oder nur schlecht selektiv auf Ozon/TEOS abscheiden lässt.The invention is based in particular on the problem of providing a material, a method for producing the material and a layer arrangement with this material, which material has a sufficiently low relative dielectric constant and can be deposited selectively or only poorly on ozone / TEOS.
Das Problem wird durch ein plasmaangeregtes chemisches Gasphasenabscheide-Verfahren, durch ein Silizium-Sauerstoff- Stickstoff-haltiges Material und durch eine Schicht-Anordnung mit den Merkmalen gemäß den unabhängigen Patentansprüchen gelöst.The problem is solved by a plasma-excited chemical vapor deposition method, by a silicon-oxygen-nitrogen-containing material and by a layer arrangement with the features according to the independent claims.
Bei dem erfindungsgemäßem plasmaangeregten chemischen Gasphasenabscheide-Verfahren zum Bilden eines Silizium- Sauerstoff-Stickstoff-haltigen Materials wird während des Zufuhrens von Silizium-Material und Sauerstoff-Material Stickstoff-Material unter Verwendung eines organischen Silizium-Precursormaterials zugeführt .In the plasma-excited chemical vapor deposition method according to the invention for forming a silicon-oxygen-nitrogen-containing material, nitrogen material is supplied using an organic silicon precursor material during the supply of silicon material and oxygen material.
Ferner ist erfindungsgemäß ein Silizium-Sauerstoff- Stickstoff-haltiges Material geschaffen, das gemäß dem plasmaangeregten chemischen Gasphasenabscheide-Verfahren mit den oben beschriebenen Merkmalen hergestellt ist.Furthermore, a silicon-oxygen-nitrogen-containing material is created according to the invention, which is produced according to the plasma-excited chemical vapor deposition method with the features described above.
Die erfindungsgemäße Schicht-Anordnung enthält ein Substrat und zwei elektrisch leitfähige Strukturen auf dem Substrat. Zumindest ein Teilbereich zwischen den zwei elektrisch leitfähigen Strukturen ist materialfrei. Silizium-Sauerstoff- Stickstoff-haltiges Material mit den oben beschriebenen Merkmalen ist zumindest teilweise auf und/oder zwischen den zwei elektrisch leitfähigen Strukturen gebildet. Ferner enthält die Schicht-Anordnung eine Zwischenschicht aus elektrisch isolierendem Material auf dem Silizium-Sauerstoff- Stickstoff-haltigen Material und eine selektiv auf der Zwischenschicht gebildete Deckschicht, mittels welcher der materialfreie Bereich zwischen den zwei elektrisch leitfähigen Strukturen gegenüber der Umgebung versiegelt ist.The layer arrangement according to the invention contains a substrate and two electrically conductive structures on the substrate. At least a partial area between the two electrically conductive structures is free of material. Silicon-oxygen-nitrogen-containing material with the features described above is at least partially formed on and / or between the two electrically conductive structures. Furthermore, the layer arrangement contains an intermediate layer made of electrically insulating material on the silicon-oxygen Nitrogen-containing material and a cover layer selectively formed on the intermediate layer, by means of which the material-free area between the two electrically conductive structures is sealed from the environment.
Eine Grundidee der Erfindung ist darin zu sehen, ein Herstellungsverfahren für ein Silizium-Sauerstoff-Stickstoff- haltiges Material bereitzustellen, mit welchem Verfahren ein Material erhalten wird, das überwiegend Silizium-Sauerstoff Komponenten enthält und somit eine relativeA basic idea of the invention is to provide a production method for a material containing silicon-oxygen-nitrogen, with which method a material is obtained which predominantly contains silicon-oxygen components and thus a relative one
Dielektrizitätskonstante hat, die ähnlich gering wie jene von Siliziumoxid ist (εr=3.9) . Das gemäß dem erfindungsgemäß beanspruchten plasmaangeregten chemischen Gasphasenabscheide- Verfahren hergestellte Silizium-Sauerstoff-Stickstoff-haltige Material enthält zusätzlich eher geringe Mengen vonDielectric constant, which is similar to that of silicon oxide (ε r = 3.9). The silicon-oxygen-nitrogen-containing material produced according to the plasma-excited chemical vapor deposition process claimed according to the invention additionally contains rather small amounts of
Stickstoff (vorzugsweise im einstelligen Prozentbereich) . Die Stickstoffko ponente des mittels des erfindungsgemäßen Verfahrens hergestellten Silizium-Sauerstoff-Stickstoff- haltigen Materials bewirkt anschaulich Siliziumnitrid- ähnliche Eigenschaften hinsichtlich der Abscheidbarkeit von Ozon/TEOS darauf. Anders ausgedrückt ist das Material der Erfindung sehr schlecht dazu geeignet, dass Ozon/TEOS darauf abgeschieden werden kann. Die Kombination aus einem geringen k- ert und einer geringen Neigung, als Träger zum Abscheiden von Ozon/TEOS zu dienen, bewirkt eine hervorragende Eignung des erfindungsgemäß hergestellten Materials als Intermetalldielektrikum eines integrierten Schaltkreises mit Airgap-Strukturen.Nitrogen (preferably in the one-digit percentage range). The nitrogen component of the silicon-oxygen-nitrogen-containing material produced by means of the method according to the invention clearly causes properties similar to silicon nitride with regard to the separability of ozone / TEOS thereon. In other words, the material of the invention is very poor at allowing ozone / TEOS to be deposited on it. The combination of a low core and a low tendency to serve as a carrier for separating ozone / TEOS makes the material produced according to the invention extremely suitable as an intermetallic dielectric of an integrated circuit with air gap structures.
Anders ausgedrückt weist das erfindungsgemäß hergestellte Material im Wesentlichen die günstigen dielektrischen Eigenschaften von Siliziumoxid auf (d.h. einen geringen Wert der relativen Dielektrizitätskonstante und somit eine geringe RC-Schaltverzögerung) , simultan hat die Materialzusammensetzung (wahrscheinlich insbesondere dieIn other words, the material produced according to the invention essentially has the favorable dielectric properties of silicon oxide (i.e. a low value of the relative dielectric constant and thus a low RC switching delay), and simultaneously the material composition (probably especially that
Stickstoff-Komponente darin) die Wirkung, dass das Material, das auf der Basis eines organischen Precursors gebildet ist, hinsichtlic des selektiven Abscheidens von Ozon/TEOS Materialeigenschaften aufweist, die eher Siliziumnitrid ähneln. Somit ist ein ideales Material alsNitrogen component therein) the effect that the material that is formed on the basis of an organic precursor with regard to the selective deposition of ozone / TEOS has material properties that are more similar to silicon nitride. This makes it an ideal material
Intermetalldielektrikum zwischen Leiterbahnen einer Low-k- Anordnung bereitgestellt . Aufgrund der guten mechanischen Stabilität des Materials erlaubt es auch das Bilden von Airgaps zwischen Strukturen des Materials.Intermetallic dielectric provided between conductor tracks of a low-k arrangement. Due to the good mechanical stability of the material, it also allows airgaps to be formed between structures of the material.
Somit ist es erfindungsgemäß realisiert, das gemäß dem Stand der Technik verwendete Siliziumnitrid als Material zwischen Airgaps durch ein Material auf Basis von Siliziumoxid zu ersetzen, ohne die Vorteile der selektiven Abscheidung verlieren.It is thus realized according to the invention to replace the silicon nitride used according to the prior art as a material between airgaps with a material based on silicon oxide without losing the advantages of selective deposition.
Dieses Material wird erfindungsgemäß hergestellt, indem abgesehen von einem organischen Silizium-Precursormaterial als Quelle für die Siliziumkomponente und die Sauerstoffkomponente des erfindungsgemäßen Materials zusätzlich Stickstoffmaterial in die PECVD-Verfahrenskammer ("plasma enhanced chemical vapour deposition") eingebracht wird., wodurch das erfindungsgemäße Material erhalten wird. Bei Verwendung dieses Verfahrens werden anschaulich geringe Mengen Stickstoff in eine im Wesentlichen auf Siliziumoxidmaterial basierenden Matrix eingebaut, was zu der vorteilhaften Kombination von Materialeigenschaften führt.This material is produced according to the invention by introducing nitrogen material into the PECVD process chamber ("plasma enhanced chemical vapor deposition") in addition to an organic silicon precursor material as a source for the silicon component and the oxygen component of the material according to the invention, thereby obtaining the material according to the invention becomes. When using this method, clearly small amounts of nitrogen are built into a matrix based essentially on silicon oxide material, which leads to the advantageous combination of material properties.
Siliziumoxid wird häufig durch einen plasmaaktivierten TEOS Prozess abgeschieden (sogenanntes "PE-TEOS") . Basierend auf der Beobachtung, dass auf Siliziumnitrid keine oder nur eine sehr; geringe Ozon/TEOS Abscheidung erfolgt, wird erfindungsgemäß dem PE-TEOS Prozess Stickstoff zugesetzt. Durch den Einbau geringer Stickstoff engen, typischerweise im Prozentbereich, kann die Selektivität der Ozon/TEOS Abscheidung stark erhöht werden, so dass ähnlich wie bei Siliziumnitrid keine oder nur eine äußerst geringeSilicon oxide is often deposited using a plasma-activated TEOS process (so-called "PE-TEOS"). Based on the observation that silicon nitride has no or very little; low ozone / TEOS separation takes place, according to the invention nitrogen is added to the PE-TEOS process. By installing low nitrogen tightness, typically in the percentage range, the selectivity of the ozone / TEOS separation can be greatly increased, so that, as with silicon nitride, none or only an extremely low one
Abscheidung von Ozon/TEOS auf der Schicht erfolgt. Simultan bleiben die Eigenschaften von Siliziumoxid weitgehend erhalten. Die effektive Dielektrizitätskonstante einer Airgap-Struktur mit dem modifizierten PE-TEOS sinkt, je nach Geometrie, im Vergleich zu den Varianten mit Siliziumnitrid von Werten im Bereich von drei auf Werte um zwei.Deposition of ozone / TEOS takes place on the layer. The properties of silicon oxide remain largely simultaneous receive. The effective dielectric constant of an air gap structure with the modified PE-TEOS, depending on the geometry, drops from values in the range from three to values by two compared to the variants with silicon nitride.
Die mit dem erfindungsgemäßen Verfahren hergestellten Siliziumoxid-haltigen Schichten mit eingebautem Stickstoffmaterial weisen typischerweise einen Brechungsindex von n=l .5 auf, wohingegen mittels thermischen Oxidierens hergestelltes Siliziumoxid einen Brechungsindex von 1.45 hat. Der Stickstoffgehalt des erfindungsgemäßen Materials liegt typischerweise im Atomprozentbereich. Eine Abscheidung von Ozon/TEOS findet auf dieser Art von mit geringen Mengen Stickstoff versehenem Siliziumoxid nicht oder nur sehr schlecht statt.The silicon oxide-containing layers with built-in nitrogen material produced by the method according to the invention typically have a refractive index of n = 1.5, whereas silicon oxide produced by means of thermal oxidation has a refractive index of 1.45. The nitrogen content of the material according to the invention is typically in the atomic percent range. A separation of ozone / TEOS does not take place or only very poorly on this type of silicon oxide provided with small amounts of nitrogen.
Essentiell zum Erreichen der vorteilhaften Materialeigenschaften des Materials der Erfindung ist die Verwendung eines organischen (d.h. auf Kohlenstoff- Verbindungen basierenden) Silizium-Precursormaterials, vorzugsweise Tetraethylorthosilikat (TEOS) , auch bezeichnet als Tetraethoxysilan. Mit dem anorganischen Material Silan (SiH4) zum Beispiel kann das Material mit den vorteilhaften Eigenschaften nicht erhalten werden.Essential for achieving the advantageous material properties of the material of the invention is the use of an organic (ie based on carbon compounds) silicon precursor material, preferably tetraethyl orthosilicate (TEOS), also referred to as tetraethoxysilane. With the inorganic material silane (SiH 4 ), for example, the material with the advantageous properties cannot be obtained.
Das erfindungsgemäß verwendete plasmaangeregte chemische Gasphasenabscheide-Verfahren (PECVD) ist eine spezielle Technik innerhalb des allgemeineren CVD-Verfahrens ("chemical vapour deposition" ) .The plasma-excited chemical vapor deposition process (PECVD) used according to the invention is a special technique within the more general CVD process ("chemical vapor deposition").
Das CVD-Verfahren ist eine Beschichtungstechnologie zum Abscheiden dünner Schichten aus der Gasphase auf einem festen Substrat. Das Prinzip des CVD Verfahrens besteht darin, dass gasförmige Ausgangsmaterialien, sogenannte Precursoren (Vorläufer) , über ein Substrat geleitet und chemisch in deren Bestandteile zerlegt werden, wodurch auf der Substratoberfläche eine neue Schicht aufwächst . Das Zerlegen der Precursoren erfolgt zumeist thermisch, d.h. mittels Heizens des Substrats. Das eigentliche Abscheiden erfolgt unter Beteiligung einer chemischen Reaktion. Beispielsweise reagiert eine flüchtige gasförmige Komponente mit einem anderem Gas zu einem festen Material , das auf dem Substrat abgeschieden wird. Allerdings sind bei dem CVD Verfahren die Prozesstemperaturen relativ hoch.The CVD process is a coating technology for depositing thin layers from the gas phase on a solid substrate. The principle of the CVD process is that gaseous starting materials, so-called precursors, are passed over a substrate and chemically broken down into their constituent parts, whereby a new layer grows on the substrate surface. The disassembly the precursors are mostly thermal, ie by heating the substrate. The actual separation takes place with the participation of a chemical reaction. For example, a volatile gaseous component reacts with another gas to form a solid material that is deposited on the substrate. However, the process temperatures in the CVD process are relatively high.
Mit wesentlich geringeren Prozesstemperaturen ist das plasmaangeregte chemische Gasphasenabscheide-Verfahren (PECVD, "plasma enhanced chemical vapour deposition") durchfüb-rbar . Während bei einem CVD-Prozess die Gasphasenreaktion durch thermische Energie infolge Heizens des Substrats ausgelöst wird, beruht ein PECVD-Verfahren auf der Überführung eines Gases in den Plasmazustand in der Nähe der Substratoberfläche. Eines der Reaktionsprodukte ist dabei ein fester Stoff, der sich auf der Oberfläche niederschlägt, wodurch eine neue Schicht aus dem erfindungsgemäßen Material gebildet wird. In einem PECVD-Reaktor wird zwischen dem Substrathalter, der als Elektrode dient, und einer weiterenThe plasma-excited chemical vapor deposition process (PECVD, "plasma enhanced chemical vapor deposition") can be carried out with significantly lower process temperatures. While in a CVD process the gas phase reaction is triggered by thermal energy due to the heating of the substrate, a PECVD process is based on the conversion of a gas into the plasma state in the vicinity of the substrate surface. One of the reaction products is a solid substance which is deposited on the surface, as a result of which a new layer is formed from the material according to the invention. In a PECVD reactor is between the substrate holder, which serves as an electrode, and another
Elektrode durch ein starkes elektrisches Wechselfeld ein Plasma gezündet. Durch die Energie des Feldes werden Bindungen der in den PECVD-Reaktor eingeleiteten Gasmoleküle aufgebrochen und die Gasmoleküle zersetzt.A plasma is ignited by a strong alternating electric field. The energy of the field breaks bonds in the gas molecules introduced into the PECVD reactor and the gas molecules are broken down.
Gemäß einem weiteren Aspekt der Erfindung ist ein Verfahren zum Herstellen einer Schicht-Anordnung geschaffen,According to a further aspect of the invention, a method for producing a layer arrangement is created,
• bei dem über einem Substrat mit einer Mehrzahl von elektrisch leitfähigen Strukturen und/oder über einem Teil der Oberfläche der elektrisch leitfähigen Strukturen eine Schicht aus Sauerstoff-Material Stickstoff-Material mittels eines plasmaangeregten chemischen Gasphasenabscheide-Verfahrens gebildet wird, wobei während des Zufuhrens von Silizium-Material und Sauerstoff-Material mittels eines organischen Silizium- Precursormaterials Stickstoff-Material zugeführt wird, wobei die Schicht aus Sauerstoff-Material Stickstoff- Material gebildet wird derart, dass zwischen den Leiterbahnen ein materialfreier Bereich verbleibt,In which a layer of oxygen material nitrogen material is formed over a substrate with a plurality of electrically conductive structures and / or over part of the surface of the electrically conductive structures by means of a plasma-excited chemical vapor deposition process, during the supply of silicon -Material and oxygen material by means of an organic silicon precursor material nitrogen material is supplied, the layer of oxygen material nitrogen- Material is formed in such a way that a material-free area remains between the conductor tracks,
• bei dem auf der Schicht aus Sauerstoff-Material Stickstoff-Material eine Zwischenschicht aus elektrisch isolierendem Material aufgebracht wird, undIn which an intermediate layer of electrically insulating material is applied to the layer of oxygen material, nitrogen material, and
• bei dem selektiv auf der Zwischenschicht eine Deckschicht aufgebracht wird, mittels welcher der materialfreie Bereich zwischen den elektrisch leitfähigen Strukturen gegenüber der Umgebung versiegelt wird, so dass der materialfreie Bereich einen Hohlraum ausbildet .In which a cover layer is selectively applied to the intermediate layer, by means of which the material-free area between the electrically conductive structures is sealed from the surroundings, so that the material-free area forms a cavity.
Ferner wird eine Schicht-Anordnung bereitgestellt,A layer arrangement is also provided,
• mit einem Substrat; • mit zwei elektrisch leitfähigen Strukturen auf dem Substrat, wobei zumindest ein Teilbereich zwischen den zwei elektrisch leitfähigen Strukturen materialfrei ist;• with a substrate; With two electrically conductive structures on the substrate, at least one partial area between the two electrically conductive structures being free of material;
• mit einer Schicht aus Silizium-Sauerstoff-Stickstoff- haltigem Material, welches mittels eines plasmaangeregten chemischen Gasphasenabscheide- Verfahrens gebildet wurde, wobei während des Zufuhrens von Silizium-Material und Sauerstoff-Material mittels eines organischen Silizium-Precursormaterials Stickstoff-Material zugeführt wurde, wobei die Schicht derart auf den zwei elektrisch leitfähigen Strukturen aufgebracht ist, dass zwischen den zwei elektrisch leitfähigen Strukturen ein materialfreier Bereich verbleibt ,-• With a layer of silicon-oxygen-nitrogen-containing material, which was formed by means of a plasma-excited chemical vapor deposition process, wherein during the supply of silicon material and oxygen material, nitrogen material was supplied by means of an organic silicon precursor material, wherein the layer is applied to the two electrically conductive structures in such a way that a material-free area remains between the two electrically conductive structures,
• mit einer Zwischenschicht aus elektrisch isolierendem Material auf der Schicht aus Silizium-Sauerstoff- Stickstoff-haltigem Material;• with an intermediate layer of electrically insulating material on the layer of silicon-oxygen-nitrogen-containing material;
• mit einer selektiv auf der Zwischenschicht gebildeten Deckschicht, mittels welcher der materialfreie Bereich zwischen den zwei elektrisch leitfähigen Strukturen gegenüber der Umgebung versiegelt ist. Insbesondere wurde anschaulich erfindungsgemäß erkannt, dass auf dem auf oben beschriebene Weise gebildeten Silizium- Sauerstoff-Stickstoff-haltigem Material das Material der Deckschicht nicht abgeschieden wird, womit eine selektive Abscheidung der Deckschicht nur auf der Zwischenschicht zum „Schließen der Airgaps" erreicht wird, ohne dass die Breite der Airgaps zwischen den leitfähigen Strukturen reduziert wird. Damit wird auf sehr einfache Weise ein Schließen der Airgaps mittels der Deckschicht erreicht, wobei ein zusätzlicher Vorteil in der niedrigen relativenWith a cover layer selectively formed on the intermediate layer, by means of which the material-free area between the two electrically conductive structures is sealed from the surroundings. In particular, it was clearly demonstrated according to the invention that the material of the cover layer is not deposited on the silicon-oxygen-nitrogen-containing material formed in the manner described above, so that a selective deposition of the cover layer is achieved only on the intermediate layer for "closing the airgaps" without that the width of the airgaps between the conductive structures is reduced. This makes it very easy to close the airgaps by means of the cover layer, with an additional advantage in the low relative
Dielektrizitätskonstante des Silizium-Sauerstoff-Stickstoff- haltigem Materials zu sehen ist.Dielectric constant of the material containing silicon-oxygen-nitrogen can be seen.
Bevorzugte Weiterbildung der Erfindung ergeben sich aus den abhängigen Ansprüchen.Preferred developments of the invention result from the dependent claims.
Als organisches Silizium-Precursormaterial wird vorzugsweise ein Sauerstoff-haltiges Material verwendet. Dieses Sauerstoff-haltige Material kann als Sauerstoffquelle zum Bilden des erfindungsgemäßen Silizium-Sauerstoff-Stickstoff- haltigen Materials dienen.An oxygen-containing material is preferably used as the organic silicon precursor material. This oxygen-containing material can serve as an oxygen source for forming the silicon-oxygen-nitrogen-containing material according to the invention.
Besonders günstig ist es, als organisches Silizium- Precursormaterial Tetraethylorthosilikat (TEOS) , d.h. (C2H5θ)4Si, zu verwenden. Dieses Material stellt in besonders günstiger Weise eine Siliziumquelle und eine Sauerstoffquelle für das erfindungsgemäß gebildete Silizium-Sauerstoff- Stickstoff-haltige Material dar, in welches aufgrund der chemischen Prozesse beim Zersetzen des TEOS-Materials simultan eingeleitetes Stickstoffmaterial eingebaut wird.It is particularly favorable to use tetraethyl orthosilicate (TEOS) as the organic silicon precursor material, i.e. (C2H5θ) 4Si. This material represents in a particularly favorable manner a silicon source and an oxygen source for the silicon-oxygen-nitrogen-containing material formed in accordance with the invention, into which nitrogen material introduced simultaneously due to the chemical processes during the decomposition of the TEOS material is incorporated.
Alternativ können im Rahmen der Erfindung zum Beispiel die folgenden Materialien als organisches Silizium- Precursormaterial verwendet werden: Methyltriethoxysilan (MTrEOS) , Dimethyldiethoxysilan (DMDEOS) ,Alternatively, the following materials can be used as organic silicon precursor material within the scope of the invention: methyltriethoxysilane (MTrEOS), dimethyldiethoxysilane (DMDEOS),
Trimethylethoxysilan (TrMEOS) und/oder Tetramethylsilan (TMS) . Vorzugsweise werden bei dem plasmaangeregten chemischen Gasphasenabscheide-Verfahren der Erfindung Tetraethylorthosilikat (TEOS) und Stickstoff (N2) als Precursoren verwendet, wobei das Flussratenverhältnis von Tetraethylorthosilikat zu Stickstoff zwischen 1:10 und 1:1 eingestellt wird. Als Flussratenverhältnis wird der Quotient aus den Flussraten (z.B. in sccm, Standardkubikzentimeter pro Minute) der beiden Einzelkomponenten verstanden.Trimethylethoxysilane (TrMEOS) and / or tetramethylsilane (TMS). Preferably, tetraethyl orthosilicate (TEOS) and nitrogen (N 2 ) are used as precursors in the plasma-excited chemical vapor deposition method of the invention, the flow rate ratio of tetraethyl orthosilicate to nitrogen being set between 1:10 and 1: 1. The flow rate ratio is the quotient of the flow rates (eg in sccm, standard cubic centimeters per minute) of the two individual components.
Weiter vorzugsweise wird das Flussratenverhältnis von Tetraethylorthosilikat zu Stickstoff zwischen 1:5 und 1:2 eingestellt .More preferably, the flow rate ratio of tetraethyl orthosilicate to nitrogen is set between 1: 5 and 1: 2.
Besonders vorteilhaft ist es, das Flussratenverhältnis vonIt is particularly advantageous to determine the flow rate ratio of
Tetraethylorthosilikat zu Stickstoff zwischen 11:40 und 7:20 einzustellen.Adjust tetraethyl orthosilicate to nitrogen between 11:40 and 7:20.
Während des plasmaangeregten chemischen Gasphasenabscheide- Verfahrens kann Helium als Trägergas zugeführt werden.Helium can be supplied as a carrier gas during the plasma-excited chemical vapor deposition process.
Der Druck in der Verfahrenskammer wird vorzugsweise zwischen 440Pa und 1750Pa, weiter vorzugsweise zwischen 700Pa und llOOPa eingestellt.The pressure in the process chamber is preferably set between 440 Pa and 1750 Pa, more preferably between 700 Pa and 10OOPa.
Die Temperatur in der Verfahrenkammer kann zwischen 300°C und 500°C betragen, wobei eine Temperatur zwischen 380°C und 430°C besonders vorteilhaft ist.The temperature in the process chamber can be between 300 ° C and 500 ° C, a temperature between 380 ° C and 430 ° C being particularly advantageous.
Im Weiteren wird das erfindungsgemäße Silizium-Sauerstoff-Furthermore, the silicon oxygen
Stickstoff-haltige Material, das gemäß dem erfindungsgemäßen plasmaangeregten chemischen Gasphasenabscheide-Verfahren hergestellt ist, näher beschrieben. Ausgestaltungen des plasmaangeregten chemischen Gasphasenabscheide-Verfahrens gelten auch für das Silizium-Sauerstoff-Stickstoff-haltige Material, und Ausgestaltungen des Silizium-Sauerstoff- Stickstoff-haltigen Materials gelten auch für das plasmaangeregte chemische Gasphasenabscheide-Verfahren.Nitrogen-containing material which is produced in accordance with the plasma-excited chemical vapor deposition method according to the invention is described in more detail. Refinements of the plasma-excited chemical vapor deposition process also apply to the material containing silicon-oxygen-nitrogen, and refinements of the silicon-oxygen Nitrogen-containing material also applies to the plasma-excited chemical vapor deposition process.
Das Silizium-Sauerstoff-Stickstoff-haltige Material enthält vorzugsweise zwischen 0.1 Atomprozent und 10 AtomprozentThe silicon-oxygen-nitrogen-containing material preferably contains between 0.1 atomic percent and 10 atomic percent
Stickstoff. Weiter vorzugsweise sind in dem erfindungsgemäßen Material zwischen 0.5 Atomprozent und 5 Atomprozent Stickstoff enthalten. Besonders günstig ist es, die Parameter des plasmaangeregten chemischen Gasphasenabscheide-Verfahrens derart einzustellen, dass zwischen 1.4 Atomprozent und 2.3 Atomprozent Stickstoff in dem Material enthalten sind. In diesem Falle ist eine besonders gute Balance zwischen geringer Dielektrizitätskonstante und besonders schlechter Selektivität bezüglich des Aufwachsens von Ozon/TEOS erreichbar.Nitrogen. More preferably, between 0.5 atom percent and 5 atom percent nitrogen are contained in the material according to the invention. It is particularly advantageous to set the parameters of the plasma-excited chemical vapor deposition process in such a way that the material contains between 1.4 atomic percent and 2.3 atomic percent nitrogen. In this case, a particularly good balance between low dielectric constant and particularly poor selectivity with regard to the growth of ozone / TEOS can be achieved.
Das Atomprozentverhältnis zwischen Sauerstoff und Silizium ist vorzugsweise zwischen 1.8 und 1.99. Mit anderen Worten ist das Silizium-Sauerstoff-Stickstoff-haltige Material gegenüber stöchiometrischem Siliziumoxid mit einemThe atomic percentage ratio between oxygen and silicon is preferably between 1.8 and 1.99. In other words, the silicon-oxygen-nitrogen-containing material is compared to stoichiometric silicon oxide with one
Atomprozentverhältnis zwischen Sauerstoff und Silizium von zwei dahingehend modifiziert, dass anschaulich Sauerstoffmaterial (zumindest teilweise) durch das zusätzliche Stickstoffmaterial ersetzt ist.Atomic percent ratio between oxygen and silicon of two modified such that vividly oxygen material is (at least partially) replaced by the additional nitrogen material.
Zusätzlich zu dem Siliziummaterial, dem Sauerstoffmaterial und dem Stickstoffmaterial kann das erfindungsgemäße Material zwischen 0.4 Atomprozent und 2.4 Atomprozent Kohlenstoff aufweisen. Möglicherweise kann auch der Kohlenstoff zu den günstigen Materialeigenschaften beitragen, da das erfindungsgemäße Ziel erst bei Verwendung eines organischen, d.h. kohlenstoffhaltigen, Silizium-Precursormaterials erreicht wird.In addition to the silicon material, the oxygen material and the nitrogen material, the material according to the invention can have between 0.4 atom percent and 2.4 atom percent carbon. Possibly the carbon can also contribute to the favorable material properties, since the aim according to the invention only takes place when an organic, i.e. carbon-containing, silicon precursor material is achieved.
Ferner kann das Silizium-Sauerstoff-Stickstoff-haltige Material der Erfindung zwischen 3 Atomprozent und 13 Atomprozent Wasserstoff aufweisen. Besonders günstige Materialeigenschaften werden mit einem Material der Summenformel Sii .00°l .90H 0.27 c 0.045N 0.06 erreicht. Jeder der Indexzahlen (1.00, 1.90, usw.) in der genannten Summenformel kann um zwanzig Prozent nach oben oder unten variieren, weiter vorzugsweise um 10 Prozent, noch weiter vorzugsweise um 3 Prozent, ohne dass die vorteilhaften Eigenschaften des Materials verloren gehen würden.Furthermore, the silicon-oxygen-nitrogen-containing material of the invention may have between 3 atom percent and 13 atom percent hydrogen. Particularly favorable material properties are achieved with a material of the formula Sii .00 ° l . 9 0 H 0 . 27 c 0 .0 4 5 N 0 . 0 6 reached. Each of the index numbers (1.00, 1.90, etc.) in the above formula can vary up or down by 20 percent, more preferably by 10 percent, even more preferably by 3 percent, without the advantageous properties of the material being lost.
Im Weiteren werden Ausgestaltungen der erfindungsgemäßenIn addition, embodiments of the invention
Schicht-Anordnung beschrieben. Ausgestaltungen des Silizium- Sauerstoff-Stickstoff-Materials gelten auch für die Schicht- Anordnung und umgekehrt .Layer arrangement described. Embodiments of the silicon-oxygen-nitrogen material also apply to the layer arrangement and vice versa.
Bei der erfindungsgemäßen Schicht-Anordnung kann dieIn the layer arrangement according to the invention, the
Zwischenschicht aus Silan-basiertem (SiH ) Siliziumoxid gebildet sein. Wird dann eine Deckschicht aus Siliziumoxid selektiv abgeschieden, das basierend auf Ozon-aktiviertem Tetraethylorthosilikat gebildet ist, so wird eine Schicht- Anordnung erhalten, die nach außen hin sicher abgeschlossen ist, da das Material der Deckschicht anschaulich einen Graben der Schich -Anordnung überwachsen kann. Simultan ist aufgrund der Materialkombination vermieden, dass beim Aufwachsen einer solchen Deckschicht der Graben teilweise mit Deckschicht- Material gefüllt wird, was aus der schlechten Abscheidbarkeit des Materials der Deckschicht auf dem erfindungsgemäßen Material innerhalb des Grabens resultiert.Intermediate layer can be formed from silane-based (SiH) silicon oxide. If a cover layer made of silicon oxide, which is formed based on ozone-activated tetraethyl orthosilicate, is then selectively deposited, a layer arrangement is obtained which is securely closed to the outside, since the material of the cover layer can clearly overgrow a trench of the layer arrangement. Simultaneously, due to the combination of materials, it is avoided that when such a cover layer grows, the trench is partially filled with cover layer material, which results from the poor ability to separate the material of the cover layer onto the material according to the invention within the trench.
Es ist anzumerken, dass die genauen Prozessparameter zum Herstellen des erfindungsgemäßen Materials von derIt should be noted that the exact process parameters for the production of the material according to the invention are different from the
Prozesskammer, etc. abhängen.Process chamber, etc. depend.
Ausführungsbeispiele der Erfindung sind in den Figuren dargestellt und werden im Weiteren näher erläutert.Exemplary embodiments of the invention are shown in the figures and are explained in more detail below.
Es zeigen: Figur 1 eine Querschnittsansicht einer Schicht-Anordnung gemäß einem ersten Ausfü rungsbeispiel der Erfindung,Show it: FIG. 1 shows a cross-sectional view of a layer arrangement according to a first exemplary embodiment of the invention,
Figur 2 eine elektronenmikroskopische Querschnittsansicht einer Schicht-Anordnung ohne Verwendung des erfindungsgemäßen Materials,FIG. 2 shows an electron microscopic cross-sectional view of a layer arrangement without using the material according to the invention,
Figur 3 eine elektronenmikroskopische Querschnittsansicht einer Schicht-Anordnung unter Verwendung des erfindungsgemäßen Materials,FIG. 3 shows an electron microscopic cross-sectional view of a layer arrangement using the material according to the invention,
Figur 4 eine andere elektronenmikroskopische Querschnittsansicht einer Schicht-Anordnung unter Verwendung des erfindungsgemäßen Materials,FIG. 4 shows another cross-sectional view of an electron microscope of a layer arrangement using the material according to the invention,
Figur 5 eine Querschnittsansicht einer Schicht-Anordnung gemäß einem zweiten Ausführungsbeispiel der Erfindung, Figur 6 eine Querschnittsansicht einer Schicht-Anordnung gemäß einem dritten Ausführungsbeispiel der Erfindung.5 shows a cross-sectional view of a layer arrangement according to a second exemplary embodiment of the invention, FIG. 6 shows a cross-sectional view of a layer arrangement according to a third exemplary embodiment of the invention.
Gleiche oder ähnliche Komponenten in unterschiedlichen Figuren sind mit gleichen Bezugsziffern versehen.The same or similar components in different figures are provided with the same reference numbers.
Die Darstellungen in den Figuren sind schematisch und nicht maßstäblich.The representations in the figures are schematic and not to scale.
Tabelle 1 Table 1
Tabelle 1 zeigt die Schritte und Parameter eines Prozessablaufs für eine "P5000" -Anlage der Firma Applied TM Materials , mit dem Silizium-Sauerstoff-Stickstoff-haltiges Material (d.h. eine modifizierte PE-TEOS-Schicht) gemäß einem bevorzugten Ausführungsbeispiel der Erfindung hergestellt werden kann.Table 1 shows the steps and parameters of a process sequence for a "P5000" system from Applied TM Materials, with which silicon-oxygen-nitrogen-containing material (ie a modified PE-TEOS layer) is produced in accordance with a preferred exemplary embodiment of the invention can.
Im Weiteren wird bezugnehmend auf Tabelle 1 der Ablauf dieses Verfahrens zum Herstellen des erfindungsgemäßen Silizium- Sauerstoff-Stickstoff-haltigen Materials gemäß einem bevorzugten Ausführungsbeispiel der Erfindung beschrieben. Zunächst wird in einem ersten Schritt, dem sogenannten Gas- Einfüllschritt, bei einer maximalen Schritt-Zeit von 10.0s der Druck in der Verfahrenskammer auf 880Pa eingestellt. Bei ausgeschalteter Hochfrequenzleistung wird die Temperatur des Suszeptors von der Standardtemperatur 400° C auf 415 °C erhöht, so dass beim späteren Einladen der kalten Silizium-Scheibe keine Abkühlung des Suszeptors eintritt. Als Gasflüsse werden für eine 02 -Komponente (Sauerstoff) 700sccm (Standardkubikzentimeter pro Minute) , für ein Helium- Trägergas 2500sccm, für TEOS als einen organischen Silizium- Precursor eine Flussrate von 700sccm und für Stickstoff eine Flussrate von 2000sccm eingestellt.The sequence of this method for producing the silicon-oxygen-nitrogen-containing material according to the invention in accordance with a preferred exemplary embodiment of the invention is described below with reference to Table 1. First, in a first step, the so-called gas filling step, the pressure in the process chamber is set to 880 Pa with a maximum step time of 10.0 s. When the high-frequency power is switched off, the temperature of the susceptor is increased from the standard temperature of 400 ° C. to 415 ° C., so that the susceptor does not cool down when the cold silicon wafer is later loaded. The gas flows set for a 02 component (oxygen) are 700sccm (standard cubic centimeters per minute), for a helium carrier gas 2500sccm, for TEOS as an organic silicon precursor a flow rate of 700sccm and for nitrogen a flow rate of 2000sccm.
In einem zweiten Verfahrensabschnitt, Stabilisierschritt genannt, wird die maximale Schrittzeit bei 10.0s gehalten. Der Druck in der Verfahrenskammer wird weiterhin auf 880Pa gehalten. Ohne Hochfrequenzleistung wird dann die Temperatur des Suszeptors auf 400°C gebracht und eine Modifikation der Gasflüsse dahingehend vorgenommen, dass die 02~Komponente auf 155sccm, die Helium-Trägergas-Komponente auf 850sccm, dieIn a second process step, called the stabilization step, the maximum step time is kept at 10.0s. The pressure in the process chamber is maintained at 880 Pa. Without high-frequency power, the temperature of the susceptor is then brought to 400 ° C. and the gas flows are modified such that the 02 component is 155sccm, the helium carrier gas component is 850sccm
TEOS-Komponente auf 550sccm und die Stickstoff-Komponente auf 2000sccm gebracht wird.TEOS component is brought to 550sccm and the nitrogen component to 2000sccm.
In einem dritten Verfahrensabschnitt, der als Abscheideschritt bezeichnet wird, wird die Schrittzeit entsprechend der gewünschten Schichtdicke eingestellt . Bei einer Schrittzeit von 60.0s wird zum Beispiel eine Schicht von ca. 450nm Dicke aufgewachsen. Der Druck in der Kammer wird auf 880Pa gehalten, und Hochfrequenz wird mit einer Leistung von 900W zugeschaltet. Die Temperatur des Suszeptors wird auf 400°C gehalten. Die Gasflüsse werden folgendermaßen eingestellt: Die O2 -Komponente wird auf 150sccm eingestellt, die Helium-Komponente auf 700sccm, die TEOS-Komponente wird auf 550sccm geregelt und die Stickstoff-Komponente auf 2000sccm. In einem vierten Verfahrensabschnitt, hier als Pumpverfahren bezeichnet, wird die maximale Schritt-Zeit wird auf 5s verringert. Hinsichtlich des Drucks wird die Drossel vollständig geöffnet, die Hochfrequenzleistung wird auf 0W zurückgeschaltet. Ferner werden die Gasflüsse von Sauerstoff, Helium, TEOS und Stickstoff zurückgefahren.In a third process step, which is referred to as the deposition step, the step time is set according to the desired layer thickness. With a step time of 60.0s, for example, a layer of approx. 450 nm thickness is grown. The pressure in the chamber is kept at 880Pa and high frequency is switched on with a power of 900W. The temperature of the susceptor is kept at 400 ° C. The gas flows are set as follows: the O2 component is set to 150sccm, the helium component to 700sccm, the TEOS component to 550sccm and the nitrogen component to 2000sccm. In a fourth process step, referred to here as the pump process, the maximum step time is reduced to 5 s. Regarding the pressure, the throttle is opened completely, the high-frequency power is switched back to 0W. The gas flows of oxygen, helium, TEOS and nitrogen are also reduced.
Im Weiteren wird bezugnehmend auf Fig.l eine Schicht- Anordnung 100 gemäß einem ersten Ausführungsbeispiel der Erfindung beschrieben.A layer arrangement 100 according to a first exemplary embodiment of the invention is described below with reference to FIG.
Die Schicht-Anordnung 100 weist ein Silizium-Substrat 101 auf, auf dem eine erste Kupfer-Leiterbahn 102 und eine zweite Kupfer-Leiterbahn 103 gebildet sind. Der Bereich zwischen den beiden elektrisch leitfähigen Strukturen 102, 103 ist materialfrei, nämlich der Bereich von Airgaps 107. Erfindungsgemäß hergestelltes Slχ , 00°1.90H0.27^0.045NO .06" Material 104 ist auf den beiden elektrisch leitfähigen Strukturen 102, 103 gebildet. Auf dem Sii _ Q0°1.90H0.27c0.045N0.06~Material 1°4 ist eine Silam- basierte Siliziumoxid-Zwischenschicht 105 aufgebracht. Auf der Silan-basierten Siliziumoxid-Zwischenschicht 105 ist eine Ozon/TEOS-Deckschicht 106 (d.h. durch Ozon-aktivierte Zersetzung von Tetraethylorthosilikat gebildetes Siliziumoxid) gebildet, mittels welcher der materialfreie Bereich 107 zwischen den zwei elektrisch leitfähigen Strukturen 102, 103 gegenüber der Umgebung versiegelt ist.The layer arrangement 100 has a silicon substrate 101, on which a first copper conductor track 102 and a second copper conductor track 103 are formed. The area between the two electrically conductive structures 102, 103 is material-free, namely the area of airgaps 107. Slχ. 00 ° 1 .90 H 0. 2 7 ^ 0.045 N O .06 "material 104 produced according to the invention is electrically conductive on the two Structures 102, 103 are formed on the Sii_Q0 ° 1.90 H 0.27 c 0.045 N 0.06 ~ Mater i a l 1 ° 4, a silam-based silicon oxide intermediate layer 105. On the silane-based silicon oxide intermediate layer 105 is an ozone / TEOS cover layer 106 (ie silicon oxide formed by ozone-activated decomposition of tetraethyl orthosilicate), by means of which the material-free region 107 between the two electrically conductive structures 102, 103 is sealed from the environment.
Das erfindungsgemäße Si^ .00°1.90 H 0.27^0.045 N 0.06~Material 104 bedeckt teilweise die Kupfer-Leiterbahnen 102, 103. Das erfindungsgemäße Material weist hinsichtlich seiner dielektrischen Eigenschaften im Wesentlichen jene von Siliziumoxid auf. Somit ist die effektive Dielektrizitätskonstante des Bereichs zwischen den Leiterbahnen 102, 103, gebildet von den Airgaps 107 mit εr ungefähr eins (und ggf. Sii .00°1.90H0.27c0.045N0.06""Material 104 mit εr ungefähr 3.9) sehr gering. Somit sind bei Anliegen von Signalen an die Kupfer-Leiterbahnen 102, 103 RC- SignalverzögerungsZeiten gering und somit ein unerwünschtes Übersprechen zwischen den Leiterbahnen 102, 103 vermieden. Beim Verschließen oder Versiegeln, d.h. beim vollständigen Bedecken, des Grabens, der aus Komponenten 102 bis 105 gebildet ist, wird die Ozon/TEOS Deckschicht 106 selektiv nur auf der Silan-basierten Siliziumoxid-Zwischenschicht 105 gebildet, wobei aufgrund des in dem erfindungsgemäßen sil .00°1.90H0.27co .045N0.06~Material 104 enthaltenen Stickstoffbestandteils ein unerwünschtes selektives Abscheiden von Deckschicht-Material auf demThe Si ^ invention. 00 ° 1 . 90 H 0 . 27 ^ 0 . 045 N 0 .06 ~ Ma TERIAL 104 partially covers the copper traces 102, 103. The material of the invention has with respect to its dielectric properties substantially that of silicon oxide. Thus, the effective dielectric constant of the region between the interconnects 102, 103, formed by the air gaps 107 having ε r about one (and possibly Sii .00 ° 1.90 H c 12:27 0.045 00:06 N "" Mater i a l 104 having ε r roughly 3.9) very low. Thus are concerns of signals to the copper conductor tracks 102, 103 RC signal delay times are low and thus undesired crosstalk between the conductor tracks 102, 103 is avoided. When closing or sealing, that is, upon complete Covering the trench, which is formed from components 102 to 105, the ozone / TEOS cap layer 106 is selectively only on the silane-based silicon oxide layer 105 formed, due to the in the s invention il .00 ° 1.90 H 0.27 c o .045 N 0.06 ~ Mater i a l 104 contained nitrogen component an undesirable selective deposition of cover material on the
Siι_ Q0°1.90H0 ,27co .045N0.06~Material 104 vermieden ist. Somit kann die Deckschicht 106 den Hohlraum nach außen hin sicher versiegeln, ohne dass unerwünschterweise Material in die Airgaps 107 eingebracht würde, was zu einer unerwünschten Erhöhung des effektiven er-Werts zwischen den Leiterbahnen 102, 103 führen würde.Siι_ Q0 ° 1.90 H 0, 27 c o .045 N 0.06 ~ Mater i a l 104 is avoided. Thus, out safely seal the cavity to the outside, the cover layer 106, would be introduced without undesirably material into the air gaps 107, which r to an undesirable increase of the effective e -value between the conductive lines 102, 103 would result.
Im Weiteren werden bezugnehmend auf Fig.2 und Fig.3 anhand von elektronenmikroskopischen Aufnahmen Unterschiede zwischen einem herkömmlichen Material und dem erfindungsgemäß bereitgestellten Material veranschaulicht.In the following, with reference to FIGS. 2 and 3, differences between a conventional material and the material provided according to the invention are illustrated on the basis of electron micrographs.
In Fig.2 ist eine Elektronenmikroskop-Aufnahme 200 einer Querschnittsansicht einer Schicht-Anordnung gezeigt, bei der als Dielektrikum 204 zwischen Airgaps 202 herkömmliches TEOS Material verwendet worden ist. Wie aus Fig.2 ersichtlich, ist, wird beim Bilden einer Deckschicht 201 mittels eines selektiven O3/TEOS-Abscheideverfahrens unerwünschterweise ein Randbereich 203 zwischen den Airgaps 202 und dem Dielektrikum 204 mit Material bedeckt, womit die Dielektrizitätskonstante des Airgap-Bereichs unerwünschterweise erhöht wird.FIG. 2 shows an electron microscope image 200 of a cross-sectional view of a layer arrangement in which conventional TEOS material has been used as the dielectric 204 between airgaps 202. As can be seen from FIG. 2, when a cover layer 201 is formed using a selective O 3 / TEOS deposition method, an edge region 203 between the air gaps 202 and the dielectric 204 is undesirably covered with material, which undesirably increases the dielectric constant of the air gap region ,
Im Unterschied dazu ist bei der in Fig.3 gezeigten Elektronenmikroskop-Aufnahme 300 einer erfindungsgemäßen Schicht-Anordnung erkennbar, dass eine Deckschicht 201, gebildet mittels eines selektiven Ozon/TEOS Abscheideverfahrens, an Seitenwänden von Airgaps 202 keinerlei Strukturen bildet. Dies ist darauf zurückzuführen, dass anstelle der herkömmlichen Dielektrikumschicht 204 aus Fig.2 erfindungsgemäß als Material zwischen Airgaps 202 sil . oo°1.90H0.27c0.045H0.06~"Mater;>-al 3°1 verwendet wird.In contrast to this, it can be seen in the electron microscope image 300 of a layer arrangement according to the invention shown in FIG. 3 that a cover layer 201, formed by means of a selective ozone / TEOS Deposition process, forms no structures on the side walls of Airgaps 202. This is due to the fact that, instead of the conventional dielectric layer 204 of Figure 2 according to the invention as the material between the air gaps 202 s il. oo ° 1.90 H 0.27 c 0.045 H 0.06 ~ "Mater;> - a l 3 ° 1 is used.
Dadurch ist eine geringe Dielektrizitätskonstante im Bereich der Airgaps 202 erreicht, was für Low-k-Anwendungen äußerst vorteilhaft ist.As a result, a low dielectric constant is achieved in the area of the airgaps 202, which is extremely advantageous for low-k applications.
In Fig.4 ist eine andere Elektronenmikroskop-Aufnahme 400 als Querschnittsansicht einer erfindungsgemäßen Schicht-Anordnung gezeigt, bei der zusätzlich zu den in Fig.3 gezeigten Komponenten Kupfer-Leiterbahnen 401 gebildet sind. Da aufgrund des erfindungsgemäßen Materials 301 zwischen Airgaps 202 zwischen den Kupfer-Leiterbahnen 401 die effektive relative Dielektrizitätskonstante verringert ist (da erfindungsgemäß eine unerwünschte Seitenwandbedeckung der Airgaps 202 mit Ozon/TEOS Material einer Deckschicht 201 ■ vermieden ist) , sind die RC-Verzögerungszeiten der Schaltkreis-Anordnung 400 aus Fig.4 gegenüber dem Stand der Technik signifikant verbessert.FIG. 4 shows another electron microscope image 400 as a cross-sectional view of a layer arrangement according to the invention, in which copper conductor tracks 401 are formed in addition to the components shown in FIG. Since the effective relative dielectric constant is reduced due to the material 301 according to the invention between airgaps 202 between the copper conductor tracks 401 (since an undesired side wall covering of the airgaps 202 with ozone / TEOS material of a cover layer 201 is avoided according to the invention), the RC delay times are the circuit Arrangement 400 from FIG. 4 significantly improved compared to the prior art.
Im Weiteren wird bezugnehmend auf Fig.5 eineFurthermore, referring to FIG
Querschnittsansicht einer Schicht-Anordnung 500 gemäß einem zweiten Ausführungsbeispiel der Erfindung beschrieben.Cross-sectional view of a layer arrangement 500 according to a second embodiment of the invention described.
Die Leiterbahn-Anordnung 500 weist ein Grundsubstrat 502 auf. Als Material für dieses Grundsubstrat 502 wird Siliziumdioxid (Siθ2) gewählt. In dem Grundsubstrat 502 sind zwei Leiterbahnen 503 aus Aluminium oder Kupfer gebildet.The conductor track arrangement 500 has a base substrate 502. Silicon dioxide (SiO 2 ) is selected as the material for this base substrate 502. Two conductor tracks 503 made of aluminum or copper are formed in the base substrate 502.
Sowohl die Leiterbahnen 503 als auch das Grundsubstrat 502 werden von einer ersten Stoppschicht 504 bedeckt. Über der ersten Stoppschicht 504 ist ein Schichtstapel aus aufeinanderfolgend einer ersten Isolationsschicht 505, einer zweiten Stoppschiσht 506, einer zweiten Isolationsschicht 507, einer dritten Stoppschicht 508, einer dritten Isolationsschicht 509, einer Pufferschicht 510 sowie einer Trageschicht 511 angeordnet.Both the conductor tracks 503 and the base substrate 502 are covered by a first stop layer 504. Above the first stop layer 504 is a layer stack of successively a first insulation layer 505, a second stop layer 506, a second insulation layer 507, a third stop layer 508, a third Insulation layer 509, a buffer layer 510 and a support layer 511 are arranged.
Gemäß dem vorliegenden Ausführungsbeispiel weisen die erste Stoppschicht 504, die zweite Stoppschicht 506, die dritte Stoppschicht 508 und eine vierte Stoppschicht 512 jeweils Siliziumnitrid (Si3N4.) auf, welches elektrisch isolierend ist. Als Material für die erste Isolationsschicht 505, die zweite Isolationsschicht 507, die dritte Isolationsschicht 509 und die Pufferschicht 510 wird gemäß dem vorliegenden Ausführungsbeispiel erfindungsgemäß hergestelltes Si _ oo°l .90H0.27c0.045N0.06~Mater:'-al verwendet. Für die Trageschicht 511 (auch als Zwischenschicht bezeichnet) wird auf Silan (SiH4) basierendes, plasmaangeregtes Siliziumdioxid (Siθ2) verwendet. Dabei wird das auf Silan (SiH4) basierende, plasmaangeregte Siliziumdioxid (Siθ2) üblicherweise in einem PECVD-Prozess (PECVD, "plasma enhanced chemical vapour deposition" bzw. plasmaangeregte chemische Gasphasenabscheidung) abgeschieden.According to the present exemplary embodiment, the first stop layer 504, the second stop layer 506, the third stop layer 508 and a fourth stop layer 512 each have silicon nitride (Si3N 4. ), Which is electrically insulating. The material used for the first insulation layer 505, the second insulation layer 507, the third insulation layer 509 and the buffer layer 510 in accordance with the present exemplary embodiment is Si 0 ° .90 H 0.27 c 0.045 N 0.06 ~ Mater: '- a l. Plasma-excited silicon dioxide (SiO 2) based on silane (SiH4) is used for the base layer 511 (also referred to as the intermediate layer). The plasma-excited silicon dioxide (SiO 2) based on silane (SiH4) is usually deposited in a PECVD process (PECVD, “plasma enhanced chemical vapor deposition” or plasma-excited chemical vapor deposition).
Das Grundsubstrat 502, die erste Stoppschicht 504, die erste Isolationsschicht 505, die zweite Stoppschicht 506, die zweite Isolationsschicht 507, die dritte Stoppschicht 508, die dritte Isolationsschicht 509 und die vierte Stoppschicht 512 werden in aufsteigender Richtung des Schichtstapels gebildet. Die Pufferschicht 510 wird von einer Pufferschichtoberfläche 513 nach oben begrenzt. In der Pufferschicht 510 und den darunter angeordneten Schichten ist ein Hohlraum 514 gebildet, welcher von der Pufferschichtoberfläche 513 aus bis zur zweiten Stoppschicht 506 in die darunter angeordneten Schichten hineinragt und eine Hohlraumtiefe TJI aufweist.The base substrate 502, the first stop layer 504, the first insulation layer 505, the second stop layer 506, the second insulation layer 507, the third stop layer 508, the third insulation layer 509 and the fourth stop layer 512 are formed in the ascending direction of the layer stack. The buffer layer 510 is bounded at the top by a buffer layer surface 513. A cavity 514 is formed in the buffer layer 510 and the layers arranged underneath, which protrudes from the buffer layer surface 513 to the second stop layer 506 into the layers arranged below and has a cavity depth TJI.
Der Hohlraum 514 isoliert die zwei vergraben angeordneten Leiterbahnen 503, welche teilweise die dritte Stoppschicht 508 sowie die dritte Isolationsschicht 509 ersetzen und zusammen eine Leiterbahnebene definieren. Die mittels des Hohlraums 514 elektrisch isolierten Leiterbahnen 503 sind in einem Leiterbahnabstand A derart nebeneinander angeordnet, dass die jeweilige untere Leiterbahnoberflache senkrecht zur Pufferschichtoberfläche 513 einen Abstand einerThe cavity 514 insulates the two buried conductor tracks 503, which partially replace the third stop layer 508 and the third insulation layer 509 and together define a trace level. The conductor tracks 503, which are electrically insulated by means of the cavity 514, are arranged next to one another at a conductor track spacing A such that the respective lower conductor track surface is at a distance perpendicular to the buffer layer surface 513
Leiterbahntiefe TL aufweist, welche größer als die vertikale Dicke der Leiterbahnen 503 ist. Die Hohlraumtiefe TJJ ist größer als die Leiterbahntiefe TL, wodurch Streufelder zwischen benachbarten Leiterbahnen 503 in den Bereichen der Pufferschicht 510 direkt oberhalb und unterhalb derConductor depth TL has, which is greater than the vertical thickness of the conductor tracks 503. The cavity depth TJJ is greater than the conductor path depth TL, as a result of which stray fields between adjacent conductor paths 503 in the regions of the buffer layer 510 directly above and below the
Leiterbahnen 503 reduziert werden. Der Hohlraum 514 weist eine Breite auf, welche gleich dem Leiterbahnabstand A ist.Conductor tracks 503 can be reduced. The cavity 514 has a width which is equal to the interconnect spacing A.
Die teilweise die dritte Stoppschicht 508 sowie die dritte Isolationsschicht 509 ersetzenden Leiterbahnen 503 sind mittels eines elektrischen Kontaktes 515 mit der im Grundsubstrat 502 befindlichen Leiterbahn 503 elektrisch gekoppelt und weisen gemäß dem vorliegenden Ausführungsbeispiel das gleiche Material wie die im Grundsubstrat 502 befindliche Leiterbahn 503 auf. Der elektrische Kontakt 515 durchdringt hierzu die erste Stoppschicht 504, die erste Isolationsschicht 505, die zweite Stoppschicht 506 sowie die zweite Isolationsschicht 507.The conductor tracks 503, which partially replace the third stop layer 508 and the third insulation layer 509, are electrically coupled by means of an electrical contact 515 to the conductor track 503 located in the base substrate 502 and, according to the present exemplary embodiment, have the same material as the conductor track 503 located in the base substrate 502. For this purpose, the electrical contact 515 penetrates the first stop layer 504, the first insulation layer 505, the second stop layer 506 and the second insulation layer 507.
Ferner befinden sich übereinander die Pufferschicht 510 und die Trageschicht 511, wobei der Hohlraum 514 durch die Pufferschicht 510 hindurchragt sowie zum Teil in die Trageschicht 511 hineinragt.Furthermore, the buffer layer 510 and the support layer 511 are located one above the other, the cavity 514 projecting through the buffer layer 510 and partially projecting into the support layer 511.
Der Hohlraum 514 wird mittels einer Deckschicht 516 bezüglich der Pufferschichtoberfläche 513 nach oben hin abgeschlossen. Die Deckschicht 516 weist ein Isolationsmaterial auf, welches sich selektiv ausschließlich an der Trageschicht 511 anlagert. Als Material für die Deckschicht 516 wird auf ozon- aktiviertem Tetraethylorthosilikat (O3/TEOS) basierendesThe cavity 514 is closed off at the top by means of a cover layer 516 with respect to the buffer layer surface 513. The cover layer 516 has an insulation material which selectively adheres exclusively to the support layer 511. The material for the top layer 516 is based on ozone-activated tetraethyl orthosilicate (O 3 / TEOS)
Siliziumdioxid (Siθ2) verwendet. Selbstverständlich kann für die Deckschicht 516 auch ein anderes Material gewählt werden, wenn dieses die oben beschriebene Selektivität hinsichtlich seines Anlagerungsverhaltens zeigt. Anschaulich ist die Deckschicht 516 derart ausgebildet, dass sie eine dem Hohlraum 514 zugewandte zwickeiförmige Aussparung aufweist. Folglich sollte die Trageschicht 511 senkrecht zur Pufferschichtoberfläche 513 eine ausreichende Dicke aufweisen, so dass der Hohlraum 514 auch oberhalb der zwickeiförmigen Aussparung der Deckschicht 516 von der Deckschicht 516 vollständig abgeschlossen ist.Silicon dioxide (SiO 2 ) used. Of course, another material can also be selected for the cover layer 516, if this shows the selectivity described above with regard to its attachment behavior. Clearly, the cover layer 516 is formed such that it has a gusset-shaped recess facing the cavity 514. Consequently, the support layer 511 perpendicular to the buffer layer surface 513 should have a sufficient thickness so that the cavity 514 is completely closed off from the cover layer 516 even above the gore-shaped recess of the cover layer 516.
Die Deckschicht 516 sowie die Trageschicht 511 weisen eine gemeinsame Deckschicht/Trageschicht-Oberfläche 517 auf, welche diese beiden Schichten 516, 511 im Wesentlichen parallel zur Substratoberfläche 501 nach oben begrenzt. Auf dieser Deckschicht/Trageschicht-Oberfläche 517 ist schließlich noch eine fünfte Stoppschicht 518 angeordnet, auf welcher zusätzliche Leiterbahnebenen aufgebracht werden können.The cover layer 516 and the support layer 511 have a common cover layer / support layer surface 517, which limits these two layers 516, 511 essentially parallel to the substrate surface 501. Finally, a fifth stop layer 518 is arranged on this cover layer / base layer surface 517, on which additional interconnect levels can be applied.
Die Geometrie des Hohlraums 514 wird bevorzugt derart gewählt, dass die Leiterbahn-Anordnung 500 eine ausreichend gute elektrische Isolierung der Leiterbahnen 503 innerhalb einer Leiterbahnebene bei einer ausreichenden Reduzierung der relativen Dielektrizitätskonstante er aufweist. Gemäß diesem Ausführungsbeispiel weisen der Leiterbahnabstand A und somit der Hohlraum 514 eine Breite von 400nm bis 500nm auf, welche fast gleich der Breite der Leiterbahnen 503 ist. Die Hohlraumtiefe TJJ weist gemäß diesem Ausführungsbeispiel einen Wert auf, welcher der zweifachen Dicke der Leiterbahnen 503 entspricht. Die Leiterbahnen 503 weisen gemäß diesemThe geometry of the cavity 514 is preferably selected such that the conductor track arrangement 500 has a sufficiently good electrical insulation of the conductor tracks 503 within a conductor track level with a sufficient reduction in the relative dielectric constant e r . According to this exemplary embodiment, the conductor track spacing A and thus the cavity 514 have a width of 400 nm to 500 nm, which is almost equal to the width of the conductor tracks 503. According to this exemplary embodiment, the cavity depth TJJ has a value which corresponds to twice the thickness of the conductor tracks 503. According to this, the conductor tracks 503
Ausführungsbeispiel eine Dicke von ungefähr 600nm auf. Gemäß dem vorliegenden Ausführungsbeispiel weisen die einzelnen Stoppschichten eine Dicke von jeweils ungefähr 50nm auf. Die Isolationsschichten außer der dritten Isolationsschicht 509 sowie die Pufferschicht 510 und die Trageschicht 511 weisen gemäß dem vorliegenden Ausführungsbeispiel eine Dicke von jeweils ungefähr 150nm auf. Alternativ können selbstverständlich auch andere geeignete Maße gewählt werden.Embodiment a thickness of about 600nm. According to the present exemplary embodiment, the individual stop layers each have a thickness of approximately 50 nm. The insulation layers apart from the third insulation layer 509 as well as the buffer layer 510 and the support layer 511 have a thickness according to the present exemplary embodiment about 150nm each. Alternatively, other suitable dimensions can of course also be selected.
Zum Herstellen der Leiterbahnen 503 kann entweder die Damascene-Technik oder die . Metallätztechnik eingesetzt werden. Die Damascene-Technik wird vorzugsweise eingesetzt, wenn als Material für die Leiterbahnen 503 Kupfer verwendet wird, während die Metallätztechnik vorzugsweise eingesetzt wird, wenn als Material für die Leiterbahnen 503 Aluminium verwendet wird.Either the Damascene technique or the . Metal etching technology are used. The Damascene technique is preferably used when copper is used as the material for the conductor tracks 503, while the metal etching technique is preferably used when aluminum is used as the material for the conductor tracks 503.
Bei einem nicht dargestellten Ausführungsbeispiel der Erfindung, welches im Wesentlichen dem gerade beschriebenen zweiten Ausführungsbeispiel der Erfindung gleicht, kann sich der Hohlraum 514 zusätzlich noch durch die zweiteIn an exemplary embodiment of the invention, not shown, which is essentially the same as the second exemplary embodiment of the invention just described, the cavity 514 can additionally pass through the second
Stoppschicht 506 hindurch bis zur Grenzfläche zwischen der zweiten Stoppschicht 506 und der ersten Isolationsschicht 505 hin ausdehnen. Anschaulich ist zur Vergrößerung des Hohlraums 514 soviel Material der zweiten Stoppschicht 506 im Bereich des Hohlraums 514 entfernt, dass die darunter liegende erste Isolationsschicht 505 gerade freigelegt ist. Dies hat eine zusätzliche Reduzierung der effektiven relativen Dielektrizitätskonstante er zur Folge. Dies liegt daran, dass der größere Hohlraum 514 störende elektrische Streufelder zwischen den Leiterbahnen 503 zusätzlich reduziert.Extend stop layer 506 through to the interface between second stop layer 506 and first insulation layer 505. Clearly, in order to enlarge the cavity 514, so much material of the second stop layer 506 in the region of the cavity 514 has been removed that the first insulation layer 505 underneath is just exposed. This results in an additional reduction in the effective relative dielectric constant e r . This is because the larger cavity 514 additionally reduces interfering electrical stray fields between the conductor tracks 503.
In Fig.6 ist eine Querschnittsansicht einer Schicht-Anordnung 600 (auch als Leiterbahn-Anordnung 600 bezeichnet) gemäß einem dritten Ausführungsbeispiel der Erfindung dargestellt .6 shows a cross-sectional view of a layer arrangement 600 (also referred to as conductor arrangement 600) according to a third exemplary embodiment of the invention.
Die Leiterbahn-Anordnung 600 gemäß dem dritten Ausführungsbeispiel ist im Wesentlichen identisch zu der Leiterbahn-Anordnung 500 gemäß dem zweiten Ausführungsbeispiel. Die Unterschiede zwischen der Leiterbahn-Anordnung 600 gemäß dem drittenThe conductor arrangement 600 according to the third exemplary embodiment is essentially identical to the conductor arrangement 500 according to the second exemplary embodiment. The differences between the conductor arrangement 600 according to the third
Ausführungsbeispiel und der Leiterbahn-Anordnung 500 gemäß dem zweiten Ausführungsbeispiel sind wie folgt : Der Hohlraum 514 weist bezüglich der Substratoberfläche 501 parallel zur Zeichenebene eine Hohlraumbreite B auf, welche größer als der Leiterbahnabstand A ist. Dies hat zur Folge, dass die Form des Hohlraums 514 anschaulich mit einem „I" oder mit einem Knochen vergleichbar ist. Die größere Ausdehnung des Hohlraums 514 oberhalb und unterhalb der durch die benachbarten Leiterbahnen 503 gebildeten Leiterbahnebene trägt zu einer zusätzlichen Reduzierung der effektiven relativen Dielektrizitätskonstante er in der Leiterbahn- Anordnung 600 bei. Dies liegt daran, dass der größere Hohlraum 514 störende elektrische Streufelder zwischen den Leiterbahnen 503 zusätzlich reduziert.Exemplary embodiment and the conductor track arrangement 500 according to the second exemplary embodiment are as follows: The cavity 514 has, with respect to the substrate surface 501 parallel to the plane of the drawing, a cavity width B which is greater than the interconnect spacing A. The result of this is that the shape of the cavity 514 is clearly comparable to an "I" or a bone. The greater extent of the cavity 514 above and below the conductor track level formed by the adjacent conductor tracks 503 contributes to an additional reduction in the effective relative dielectric constant e r in the conductor track arrangement 600. This is because the larger cavity 514 additionally reduces interfering electrical stray fields between the conductor tracks 503.
Die dritte Stoppschicht 508 und die vierte Stoppschicht 512 weisen im Bereich des Hohlraums 514 eine Lochbreite C auf, welche kleiner ist als der Leiterbahnabstand A. Dies ist eine Folge des speziellen Herstellungsverfahrens, mit dem der ausgewölbte Hohlraum 514 in der Leiterbahn-Anordnung 600 gemäß dem dritten Ausführungsbeispiel hergestellt wird.The third stop layer 508 and the fourth stop layer 512 have a hole width C in the region of the cavity 514 which is smaller than the conductor path spacing A. This is a consequence of the special manufacturing process with which the bulged cavity 514 in the conductor path arrangement 600 according to FIG third embodiment is produced.
Ein wichtiger Aspekt der Leiterbahn-Anordnungen 500, 600 gemäß der Erfindung ist darin zu sehen, dass als Material der Schichten 505, 507, 509, 510 das erfindungsgemäße mittels eines PECVD-Verfahrens hergestellteAn important aspect of the conductor track arrangements 500, 600 according to the invention can be seen in that the material of the layers 505, 507, 509, 510 that is produced by means of a PECVD method
Sii. Q0°1.90 H 0.27^0.045 N 0.06~Ma-terial verwendet wird. Freiliegende Oberflächenbereiche insbesondere der Schichten 507, 510 sind bei einem nachfolgenden Bilden der Ozon/TEOS- Deckschicht 516 mittels eines selektiven Abscheideverfahrens sicher davor geschützt, unerwünschterweise mit Material derSii. Q 0 ° 1 . 90 H 0 . 27 ^ 0 . 045 N 0 . 06 ~ Ma -material is used. Exposed surface areas, in particular of the layers 507, 510, are reliably protected against this during subsequent formation of the ozone / TEOS cover layer 516 by means of a selective deposition process, undesirably with material of the
Deckschicht 516 bedeckt zu werden, was zu einer teilweisen Auffüllung des Hohlraums 514 führen würde. Dies wiederum würde die effektive relative Dielektrizitätskonstante des Bereichs zwischen den Leiterbahnen 503 unerwünscht erhöhen. Aufgrund des Vorsehens der Schichten 505, 507, 509, 510 aus Sii. oθ°l .90H0.27c0.045N0.06~Material/ das aufgrund seiner MaterialZusammensetzung vor einem selektiven Abscheiden von Material der Ozon/TEOS-Deckschicht 516 geschützt ist, wird bei der Ozon/TEOS-Abscheidung die Deckschicht 516 nur auf Oberflächenbereichen der Trageschicht 511 aus Silan-basiertem Siliziumoxid selektiv abgeschieden, wodurch der Hohlraum 514 von Material der Deckschicht 516 überwachsen und somit abgeschlossen wird. Cover layer 516 to be covered, which would lead to a partial filling of the cavity 514. This, in turn, would undesirably increase the effective relative dielectric constant of the area between interconnects 503. Due to the provision of layers 505, 507, 509, 510 made of Sii. oθ ° l .90 H 0.27 c 0.045 N 0.06 ~ Mater i a l / that due to its material composition before a selective deposition of Material of the ozone / TEOS cover layer 516 is protected, in the ozone / TEOS deposition the cover layer 516 is selectively deposited only on surface areas of the support layer 511 made of silane-based silicon oxide, as a result of which the cavity 514 is overgrown by material of the cover layer 516 and is thus closed ,
In diesem Dokument sind folgende Veröffentlichungen zitiert:The following publications are cited in this document:
[1] WO 03/019649 A2 ;[1] WO 03/019649 A2;
[2] DE 101 25 019 AI;[2] DE 101 25 019 AI;
[3] DE 191 09 778 AI;[3] DE 191 09 778 AI;
[4] DE 199 57 302 AI;[4] DE 199 57 302 AI;
[5] DE 41 18 165 AI;[5] DE 41 18 165 AI;
[6] US 2001/0 019 903 AI;[6] US 2001/0 019 903 AI;
[7] JP 06-216 122 A;[7] JP 06-216 122 A;
[8] US 6,211,057 Bl ;[8] US 6,211,057 B1;
[9] US 2003/0 176 055 AI. [9] US 2003/0 176 055 AI.
BezugszeichenlisteLIST OF REFERENCE NUMBERS
100 Schicht-Anordnung 101 Silizium-Substrat 102 erste Kupfer-Leiterbahn 103 zweite Kupfer-Leiterbahn 104 Sii .0θ0l .9θHfJ .27C0.045^0.06"Material 105 Silan-basierte Siliziumoxid-Zwischenschicht 106 Ozon/TEOS-Deckschicht 107 Airgap100 layer arrangement 101 silicon substrate 102 first copper interconnect 103 second copper interconnect 104 Sii .0θ0l .9θHfJ .27C0.045 ^ 0.06 "material 105 silane-based silicon oxide intermediate layer 106 ozone / TEOS cover layer 107 air gap
200 Elektronenmikroskop-Aufnahme 201 Deckschicht 202 Airgaps 203 Seitenwandbedeckung 204 Dielektrikum200 electron microscope image 201 cover layer 202 airgaps 203 side wall covering 204 dielectric
300 Elektronenmikroskop-Aufnahme 301 Sii .00θl .90H0.27^0.045 .06" aterial300 electron microscope image 301 Sii .00θl .90 H 0.27 ^ 0.045 .06 " a terial
400 Elektronenmikroskop-Aufnahme 401 Kupfer-Leiterbahnen400 electron microscope image 401 copper conductor tracks
500 Schicht-Anordnung 502 Grundsubstrat 503 Leiterbahn 504 erste Stoppschicht 505 erste Isolationsschicht 506 zweite Stoppschicht 507 zweite Isolationsschicht 508 dritte Stoppschicht 509 dritte Isolationsschicht 510 Pufferschicht 511 Trageschicht 512 vierte Stoppschicht500 layer arrangement 502 base substrate 503 interconnect 504 first stop layer 505 first insulation layer 506 second stop layer 507 second insulation layer 508 third stop layer 509 third insulation layer 510 buffer layer 511 support layer 512 fourth stop shift
513 Pufferschichtoberfläche513 buffer layer surface
514 Hohlraum514 cavity
515 elektrischer Kontakt515 electrical contact
516 Deckschicht516 top layer
517 Deckschicht/Trageschicht-Oberfläche517 top layer / base layer surface
518 fünfte Stoppschicht518 fifth stop shift
600 Schicht-Anordnung 600 layer arrangement

Claims

Patentansprüche : Claims:
1. Verfahren zum Herstellen einer Schicht-Anordnung,1. Method for producing a layer arrangement,
• bei dem über einem Substrat mit einer Mehrzahl von elektrisch leitfähigen Strukturen und/oder über einem Teil der Oberfläche der elektrisch leitfähigen Strukturen eine Schicht aus Sauerstoff-Material Stickstoff-Material mittels eines plasmaangeregten chemischen Gasphasenabscheide-Verfahrens gebildet wird, wobei während des Zufuhrens von Silizium-Material und Sauerstoff-Material mittels eines organischen Silizium- Precursormaterials Stickstoff-Material zugeführt wird, wobei die Schicht aus Sauerstoff-Material Stickstoff- Material gebildet wird derart, dass zwischen den Leiterbahnen ein materialfreier Bereich verbleibt,In which a layer of oxygen material nitrogen material is formed over a substrate with a plurality of electrically conductive structures and / or over part of the surface of the electrically conductive structures by means of a plasma-excited chemical vapor deposition process, during the supply of silicon -Material and oxygen material is supplied by means of an organic silicon precursor material nitrogen material, the layer of oxygen material nitrogen material being formed such that a material-free area remains between the conductor tracks,
• bei dem auf der Schicht aus Sauerstoff-Material Stickstoff-Material eine Zwischenschicht aus elektrisch isolierendem Material aufgebracht wird, undIn which an intermediate layer of electrically insulating material is applied to the layer of oxygen material, nitrogen material, and
• bei dem selektiv auf der Zwischenschicht eine Deckschicht aufgebracht wird, mittels welcher der materialfreie Bereich zwischen den elektrisch leitfähigen Strukturen gegenüber der Umgebung versiegelt wird, so dass der materialfreie Bereich einen Hohlraum ausbildet .In which a cover layer is selectively applied to the intermediate layer, by means of which the material-free area between the electrically conductive structures is sealed from the surroundings, so that the material-free area forms a cavity.
2. Verfahren nach Anspruch 1 , bei dem als organisches Silizium-Precursormaterial Tetraethylorthosilikat verwendet wird.2. The method according to claim 1, in which tetraethyl orthosilicate is used as the organic silicon precursor material.
3. Verfahren nach Anspruch 1 oder 2,3. The method according to claim 1 or 2,
• bei dem Tetraethylorthosilikat und Stickstoff als Precursoren verwendet werden;• where tetraethyl orthosilicate and nitrogen are used as precursors;
• bei dem das Flussratenverhältnis von Tetraethylorthosilikat zu Stickstoff zwischen 1:10 und 1:1 eingestellt wird.• in which the flow rate ratio of tetraethyl orthosilicate to nitrogen is set between 1:10 and 1: 1.
4. Verfahren nach einem der Ansprüche 1 bis 4, • bei dem Tetraethylorthosilikat und Stickstoff als Precursoren verwendet werden;4. The method according to any one of claims 1 to 4, • where tetraethyl orthosilicate and nitrogen are used as precursors;
• bei dem das Flussratenverhältnis von Tetraethylorthosilikat zu Stickstoff zwischen 1:5 und 1:2 eingestellt wird.• in which the flow rate ratio of tetraethyl orthosilicate to nitrogen is set between 1: 5 and 1: 2.
5. Verfahren nach einem der Ansprüche 1 bis 4,5. The method according to any one of claims 1 to 4,
• bei dem Tetraethylorthosilikat und Stickstoff als Precursoren verwendet werden; • bei dem das Flussratenverhältnis von Tetraethylorthosilikat zu Stickstoff zwischen 11:40 und 7:20 eingestellt wird.• where tetraethyl orthosilicate and nitrogen are used as precursors; • in which the flow rate ratio of tetraethyl orthosilicate to nitrogen is set between 11:40 and 7:20.
6. Verfahren nach einem der Ansprüche 1 bis 5, bei dem Helium als Trägergas zugeführt wird.6. The method according to any one of claims 1 to 5, in which helium is supplied as a carrier gas.
7. Verfahren nach einem der Ansprüche 1 bis 6, bei dem der Druck in der Verfahrenskammer zwischen 440Pa und 1750Pa eingestellt wird.7. The method according to any one of claims 1 to 6, wherein the pressure in the process chamber is set between 440Pa and 1750Pa.
8. Verfahren nach einem der Ansprüche 1 bis 7, bei dem die Temperatur in der Verfahrenskammer zwischen 300°C und 500°C eingestellt wird.8. The method according to any one of claims 1 to 7, wherein the temperature in the process chamber is set between 300 ° C and 500 ° C.
9. Schicht-Anordnung9. Layer arrangement
• mit einem Substrat;• with a substrate;
• mit zwei elektrisch leitfähigen Strukturen auf dem Substrat, wobei zumindest ein Teilbereich zwischen den zwei elektrisch leitfähigen Strukturen materialfrei ist; • mit einer Schicht aus Silizium-Sauerstoff-Stickstoff- haltigem Material, welches mittels eines plasmaangeregten chemischen Gasphasenabscheide- Verfahrens gebildet wurde, wobei während des Zufuhrens von Silizium-Material und Sauerstoff-Material mittels eines organischen Silizium-Precursormaterials Stickstoff-Material zugeführt wurde, wobei die Schicht derart auf den zwei elektrisch leitfähigen Strukturen aufgebracht ist, dass zwischen den zwei elektrisch leitfähigen Strukturen ein materialfreier Bereich verbleibt;With two electrically conductive structures on the substrate, at least one partial area between the two electrically conductive structures being free of material; • With a layer of silicon-oxygen-nitrogen-containing material, which was formed by means of a plasma-excited chemical vapor deposition process, wherein during the supply of silicon material and oxygen material, nitrogen material was supplied by means of an organic silicon precursor material, wherein the layer in this way on the two electrically conductive structures is applied that a material-free area remains between the two electrically conductive structures;
• mit einer Zwischenschicht aus elektrisch isolierendem Material auf der Schicht aus Silizium-Sauerstoff- Stickstoff-haltigem Material;• with an intermediate layer of electrically insulating material on the layer of silicon-oxygen-nitrogen-containing material;
• mit einer selektiv auf der Zwischenschicht gebildeten Deckschicht, mittels welcher der materialfreie Bereich zwischen den zwei elektrisch leitfähigen Strukturen gegenüber der Umgebung versiegelt ist.With a cover layer selectively formed on the intermediate layer, by means of which the material-free area between the two electrically conductive structures is sealed from the surroundings.
10. Schicht-Anordnung nach Anspruch 9, bei dem die Zwischenschicht aus Silan-basiertem Siliziumoxid gebildet ist.10. Layer arrangement according to claim 9, wherein the intermediate layer is formed from silane-based silicon oxide.
11. Schicht-Anordnung nach Anspruch 10 oder 11, bei dem die Deckschicht aus Siliziumoxid gebildet ist, das basierend auf Ozon-aktiviert zersetztem Tetraethylorthosilikat gebildet ist. 11. Layer arrangement according to claim 10 or 11, in which the cover layer is formed from silicon oxide which is formed based on ozone-activated decomposed tetraethyl orthosilicate.
EP05714893A 2004-01-22 2005-01-22 Plasma-excited chemical vapor deposition method, silicon/oxygen/nitrogen-containing material and layered assembly Withdrawn EP1706902A2 (en)

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