EP1668654B1 - Independently addressable resistance matrixes and method for the production thereof - Google Patents

Independently addressable resistance matrixes and method for the production thereof Download PDF

Info

Publication number
EP1668654B1
EP1668654B1 EP04805719A EP04805719A EP1668654B1 EP 1668654 B1 EP1668654 B1 EP 1668654B1 EP 04805719 A EP04805719 A EP 04805719A EP 04805719 A EP04805719 A EP 04805719A EP 1668654 B1 EP1668654 B1 EP 1668654B1
Authority
EP
European Patent Office
Prior art keywords
resistor
resistors
resistance
array according
array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Not-in-force
Application number
EP04805719A
Other languages
German (de)
French (fr)
Other versions
EP1668654A1 (en
Inventor
Adrien Gasse
Guy Parat
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Publication of EP1668654A1 publication Critical patent/EP1668654A1/en
Application granted granted Critical
Publication of EP1668654B1 publication Critical patent/EP1668654B1/en
Not-in-force legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C13/00Resistors not provided for elsewhere
    • H01C13/02Structural combinations of resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C1/00Details
    • H01C1/16Resistor networks not otherwise provided for
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B01PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01LCHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L2400/00Moving or stopping fluids
    • B01L2400/06Valves, specific forms thereof
    • B01L2400/0677Valves, specific forms thereof phase change valves; Meltable, freezing, dissolvable plugs; Destructible barriers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B01PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01LCHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L3/00Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
    • B01L3/50Containers for the purpose of retaining a material to be analysed, e.g. test tubes
    • B01L3/502Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures
    • B01L3/5027Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49082Resistor making

Definitions

  • the invention relates to matrices of passive components, more particularly to resistors connected together by lines and columns, and to their manufacture. These matrices of resistors can be used in various fields, in particular to activate components by Joule effect.
  • resistance matrices In order to gain space and control density, resistance matrices have been developed where a large number of resistive elements are condensed on a small surface, while being individually activatable.
  • EP-A-0 813 088 discloses an optical relay which is activated by thermal stimulation.
  • the relay consists of a matrix of resistors.
  • EP-A-1 188 840 a matrix of selectively operable heating elements is described.
  • a resistance matrix comprises N command lines (indexed N i , with i strictly positive integer), M control columns (indexed M j , with j strictly positive integer), and NM resistors (indexed R ij , each resistor R ij being controlled by the line N i and the column M j ).
  • the "switches" of its line and column are "closed”: for example, the voltage "+ V” can be applied to the line N i and "0" to the column M j ; the resistance R ij is then "addressed", that is to say subjected to a current, unlike the others.
  • one of the challenges is to precisely locate the control power on a determined resistance in order to achieve the effect expected by the control, while limiting the power dissipated in the other elements of the matrix.
  • the resistors because of induced or derived currents, both to increase the power in the resistor addressed and for the control to remain specific.
  • Another technique would be to segment the matrix into subunits such that the power loss is reduced, which reduces the number of diodes. This solution does not eliminate the complexity problems inherent to the diodes, nor the residual parasitic heating in each of the matrices.
  • the object of the invention is to propose a simple solution, which avoids the drawbacks inherent in existing solutions, for the production of a matrix of resistors making it possible to locate power on one of the resistors of the matrix by limiting the dissipated power. in the rest of the matrix. Thermally, this resistance activates an associated component.
  • one of the aspects of the invention concerns the choice of the thermal properties of at least one resistor, in order to increase its addressing efficiency, that is to say the power dissipated by this resistance compared to the total power dissipated, power to thermally activate an associated component.
  • This resistance (or these resistances) is thus chosen to negative temperature coefficient, that is to say that the value of the resistance decreases with its temperature.
  • the temperature of the resistant element increases; according to the invention, the value of its resistance will then decrease, and therefore its power increase at constant voltage during heating. The accuracy of the activation of associated components is thus increased.
  • the invention thus relates to a resistance matrix of which one of the resistors has a negative temperature coefficient and is associated with a thermally activatable component.
  • these negative temperature coefficient resistors consist of a single material having this property, which simplifies all the manufacturing process.
  • a preferred embodiment relates to a matrix whose all resistors are negative temperature coefficient, and in particular identical. Indeed, whatever the matrix, the power released in the unaddressed resistors is lower than the power dissipated at the addressed point. The temperature of the resistor addressed therefore increases faster than the temperature of the rest of the circuit: even if all the resistors are at a negative temperature coefficient, or even identical, the value of the unaddressed resistances will decrease less rapidly over time than that of the resistance addressed. A phenomenon of increase in power released by the unaddressed resistances occurs, but less than the increase in the power dissipated by the resistance addressed. There is therefore also in this case a gain in yield compared to that achieved in a conventional matrix.
  • the material used for some or all of the rows and columns has a positive temperature coefficient, which leads to an increase in the resistance of these elements and therefore a decrease in lost power.
  • resistors of the matrix according to the invention can be coupled to components to activate them.
  • the invention also relates to a device using this matrix, such as a biochip or a reaction card.
  • the invention also relates to the method of manufacturing a resistor matrix whose resistance, associated with a thermally activatable component, is formed of a material put in place, for example by depositing, on a substrate, the material having a resistance to negative temperature coefficient.
  • FIG. 1 represents a conventional matrix of separately addressable resistors comprising N rows, M columns and NM resistors. These resistors can be controlled either simultaneously, or successively, or again according to a combination of these two modes.
  • the power P ij may in particular be used to thermally activate a component associated with the resistor R ij .
  • the efficiency Q ij of the resistor R ij addressed is equal to the power P ij referred to the total power released.
  • the other elements of the matrix also react to the addressing voltage: an example of induced current is thus represented in dotted lines, which causes in this configuration a power release in particular by the resistors R i + 1 j , R i + 1 j + 1 , R i j + 1 , R i j + 2 , as well as by the segments of lines and columns separating them.
  • any dissipation of power is accompanied by a heating of the resistance concerned and an increase in temperature.
  • the temperature of the addressed resistance increases more and faster than that of the other elements.
  • the resistance R ij a material whose resistance decreases with temperature, that is to say a negative temperature coefficient resistance, or NTCR (" Negative Thermal Coefficient Resistance " ).
  • This material may be one of the components of the resistor or the resistor may be made entirely of such material. Examples are the Nitride of Tantalum, Nickel-Chrome alloys, or nitrides of refractory materials.
  • the temperature coefficient (TCR) can be adjusted either by the combination of materials or by the parameters chosen during the manufacture of the resistor. Depending on the needs, the NTCR can thus vary from -100 to -3000 ppm / ° C.
  • the resistor R ij is addressed by a control power which determines the voltage U at the terminals and the power P ij dissipated by this resistor.
  • a modulation factor of P ij other than the value of each resistor is therefore the power "really" addressed to R ij .
  • This power is lower than the initial control power, with partial losses in the other resistors as described above, but also losses related to the intrinsic resistance of the rows and columns.
  • a positive TCR material such as aluminum or copper
  • the material used in the rows and columns is capable of heating. Thanks to the use of a positive TCR material for these lines and columns, the resistance of the lines and columns will then increase, and the power lost in them will decrease, increasing the power addressed, and thereby even the efficiency of the resistance addressed.
  • the power addressed, and therefore the voltage across the resistor addressed can also be modulated during use by adjusting the duration of application of this voltage.
  • This last time parameter makes it possible to optimize the desired efficiency for each resistor R ij addressed, and the desired temperature to activate the component concerned by this resistor.
  • the process allowing heating by Joule effect is a dynamic phenomenon.
  • the application of a voltage for a short duration, for example 0.2 s will make it possible to obtain moderate temperature increases, of the order of 100 ° C., and the application of the control for a period of time. longer, for example 10 s, will result in higher temperatures, of the order of 500 ° C (see Figure 2b).
  • a pulse generator (1) connected to the rows and columns, which makes it possible to apply voltages determined in amplitude and duration across said lines (N) and columns.
  • the resistors have a TCR of -2500 ppm / ° C, when the temperature of the resistor addressed reaches 300 ° C, the other resistances have a maximum of 100 ° C, and the power dissipated by the resistor addressed reaches 40% of the resistance. total power instead of 15%, that is, more than doubling.
  • the matrix according to the invention therefore makes it possible to obtain very high temperatures, of 500 ° C. and more, at very localized points, for matrices which make it possible to address many points (50 to 1000 and more), and this fast way.
  • An adjustment of the maximum power required is possible by checking the value of the resistance TCR.
  • microelectronics including deposition and photolithography
  • deposition and photolithography are used in a preferred manner.
  • any other technique that can be used for the manufacture of microsystems is conceivable: screen printing of glues, adhesives, conductive or non-conductive polymers, screen printing pastes, inkjet technology, etc.
  • FIG. 3 represents an example of a manufacturing method: a substrate (10) such as silicon is chosen.
  • An aluminum layer (12) is deposited by sputtering (FIG. 3a). Photolithography and chemical etching make it possible to obtain line patterns (14) (FIG. 3b).
  • a layer of NTCR resistive material (16) is deposited by sputtering (FIG.3c); the resistive patterns (18) are obtained by photolithography and etching (FIG. 3d).
  • a dielectric layer (20) is then deposited to isolate rows (14) and columns (FIG. 3e), with photolithography of the contact resumption patterns (22) on the columns (FIG. 3f).
  • an aluminum layer (12) is deposited by cathodic sputtering (FIG. 3g), the column patterns (24) being made by photolithography and etching (FIG. 3h).
  • the thermally activatable compounds are combined according to known techniques.
  • the aluminum layer (12) has a thickness of 500 to 50000 ⁇ (50 to 5000 nm), preferably 500 nm; the thickness of NTCR (16) is typically between 500 to 5000 ⁇ (50 to 500 nm), preferably 100 nm.
  • the NTCR can be adjusted preferably between -100 and -3000 ppm / ° C depending on the deposition conditions and the desired use parameters.
  • the dielectric insulator (20) it is possible to use a polymer or a mineral such as SiO 2 or Si 3 N 4 .
  • the substrate (10) is insulating and comprises, for example, silicon, a polymer, a glass, a ceramic, etc., or a combination of these materials.
  • the matrices according to the invention find their application in many fields, such as, for example, biology, imaging or flat screens, where the control systems must be miniaturized. More particularly, the matrices according to the invention can be used to manufacture biochips or " Lab On Chips ", also called reaction cards. Such a reaction map is known for example from WO 02/18823. In general, we will call later device for use biological any structure suitable for use in applications in biology, such as reaction maps or biochips.
  • a microfluidic network is integrated on the support card of the device: the liquid to be analyzed must flow for example between the different reagents.
  • micro-valves are actuated.
  • Micro valves have been developed for applications in microsystems, biochips and reaction maps.
  • An example is given in document FR-A-2 828 244, which relates to micro-valves actuated by pyrotechnic effect.
  • the startup of the micro-valves requires localized heating below the microsystem, for example by heating a resistance under each micro-valve which will then be actuated by Joule effect.
  • the network of micro-valves must be consistent, with a high density of these components to activate: for example 50 to 1000 micro valves on a surface typically of the order of the size of a credit card must be addressed separately.
  • the use of matrices of resistors therefore seems appropriate.
  • the matrices according to the invention add the advantage of optimizing the efficiency of each addressing, and therefore a better efficiency and specificity of the analyzes performed.

Abstract

The arrays of independently-addressable resistors are commonly used to control miniature elements. The invention proposes solving the problem caused by the loss of power dissipated in the addressed resistor by choosing, for this resistor, a material with a negative thermal coefficient resistance, which enables the addressing output of this resistor to be increased.

Description

DOMAINE TECHNIQUETECHNICAL AREA

L'invention se rapporte aux matrices de composants passifs, plus particulièrement aux résistances connectées entre elles par des lignes et des colonnes, ainsi qu'à leur fabrication. Ces matrices de résistances peuvent être utilisées dans différents domaines, notamment pour activer des composants par effet Joule.The invention relates to matrices of passive components, more particularly to resistors connected together by lines and columns, and to their manufacture. These matrices of resistors can be used in various fields, in particular to activate components by Joule effect.

ETAT DE LA TECHNIQUE ANTERIEURESTATE OF THE PRIOR ART

Pour gagner en place et en densité de commandes, les matrices de résistances ont été développées où un nombre important d'éléments résistifs sont condensés sur une petite surface, tout en étant activables individuellement.In order to gain space and control density, resistance matrices have been developed where a large number of resistive elements are condensed on a small surface, while being individually activatable.

Le document EP-A-0 813 088 décrit un relais optique qui est activé par une stimulation thermique. Le relais étant constitué d'une matrice de résistances. Dans le document EP-A-1 188 840 une matrice d'éléments chauffants pouvant être actionnés de manière sélective est décrite.EP-A-0 813 088 discloses an optical relay which is activated by thermal stimulation. The relay consists of a matrix of resistors. In EP-A-1 188 840 a matrix of selectively operable heating elements is described.

Comme le montre la figure 1, une matrice de résistances comporte N lignes de commandes (indicées Ni, avec i entier strictement positif), M colonnes de commande (indicées Mj, avec j entier strictement positif), et NM résistances (indicées Rij, chaque résistance Rij étant commandée par la ligne Ni et la colonne Mj). Pour commander une résistance, on « ferme » les interrupteurs de ses ligne et colonne : on peut par exemple appliquer la tension « +V » sur la ligne Ni et « 0 » sur la colonne Mj; la résistance Rij est alors « adressée », c'est-à-dire soumise à un courant, contrairement aux autres.As shown in FIG. 1, a resistance matrix comprises N command lines (indexed N i , with i strictly positive integer), M control columns (indexed M j , with j strictly positive integer), and NM resistors (indexed R ij , each resistor R ij being controlled by the line N i and the column M j ). To control a resistor, the "switches" of its line and column are "closed": for example, the voltage "+ V" can be applied to the line N i and "0" to the column M j ; the resistance R ij is then "addressed", that is to say subjected to a current, unlike the others.

Quelle que soit l'utilisation de ces matrices, un des enjeux est de localiser précisément la puissance de commande sur une résistance déterminée afin d'atteindre l'effet escompté par la commande, tout en limitant la puissance dissipée dans les autres éléments de la matrice, notamment les résistances, du fait des courants induits ou dérivés, tant pour augmenter la puissance dans la résistance adressée que pour que la commande reste spécifique.Whatever the use of these matrices, one of the challenges is to precisely locate the control power on a determined resistance in order to achieve the effect expected by the control, while limiting the power dissipated in the other elements of the matrix. , in particular the resistors, because of induced or derived currents, both to increase the power in the resistor addressed and for the control to remain specific.

En effet, le maximum de puissance est dissipé dans la résistance adressée. Cependant, il existe également des autres courants non nuls circulant dans les lignes et colonnes, ainsi que dans les autres résistances, qui eux aussi induisent des pertes de puissance dans et par ces éléments. Ceci entraîne que la puissance de commande n'est pas totalement dissipée dans la résistance adressée (perte d'efficacité) et que les résistances non adressées dissipent elles aussi une puissance non désirable (perte de sensibilité). Des simulations ont ainsi montré que pour une matrice de 150 points par exemple, environ 15 % de la puissance est dissipée au point adressé, alors que les autres points où la puissance dissipée est la plus forte dégagent environ 5 % de la puissance.Indeed, the maximum power is dissipated in the resistor addressed. However, there are also other non-zero currents flowing in the rows and columns, as well as in the other resistors, which also induce power losses in and through these elements. This results in the control power being not completely dissipated in the addressed resistor (loss of efficiency) and that the unaddressed resistors also dissipate an undesirable power (loss of sensitivity). Simulations have shown that for a matrix of 150 points for example, about 15% of the power is dissipated at the addressed point, while the other points where the dissipated power is the highest give off about 5% of the power.

Un des moyens connus pour remédier à ces effets est de coupler chaque résistance à une diode ou un interrupteur pour bloquer le courant dans les résistances non adressées. Cependant, cette solution est très lourde car elle implique de doubler chaque résistance, ce qui entraîne des coûts de fabrication et une perte de compacité préjudiciables.One of the known ways to remedy these effects is to couple each resistor to a diode or a switch to block the current in the unaddressed resistors. However, this solution is very cumbersome because it involves doubling each resistor, resulting in detrimental manufacturing costs and loss of compactness.

Une autre technique serait de segmenter la matrice en sous unités telles que la perte de puissance est réduite, ce qui permet de réduire le nombre de diodes. Cette solution n'élimine pas les problèmes de complexité inhérents aux diodes, ni l'échauffement parasite résiduel dans chacune des matrices.Another technique would be to segment the matrix into subunits such that the power loss is reduced, which reduces the number of diodes. This solution does not eliminate the complexity problems inherent to the diodes, nor the residual parasitic heating in each of the matrices.

Une autre alternative consiste à commander chaque ligne et colonne avec des tensions qui sont ajustées et asservies par un système de contrôle. Par cet intermédiaire, il est possible de contrôler précisément la puissance résiduelle dans les résistances non adressées et de modifier les paramètres. Si cette solution est performante, il est clair qu'elle nécessite un système de contrôle de commande coûteux et complexe à mettre en oeuvre.Another alternative is to control each row and column with voltages that are adjusted and servocontrolled by a control system. By this means, it is possible to precisely control the residual power in the unaddressed resistors and modify the parameters. If this solution is efficient, it is clear that it requires a control system expensive and complex to implement.

EXPOSÉ DE L'INVENTIONSTATEMENT OF THE INVENTION

L'objet de l'invention est de proposer une solution simple, qui évite les inconvénients inhérents aux solutions existantes, pour la réalisation d'une matrice de résistances permettant de localiser de la puissance sur une des résistances de la matrice en limitant la puissance dissipée dans le reste de la matrice. Thermiquement, cette résistance active un composant associé.The object of the invention is to propose a simple solution, which avoids the drawbacks inherent in existing solutions, for the production of a matrix of resistors making it possible to locate power on one of the resistors of the matrix by limiting the dissipated power. in the rest of the matrix. Thermally, this resistance activates an associated component.

Plus particulièrement, l'un des aspects de l'invention concerne le choix des propriétés thermiques d'au moins une résistance, afin d'augmenter son rendement d'adressage, c'est-à-dire la puissance dissipée par cette résistance par rapport à la puissance totale dissipée, puissance permettant d'activer thermiquement un composant associé. Cette résistance (ou ces résistances) est ainsi choisie à coefficient de température négatif, c'est-à-dire que la valeur de la résistance diminue avec sa température. Au cours de son utilisation, par le dégagement de puissance, la température de l'élément résistant augmente ; selon l'invention, la valeur de sa résistance va alors diminuer, et donc sa puissance augmenter à tension constante au cours de l'échauffement. La précision de l'activation de composants associés est ainsi accrue.More particularly, one of the aspects of the invention concerns the choice of the thermal properties of at least one resistor, in order to increase its addressing efficiency, that is to say the power dissipated by this resistance compared to the total power dissipated, power to thermally activate an associated component. This resistance (or these resistances) is thus chosen to negative temperature coefficient, that is to say that the value of the resistance decreases with its temperature. During its use, by the release of power, the temperature of the resistant element increases; according to the invention, the value of its resistance will then decrease, and therefore its power increase at constant voltage during heating. The accuracy of the activation of associated components is thus increased.

L'invention se rapporte ainsi à une matrice de résistances dont l'une des résistances est à coefficient de température négatif et associée à un composant activable thermiquement. Avantageusement, ces résistances à coefficient de température négatif sont constituées d'un matériau unique possédant cette propriété, ce qui simplifie d'autant le processus de fabrication.The invention thus relates to a resistance matrix of which one of the resistors has a negative temperature coefficient and is associated with a thermally activatable component. Advantageously, these negative temperature coefficient resistors consist of a single material having this property, which simplifies all the manufacturing process.

Un exemple de réalisation préféré concerne une matrice dont toutes les résistances sont à coefficient de température négatif, et notamment identiques. En effet, quelle que soit la matrice, la puissance dégagée dans les résistances non adressées est inférieure à la puissance dissipée au point adressé. La température de la résistance adressée augmente donc plus vite que la température du reste du circuit : même si toutes les résistances sont à coefficient de température négatif, voire identiques, la valeur des résistances non adressées diminuera moins vite au cours du temps que celle de la résistance adressée. Un phénomène d'augmentation de la puissance dégagée par les résistances non adressées se produit, mais inférieur à l'augmentation de la puissance dissipée par la résistance adressée. On observe donc également dans ce cas un gain en rendement par rapport à celui réalisé dans une matrice classique.A preferred embodiment relates to a matrix whose all resistors are negative temperature coefficient, and in particular identical. Indeed, whatever the matrix, the power released in the unaddressed resistors is lower than the power dissipated at the addressed point. The temperature of the resistor addressed therefore increases faster than the temperature of the rest of the circuit: even if all the resistors are at a negative temperature coefficient, or even identical, the value of the unaddressed resistances will decrease less rapidly over time than that of the resistance addressed. A phenomenon of increase in power released by the unaddressed resistances occurs, but less than the increase in the power dissipated by the resistance addressed. There is therefore also in this case a gain in yield compared to that achieved in a conventional matrix.

Avantageusement, le matériau utilisé pour certaines des lignes et colonnes, voire toutes, possède un coefficient de température positif, ce qui entraîne une augmentation de la résistance de ces éléments et donc une diminution de puissance perdue.Advantageously, the material used for some or all of the rows and columns has a positive temperature coefficient, which leads to an increase in the resistance of these elements and therefore a decrease in lost power.

Plusieurs résistances de la matrice selon l'invention, voir toutes, peuvent être couplées à des composants pour les activer. L'invention se rapporte également à un dispositif utilisant cette matrice, tel une biopuce ou une carte réactionnelle.Several resistors of the matrix according to the invention, see all, can be coupled to components to activate them. The invention also relates to a device using this matrix, such as a biochip or a reaction card.

Avantageusement, pour optimiser son rendement, il est possible d'ajuster, par exemple par un générateur d'impulsions programmable, le temps d'application de la tension de commande sur une résistance.Advantageously, to optimize its efficiency, it is possible to adjust, for example by a programmable pulse generator, the time of application of the control voltage on a resistor.

L'invention se rapporte également au procédé de fabrication d'une matrice de résistances dont une résistance, associée à un composant activable thermiquement, est formée d'un matériau mis en place, par exemple par dépôt, sur un substrat, le matériau possédant une résistance à coefficient de température négatif.The invention also relates to the method of manufacturing a resistor matrix whose resistance, associated with a thermally activatable component, is formed of a material put in place, for example by depositing, on a substrate, the material having a resistance to negative temperature coefficient.

BRÈVE DESCRIPTION DES DESSINSBRIEF DESCRIPTION OF THE DRAWINGS

L'invention sera mieux comprise au moyen des figures suivantes, qui servent uniquement à illustrer l'invention et ne sont nullement restrictives:

  • FIG. 1 : schéma d'une matrice de résistances, avec indication d'un courant induit.
  • FIG.2: évolution par rapport au temps de différents paramètres en cours d'utilisation d'une matrice de résistances à coefficient de température positif (FIG.2a) et d'une matrice de résistances à coefficient de température négatif (FIG.2b).
  • FIG.3: synopsis d'un exemple de fabrication d'une matrice préférée selon l'invention.
The invention will be better understood by means of the following figures, which serve only to illustrate the invention and are not restrictive:
  • FIG. 1: diagram of a resistance matrix, with indication of an induced current.
  • FIG. 2: evolution with respect to the time of various parameters in use of a matrix of resistances with positive temperature coefficient (FIG. 2a) and of a matrix of resistances with negative coefficient of temperature (FIG. 2b) .
  • FIG. 3: a synopsis of an example of manufacturing a preferred matrix according to the invention.

EXPOSÉ DÉTAILLÉ DE MODES DE RÉALISATION PARTICULIERSDETAILED PRESENTATION OF PARTICULAR EMBODIMENTS

Ainsi que décrit précédemment, la figure 1 représente une matrice classique de résistances adressables séparément comprenant N lignes, M colonnes et NM résistances. Ces résistances peuvent être commandées soit simultanément, soit successivement, soit encore selon une combinaison de ces deux modes.As described previously, FIG. 1 represents a conventional matrix of separately addressable resistors comprising N rows, M columns and NM resistors. These resistors can be controlled either simultaneously, or successively, or again according to a combination of these two modes.

La résistance Rij est adressée, et dissipe une puissance P ij : P ij = U 2 R ij ,

Figure imgb0001
avec U tension aux bornes. La puissance Pij peut notamment être utilisée pour activer thermiquement un composant associé à la résistance Rij.The resistance R ij is addressed, and dissipates a power P ij : P ij = U 2 R ij ,
Figure imgb0001
with U terminal voltage. The power P ij may in particular be used to thermally activate a component associated with the resistor R ij .

Le rendement Qij de la résistance Rij adressée est égal à la puissance Pij rapportée à la puissance totale dégagée. Or, les autres éléments de la matrice réagissent eux aussi à la tension d'adressage : un exemple de courant induit est ainsi représenté en pointillés, qui entraîne dans cette configuration un dégagement de puissance notamment par les résistances Ri+1 j, Ri+1 j+1, Ri j+1, Ri j+2, ainsi que par les segments de lignes et colonnes les séparant. Ces paramètres sont à prendre en compte pour l'évaluation du rendement.The efficiency Q ij of the resistor R ij addressed is equal to the power P ij referred to the total power released. However, the other elements of the matrix also react to the addressing voltage: an example of induced current is thus represented in dotted lines, which causes in this configuration a power release in particular by the resistors R i + 1 j , R i + 1 j + 1 , R i j + 1 , R i j + 2 , as well as by the segments of lines and columns separating them. These parameters are to be taken into account for performance evaluation.

Par ailleurs, toute dissipation de puissance s'accompagne d'un échauffement de la résistance concernée et d'une élévation de sa température. La température de la résistance adressée augmente plus et plus vite que celle des autres éléments.Moreover, any dissipation of power is accompanied by a heating of the resistance concerned and an increase in temperature. The temperature of the addressed resistance increases more and faster than that of the other elements.

Or les matériaux classiques pour fabriquer des résistances voient leur résistance augmenter lorsque la température augmente : voir la courbe Rij de la figure 2a. La puissance dissipée (courbe Pij) par la résistance Rij va donc diminuer au cours du temps, et ce plus rapidement que la puissance dégagée par les autres résistances, dont la température et la résistance (courbe Rna) augmentent moins vite. Le rendement de la résistance Rij adressée diminue donc au fur et à mesure de son activation (courbe Qij), et l'augmentation de température, qui est l'objectif souhaité dans le cadre des matrices de commande pour chauffage par effet Joule des éléments, ralentit.However, conventional materials for making resistors have their resistance increase as the temperature increases: see the curve R ij in FIG. 2a. The power dissipated (curve P ij ) by the resistance R ij will therefore decrease over time, and more rapidly than the power generated by the other resistors, whose temperature and resistance (curve R na ) increase less rapidly. The efficiency of the resistor R ij addressed therefore decreases as it is activated (curve Q ij ), and the increase in temperature, which is the desired objective in the context of the control matrices for heating by Joule effect of elements, slows down.

Dans le cadre de l'invention, on utilise pour fabriquer la résistance Rij un matériau dont la résistance diminue avec la température, c'est-à-dire une résistance à coefficient de température négatif, ou NTCR (« Negative Thermal Coefficient Resistance »). Ce matériau peut être l'un des composants de la résistance ou la résistance peut être fabriquée entièrement d'un tel matériau. Des exemples en sont le Nitrure de Tantale, des alliages Nickel-Chrome, ou des nitrures de matériaux réfractaires. Le coefficient de température (TCR) peut être ajusté, soit par la combinaison de matériaux, soit par les paramètres choisis lors de la fabrication de la résistance. Selon les besoins, le NTCR peut ainsi varier de -100 à -3000 ppm/°C.In the context of the invention, is used to manufacture the resistance R ij a material whose resistance decreases with temperature, that is to say a negative temperature coefficient resistance, or NTCR (" Negative Thermal Coefficient Resistance " ). This material may be one of the components of the resistor or the resistor may be made entirely of such material. Examples are the Nitride of Tantalum, Nickel-Chrome alloys, or nitrides of refractory materials. The temperature coefficient (TCR) can be adjusted either by the combination of materials or by the parameters chosen during the manufacture of the resistor. Depending on the needs, the NTCR can thus vary from -100 to -3000 ppm / ° C.

Dans ce cas d'une matrice de NTCR illustré par la figure 2b, au cours du temps, la dissipation d'énergie par la résistance adressée Rij augmente ainsi que sa température, sa résistance (courbe Rij) diminue, et donc sa puissance dissipée (courbe Pij) augmente d'autant plus.In this case of a matrix of NTCR illustrated in FIG. 2b, over time, the dissipation of energy by the resistor addressed R ij increases as well as its temperature, its resistance (curve R ij ) decreases, and therefore its power dissipated (curve P ij ) increases all the more.

On constate aussi sur la figure 2b que, dans ce cas où toutes les résistances sont des NTCR, les autres résistances à coefficient de température négatif qui ne sont pas adressées voient également leur résistance diminuer (courbe Rna), mais de façon moindre car leur température évolue moins vite, la puissance dégagée par elles restant inférieure à la puissance dissipée Pij. Le rendement de la résistance adressée (courbe Qij) augmente donc.It can also be seen in FIG. 2b that, in this case where all the resistors are NTCRs, the other negative temperature coefficient resistors that are not addressed also have their resistance decrease (curve R na ), but to a lesser extent because their temperature evolves less quickly, the power released by them remaining lower than the power dissipated P ij . The output of the addressed resistor (curve Q ij ) therefore increases.

Une combinaison des deux exemples est envisageable, où la résistance adressée Rij est à coefficient de température négatif, et les autres Rna à coefficient de température positif : on constaterait alors que le rendement Qij du point adressé augmente d'autant plus (non illustré), et notamment dans des proportions plus grandes encore que dans le cas d'une matrice totalement NTCR. D'autres combinaisons sont envisageables, avec par exemple une ligne et/ou une colonne NTCR seulement.A combination of the two examples is possible, where the resistance addressed R ij is negative temperature coefficient, and the other R na positive temperature coefficient: it would be found that the efficiency Q ij of the addressed point increases all the more (no illustrated), and in particular in even greater proportions than in the case of a fully NTCR matrix. Other combinations are possible, for example with a line and / or a column NTCR only.

Par ailleurs, la résistance Rij est adressée par une puissance de commande qui détermine la tension U aux bornes et la puissance Pij dissipée par cette résistance.Moreover, the resistor R ij is addressed by a control power which determines the voltage U at the terminals and the power P ij dissipated by this resistor.

Un facteur de modulation de Pij autre que la valeur de chaque résistance est donc la puissance « réellement » adressée à Rij. Cette puissance est inférieure à la puissance de commande initiale, avec des pertes partielles dans les autres résistances tel que décrit plus haut, mais également des pertes reliées à la résistance intrinsèque des lignes et des colonnes.A modulation factor of P ij other than the value of each resistor is therefore the power "really" addressed to R ij . This power is lower than the initial control power, with partial losses in the other resistors as described above, but also losses related to the intrinsic resistance of the rows and columns.

Il peut donc être avantageux d'utiliser un matériau à TCR positif, tel l'aluminium ou le cuivre, pour ces lignes et colonnes : par conduction thermique depuis la résistance chauffée, le matériau utilisé dans les lignes et colonnes est susceptible de chauffer. Grâce à l'utilisation d'un matériau à TCR positif pour ces lignes et colonnes, la résistance des lignes et colonnes va alors augmenter, et la puissance perdue dans celles-ci va diminuer, augmentant d'autant la puissance adressée, et par là même le rendement de la résistance adressée.It may therefore be advantageous to use a positive TCR material, such as aluminum or copper, for these lines and columns: by thermal conduction from the heated resistor, the material used in the rows and columns is capable of heating. Thanks to the use of a positive TCR material for these lines and columns, the resistance of the lines and columns will then increase, and the power lost in them will decrease, increasing the power addressed, and thereby even the efficiency of the resistance addressed.

La puissance adressée, et donc la tension aux bornes de la résistance adressée, peuvent également être modulées lors de l'utilisation par ajustement de la durée d'application de cette tension. Ce dernier paramètre temporel permet d'optimiser le rendement souhaité pour chaque résistance Rij adressée, et la température souhaitée pour activer le composant concerné par cette résistance. En effet, le processus permettant le chauffage par effet Joule est un phénomène dynamique. Ainsi, l'application d'une tension pendant une durée courte, par exemple 0,2 s, permettra d'obtenir des élévations de température modérées, de l'ordre de 100°C, et l'application de la commande pendant une durée plus longue, par exemple 10 s, entraînera des températures plus élevées, de l'ordre de 500°C (voir figure 2b). A titre d'exemple est représenté dans la figure 1 un générateur d'impulsions (1) relié aux lignes et colonnes, qui permet d'appliquer des tensions déterminées en amplitude et en durée aux bornes desdites lignes (N) et colonnes.The power addressed, and therefore the voltage across the resistor addressed, can also be modulated during use by adjusting the duration of application of this voltage. This last time parameter makes it possible to optimize the desired efficiency for each resistor R ij addressed, and the desired temperature to activate the component concerned by this resistor. Indeed, the process allowing heating by Joule effect is a dynamic phenomenon. Thus, the application of a voltage for a short duration, for example 0.2 s, will make it possible to obtain moderate temperature increases, of the order of 100 ° C., and the application of the control for a period of time. longer, for example 10 s, will result in higher temperatures, of the order of 500 ° C (see Figure 2b). By way of example, there is shown in FIG. 1 a pulse generator (1) connected to the rows and columns, which makes it possible to apply voltages determined in amplitude and duration across said lines (N) and columns.

Exemple 1Example 1

Soit un réseau de 144 résistances adressées par 12 lignes et 12 colonnes, avec des résistances chauffantes à adresser de 1000 ohms et une résistance inter lignes et inter colonnes de 1 ohm, c'est-à-dire une résistance intrinsèque de 1 ohm de chaque ligne et/ou colonne d'interconnexion.Either a network of 144 resistors addressed by 12 lines and 12 columns, with heating resistors to be addressed of 1000 ohms and a resistance inter lines and inter columns of 1 ohm, that is to say an intrinsic resistance of 1 ohm of each line and / or interconnect column.

Par simulation, on a trouvé que pour des résistances à coefficient de température nul, la puissance dissipée au point adressé est de 15 % de la puissance totale dissipée dans le réseau, et que la puissance maximale dégagée par les autres résistances est de 4,5 %.By simulation, it has been found that for resistances with a zero temperature coefficient, the power dissipated at the addressed point is 15% of the total power dissipated in the network, and that the maximum power generated by the other resistors is 4.5. %.

Si les résistances ont un TCR de -2500 ppm/°C, lorsque la température de la résistance adressée atteint 300°C, les autres résistances ont au maximum atteint 100°C, et la puissance dissipée par la résistance adressée atteint 40 % de la puissance totale au lieu de 15 %, c'est-à-dire qu'elle a plus que doublé.If the resistors have a TCR of -2500 ppm / ° C, when the temperature of the resistor addressed reaches 300 ° C, the other resistances have a maximum of 100 ° C, and the power dissipated by the resistor addressed reaches 40% of the resistance. total power instead of 15%, that is, more than doubling.

La matrice selon l'invention permet donc d'obtenir des températures très élevées, de 500°C et plus, en des points très localisés, pour des matrices qui permettent d'adresser de nombreux points (50 jusque 1000 et plus), et ce de façon rapide. Un ajustement de la puissance maximale nécessaire est possible en contrôlant la valeur du TCR des résistances. Ces effets sont de plus possibles sans dispositif de diodes ou d'interrupteurs pour alourdir le système, et la matrice peut être réalisée sur différents types de substrats, par l'intermédiaire de méthodes de fabrication évitant les technologies lourdes.The matrix according to the invention therefore makes it possible to obtain very high temperatures, of 500 ° C. and more, at very localized points, for matrices which make it possible to address many points (50 to 1000 and more), and this fast way. An adjustment of the maximum power required is possible by checking the value of the resistance TCR. These effects are furthermore possible without a diode or switch device to weigh down the system, and the matrix can be made on different types of substrates, by means of manufacturing methods avoiding heavy technologies.

En effet, pour réaliser une matrice selon l'invention, des technologies standard de la microélectronique, impliquant notamment dépôt et photolithogravure, sont utilisées de façon préférée. Cependant, toute autre technique utilisable pour la fabrication de microsystèmes est envisageable : sérigraphie de colles, adhésifs, polymères conducteurs ou non, pâtes de sérigraphie, technologie de jet d'encre,...Indeed, to achieve a matrix according to the invention, standard technologies of microelectronics, including deposition and photolithography, are used in a preferred manner. However, any other technique that can be used for the manufacture of microsystems is conceivable: screen printing of glues, adhesives, conductive or non-conductive polymers, screen printing pastes, inkjet technology, etc.

La figure 3 représente un exemple de procédé de fabrication: un substrat (10) tel le silicium est choisi. Une couche d'aluminium (12) est déposée par pulvérisation cathodique (FIG.3a). Photolithographie et gravure chimique permettent d'obtenir des motifs lignes (14) (FIG.3b). Une couche de matériau résistif NTCR (16) est déposée par pulvérisation cathodique (FIG.3c) ; les motifs résistifs (18) sont obtenus par photolithographie et gravure (FIG.3d). Une couche diélectrique (20) est ensuite déposée pour isoler lignes (14) et colonnes (FIG.3e), avec photolithographie des motifs de reprise de contact (22) sur les colonnes (FIG.3f). Enfin, une couche d'aluminium (12) est déposée par pulvérisation cathodique (FIG.3g), les motifs colonnes (24) étant réalisés par photolithographie et gravure (FIG.3h). Les composés activables thermiquement sont associés selon les techniques connues.FIG. 3 represents an example of a manufacturing method: a substrate (10) such as silicon is chosen. An aluminum layer (12) is deposited by sputtering (FIG. 3a). Photolithography and chemical etching make it possible to obtain line patterns (14) (FIG. 3b). A layer of NTCR resistive material (16) is deposited by sputtering (FIG.3c); the resistive patterns (18) are obtained by photolithography and etching (FIG. 3d). A dielectric layer (20) is then deposited to isolate rows (14) and columns (FIG. 3e), with photolithography of the contact resumption patterns (22) on the columns (FIG. 3f). Finally, an aluminum layer (12) is deposited by cathodic sputtering (FIG. 3g), the column patterns (24) being made by photolithography and etching (FIG. 3h). The thermally activatable compounds are combined according to known techniques.

Typiquement, la couche d'aluminium (12) a une épaisseur de 500 à 50000 Å (50 à 5000 nm), de préférence 500 nm; l'épaisseur de NTCR (16) est typiquement comprise entre 500 à 5000 Å (50 à 500 nm), de préférence 100 nm. Le NTCR peut être ajusté de préférence entre -100 et -3000 ppm/°C suivant les conditions de dépôt et les paramètres d'utilisation recherchés.Typically, the aluminum layer (12) has a thickness of 500 to 50000 Å (50 to 5000 nm), preferably 500 nm; the thickness of NTCR (16) is typically between 500 to 5000 Å (50 to 500 nm), preferably 100 nm. The NTCR can be adjusted preferably between -100 and -3000 ppm / ° C depending on the deposition conditions and the desired use parameters.

Comme isolant diélectrique (20), on peut utiliser un polymère ou un minéral tel SiO2 ou Si3N4. Le substrat (10) est isolant et comprend par exemple du silicium, un polymère, un verre, une céramique, etc., ou encore une combinaison de ces matériaux.As the dielectric insulator (20), it is possible to use a polymer or a mineral such as SiO 2 or Si 3 N 4 . The substrate (10) is insulating and comprises, for example, silicon, a polymer, a glass, a ceramic, etc., or a combination of these materials.

ApplicationApplication

Les matrices selon l'invention trouvent leur application dans de nombreux domaines, comme par exemple la biologie, l'imagerie ou les écrans plats, où les systèmes de commande doivent être miniaturisés. Plus particulièrement, les matrices selon l'invention peuvent être utilisées pour fabriquer des biopuces ou encore des « Lab On Chip », appelés aussi cartes réactionnelles. Une telle carte réactionnelle est connue par exemple du document WO 02/18823. De façon générale, on appellera par la suite dispositif à usage biologique toute structure apte à être utilisée dans des applications en biologie, comme par exemple les cartes réactionnelles ou les biopuces.The matrices according to the invention find their application in many fields, such as, for example, biology, imaging or flat screens, where the control systems must be miniaturized. More particularly, the matrices according to the invention can be used to manufacture biochips or " Lab On Chips ", also called reaction cards. Such a reaction map is known for example from WO 02/18823. In general, we will call later device for use biological any structure suitable for use in applications in biology, such as reaction maps or biochips.

Cependant, pour réaliser de tels dispositifs à usage biologique, un réseau micro fluidique est intégré sur la carte de support du dispositif: le liquide à analyser doit circuler par exemple entre les différents réactifs. Afin de faire circuler un liquide dans un réseau de micro canaux, on actionne des micro-vannes.However, to produce such devices for biological use, a microfluidic network is integrated on the support card of the device: the liquid to be analyzed must flow for example between the different reagents. In order to circulate a liquid in a network of micro-channels, micro-valves are actuated.

Des micro-vannes ont été développées pour des applications dans des microsystèmes, des biopuces et des cartes réactionnelles. Un exemple en est donné dans le document FR-A-2 828 244, qui concerne des micro-vannes actionnées par effet pyrotechnique. La mise en route des micro-vannes demande de réaliser un chauffage localisé en dessous du microsystème, par exemple par l'échauffement d'une résistance sous chaque micro-vanne qui sera alors actionnée par effet Joule.Micro valves have been developed for applications in microsystems, biochips and reaction maps. An example is given in document FR-A-2 828 244, which relates to micro-valves actuated by pyrotechnic effect. The startup of the micro-valves requires localized heating below the microsystem, for example by heating a resistance under each micro-valve which will then be actuated by Joule effect.

Pour cette application préférée, le réseau de micro-vannes doit être conséquent, avec une densité importante de ces composants à activer : par exemple 50 à 1000 micro-vannes sur une surface typiquement de l'ordre de la taille d'une carte de crédit doivent être adressées séparément. L'utilisation de matrices de résistances semble donc toute indiquée.For this preferred application, the network of micro-valves must be consistent, with a high density of these components to activate: for example 50 to 1000 micro valves on a surface typically of the order of the size of a credit card must be addressed separately. The use of matrices of resistors therefore seems appropriate.

Les matrices selon l'invention ajoutent comme avantage l'optimisation du rendement de chaque adressage, et donc une meilleure efficacité et spécificité des analyses effectuées.The matrices according to the invention add the advantage of optimizing the efficiency of each addressing, and therefore a better efficiency and specificity of the analyzes performed.

Claims (22)

  1. Resistor array comprising N lines of commands Ni, with i being a strictly positive integer, M columns of commands Mj, with j being a strictly positive integer, and NM resistors Rij, each resistor Rij being commanded by the line Ni and the column Mj, characterised in that at least one of the resistors has a negative thermal coefficient resistance and is associated with a thermally activatable component.
  2. Array according to claim 1, characterised in that each resistor Rij is associated with a thermally activatable component.
  3. Array according to one of claims 1 or 2, wherein at least one of the activatable components is a microvalve.
  4. Array according to one of claims 1 to 3, wherein all of the resistors Rij have negative thermal coefficient resistances.
  5. Array according to one of claims 1 to 4, characterised in that at least one of the negative thermal coefficient resistors is made of a single material.
  6. Array according to claim 4, characterised in that all of the negative thermal coefficient resistors are made of a single material.
  7. Array according to one of claims 1 to 6, characterised in that all of the resistors are identical.
  8. Array according to one of the previous claims, wherein the negative thermal coefficient resistor includes tantalum nitride, a nickel-chromium alloy, or a nitride from refractory material.
  9. Array according to one of the previous claims, wherein the negative thermal coefficient resistor has a temperature coefficient of between -100 and -3000 ppm/°C.
  10. Array according to any one of claims 1 to 9, characterised in that the material used for at least one line and/or at least one column has a positive thermal coefficient resistance.
  11. Array according to claim 10, characterised in that all of the lines and/or all of the columns are made of a material with a positive thermal coefficient resistance.
  12. Array according to one of claims 1 to 11, characterised in that all of the lines and all of the columns are made of the same material.
  13. Array according to one of claims 1 to 12, which is associated with an insulating substrate.
  14. Array according to one of the previous claims, also including means for adjusting the time for which a command voltage is applied to at least one of the resistors Rij, in particular to each resistor Rij, so as to obtain the desired output.
  15. Method for producing a resistor array, wherein at least one of the resistors is obtained by placing a resistive material (16), of which the resistance has a negative thermal coefficient, on a substrate (10) and including the association of this resistor with a thermally-activatable component.
  16. Production method according to claim 15, including the deposition of the resistive material by cathode sputtering.
  17. Production method according to one of claims 15 or 16, including the deposition of a conductive material (12) on the substrate (10) so as to form lines (14) before the resistive material is deposited.
  18. Production method according to one of claims 15 to 17, including the deposition of a conductive material (12) so as to form columns (24) after the resistive material has been deposited.
  19. Method according to one of claims 15 to 18, including a step of depositing a material (20) insulating the lines from the columns on said substrate.
  20. Method according to one of claims 17 to 19, including the choice of a material of which the resistance has a positive thermal coefficient for the lines and/or columns.
  21. Method according to one of claims 15 to 20, including the association of the array with a microvalve array.
  22. Device for biological use, including an array according to one of claims 1 to 14, associated with a microfluidic array.
EP04805719A 2003-10-03 2004-10-01 Independently addressable resistance matrixes and method for the production thereof Not-in-force EP1668654B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0350651A FR2860641B1 (en) 2003-10-03 2003-10-03 ADDRESSABLE RESISTOR MATRIX INDEPENDENTLY, AND METHOD FOR MAKING SAME
PCT/FR2004/050476 WO2005034148A1 (en) 2003-10-03 2004-10-01 Independently addressable resistance matrixes and method for the production thereof

Publications (2)

Publication Number Publication Date
EP1668654A1 EP1668654A1 (en) 2006-06-14
EP1668654B1 true EP1668654B1 (en) 2007-01-24

Family

ID=34307568

Family Applications (1)

Application Number Title Priority Date Filing Date
EP04805719A Not-in-force EP1668654B1 (en) 2003-10-03 2004-10-01 Independently addressable resistance matrixes and method for the production thereof

Country Status (6)

Country Link
US (1) US7642893B2 (en)
EP (1) EP1668654B1 (en)
AT (1) ATE352845T1 (en)
DE (1) DE602004004554T2 (en)
FR (1) FR2860641B1 (en)
WO (1) WO2005034148A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101507807B1 (en) * 2008-08-14 2015-04-03 삼성전자주식회사 Thermal inkjet printhead and method of driving the same

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2031805A (en) * 1978-10-13 1980-04-30 Leeds & Northrup Ltd Thermal printing device
US4463359A (en) * 1979-04-02 1984-07-31 Canon Kabushiki Kaisha Droplet generating method and apparatus thereof
US4803457A (en) * 1987-02-27 1989-02-07 Chapel Jr Roy W Compound resistor and manufacturing method therefore
US5846708A (en) * 1991-11-19 1998-12-08 Massachusetts Institiute Of Technology Optical and electrical methods and apparatus for molecule detection
DE4333065A1 (en) * 1993-09-29 1995-03-30 Bosch Gmbh Robert Electronic switch
US5699462A (en) * 1996-06-14 1997-12-16 Hewlett-Packard Company Total internal reflection optical switches employing thermal activation
US5781211A (en) * 1996-07-23 1998-07-14 Bobry; Howard H. Ink jet recording head apparatus
CN1137999C (en) * 2000-07-04 2004-02-11 清华大学 Integrated microarray device
US6309053B1 (en) * 2000-07-24 2001-10-30 Hewlett-Packard Company Ink jet printhead having a ground bus that overlaps transistor active regions
EP1188840A3 (en) 2000-07-26 2003-04-23 Agilent Technologies, Inc. (a Delaware corporation) Chemical reaction method and apparatus
FR2813207B1 (en) 2000-08-28 2002-10-11 Bio Merieux REACTIONAL CARD AND USE OF SUCH A CARD
FR2828244A1 (en) 2001-04-27 2003-02-07 Poudres & Explosifs Ste Nale Microactuator operated by firing a pyrotechnic charge in a chamber inside a solid support to deform a membrane but not breach the walls of the support
FR2828245B1 (en) 2001-04-27 2005-11-11 Poudres & Explosifs Ste Nale PYROTECHNIC MICROSYSTEMS FOR MICROSYSTEMS
US6538508B2 (en) * 2001-04-27 2003-03-25 Broadcom Corporation Programmable gain amplifier with glitch minimization
AU2002312411A1 (en) * 2001-06-07 2002-12-16 Proligo Llc Microcalorimetric detection of analytes and binding events
JP2003030224A (en) * 2001-07-17 2003-01-31 Fujitsu Ltd Device for preparing document cluster, system for retrieving document and system for preparing faq

Also Published As

Publication number Publication date
WO2005034148A1 (en) 2005-04-14
US20070247274A1 (en) 2007-10-25
DE602004004554T2 (en) 2007-10-31
EP1668654A1 (en) 2006-06-14
US7642893B2 (en) 2010-01-05
DE602004004554D1 (en) 2007-03-15
FR2860641B1 (en) 2006-10-13
ATE352845T1 (en) 2007-02-15
FR2860641A1 (en) 2005-04-08

Similar Documents

Publication Publication Date Title
EP1639613B1 (en) Low power consumption bistable microswitch
EP1040492B1 (en) Microsystem with element deformable by the action of a heat-actuated device
EP1778976B1 (en) Electrode addressing method
EP1376846B1 (en) Device for the displacement of small volumes of liquid along a micro-catenary using electrostatic forces
FR2866493A1 (en) DEVICE FOR CONTROLLING THE DISPLACEMENT OF A DROP BETWEEN TWO OR MORE SOLID SUBSTRATES
FR2749391A1 (en) MAGNETORESISTANCE-BASED MOLECULAR DETECTION METHOD AND APPARATUS
EP3381060A1 (en) Illuminated faceplate and method for producing such an illuminated faceplate
FR2990320A1 (en) DIGITAL SPEAKER WITH IMPROVED PERFORMANCE
SE1050461A1 (en) Methods for manufacturing a starting substrate disk for semiconductor manufacturing, with disk-through connections
WO2007033990A1 (en) Making a two-phase liquid/liquid or gas system in microfluidics
FR2662013A1 (en) ELECTRIC RESISTANCE, RESISTANCE NETWORK AND METHOD FOR MANUFACTURING SAME.
FR3030995A1 (en) ELECTROLUMINESCENT LIGHT SOURCE WITH ADJUSTABLE OR ADJUSTABLE LUMINANCE LUMINANCE PARAMETER AND METHOD FOR ADJUSTING A LUMINANCE PARAMETER OF THE LIGHT EMITTING LIGHT SOURCE
EP1668654B1 (en) Independently addressable resistance matrixes and method for the production thereof
EP1543535B1 (en) Method of manufacture of electrostatically actuated low response time power commutation micro-switches
EP1438728B1 (en) Micro electro mechanical systems (mems) with variable high-ratio and low-voltage actuation micro-capacitor
JP2007510954A (en) Electrodynamic micromirror device and method for manufacturing the same
EP3109900B1 (en) Method for manufacturing a plurality of dipoles in the form of islands with self-aligned electrodes
WO2002005946A1 (en) Thermal injection and proportioning head, method for making same and functionalising or addressing system comprising same
EP3073496B1 (en) Device with heat-sensitive resistance
EP2145854B1 (en) MEMS device comprising an electro-mecanical nanotube-based interface between a component and its support
EP3616471B1 (en) Method and system for controlling the electric current within a semiconductor light source defining at least two distinct light emission regions
EP1900679A1 (en) Forming a sacrificial layer for making a suspended element
WO2020094812A1 (en) Light device for a motor vehicle, comprising a matrix light source
EP3926392B1 (en) Optical device and manufacturing process
WO1998011586A1 (en) Electric switching device and display device using same

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PL PT RO SE SI SK TR

17P Request for examination filed

Effective date: 20060404

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: COMMISSARIAT A L'ENERGIE ATOMIQUE

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

DAX Request for extension of the european patent (deleted)
AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PL PT RO SE SI SK TR

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

Ref country code: IE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

Free format text: NOT ENGLISH

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

Free format text: LANGUAGE OF EP DOCUMENT: FRENCH

REF Corresponds to:

Ref document number: 602004004554

Country of ref document: DE

Date of ref document: 20070315

Kind code of ref document: P

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070424

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070424

GBT Gb: translation of ep patent filed (gb section 77(6)(a)/1977)

Effective date: 20070403

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070505

NLV1 Nl: lapsed or annulled due to failure to fulfill the requirements of art. 29p and 29m of the patents act
REG Reference to a national code

Ref country code: IE

Ref legal event code: FD4D

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20071025

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

BERE Be: lapsed

Owner name: COMMISSARIAT A L'ENERGIE ATOMIQUE

Effective date: 20071031

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070425

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20071031

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20071031

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

Effective date: 20080630

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20071031

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20071001

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070725

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20081031

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20081031

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: IT

Payment date: 20101022

Year of fee payment: 7

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20070124

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20121001

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20151019

Year of fee payment: 12

Ref country code: DE

Payment date: 20151014

Year of fee payment: 12

REG Reference to a national code

Ref country code: DE

Ref legal event code: R119

Ref document number: 602004004554

Country of ref document: DE

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20161001

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170503

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20161001