Classifications

• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B81—MICROSTRUCTURAL TECHNOLOGY
  • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
  • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
  • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
  • B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
  • B81C1/00111—Tips, pillars, i.e. raised structures
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/26—Bombardment with radiation
  • H01L21/263—Bombardment with radiation with high-energy radiation
  • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
  • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B82—NANOTECHNOLOGY
  • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
  • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Definitions

• the invention comprises a new manufacturing procedure to fabricate silicon nanostructures using electron beam annealing.
• silicon nanostructures may have applications in optoelectronics, in single electron devices and as cathodes for vacuum microelectronics.
• One key challenge facing the practical realisation of devices based on silicon nanostructure technology is the identification of suitable nanofabrication techniques.
• Conventional silicon nanostructure fabrication technology implements electron beam lithography for the high-resolution definition of nanostructure etch masks (for example as described in W. Chen and H. Ahmed, Appl. Phys. Lett., Vol 63, pp 1116, (1993)).
• Such a technique provides high uniformity, precise dimensional control and compatibility with conventional processing techniques.
• the restrictively low throughput associated with electron-beam lithography is a serious constraint to its development as a practical industrial nanofabrication tool.
• Alternative nanofabrication tools which emphasise increased throughput have thus been investigated.
• the umformity may be improved using the deposition of size-selected Au clusters followed by electron cyclotron resonance plasma etching (ECR etching) with SF 6 at — 130 °C (as described in T. Tada, T. Kanayama, K. Koga, P. Weibel, S. J. Carroll, K. Seeger and R. E. Palmer, J. Phys. D., vol 31, L21 (1998)).
• ECR etching electron cyclotron resonance plasma etching
• Nanopillars of 3nm diameter have been realised with excellent spatial control, however this technique is not practical for high density fabrication. There is a need for a method of fabricating silicon nanowhiskers that has high throughput and produces nanowhiskers with acceptable uniformity.
• the invention comprises a method of forming nanostructures on a silicon substrate including the steps of in a chamber heating the substrate with an electron beam to a peak temperature, holding the peak temperature for a predetermined time, and decreasing the temperature of the substrate.
• the invention comprises a method of preventing the formation of nanostructures on a silicon substrate including the steps of in a chamber implanting nitrogen ions with an implantation energy of between 50 and 150 keV into the silicon substrate, heating the substrate with an electron beam to a peak temperature, holding the peak temperature for a predetermined time, and decreasing the temperature of the substrate.
• the invention comprises a nanostructure on a silicon substrate formed using the method of the invention.
• the invention comprises a silicon substrate including a nanostructure formed using the method of the invention.
• Figure 1 is a flow chart of the steps of the annealing process for forming silicon nanowhiskers
• Figure 2A is an atomic force microscope image of nanowhiskers formed on a
• Figure 2B is a chart showing the silicon substrate of Figure 2A and analysis of the silicon substrate;
• Figure 3 A is an atomic force microscope image of nanowhiskers formed on a (111) silicon substrate
• Figure 3B is a chart showing the silicon substrate of Figure 3 A and analysis of the silicon substrate;
• Figure 4A is an atomic force microscope image of nanowhiskers formed on a (100) silicon substrate
• Figure 4B is an atomic force microscope image of nanowhiskers formed on a
• Figure 5A is an atomic force microscope image of nanowhiskers formed on a (100) silicon substrate
• Figure 5B is an atomic force microscope image of nanowhiskers formed on a (100) silicon substrate
• Figure 6 is a graph showing nanostructure density and nanostructure height as a function of annealing time
• Figure 7 is a graph showing nitrogen profiles for 50 keV and 100 keV 14 N ions implanted into silicon
• Figure 8 is an atomic force microscope image of silicon after nitrogen ion implantation and annealing
• Figure 9 is a nuclear reaction analysis (NRA) microprobe line scan from the boundary between unimplanted and implanted areas.
• Figure 10 is a flow chart showing of the steps used for forming nanoboulders
• Figure 11A is an atomic force microscope image of a silicon substrate surface implanted with carbon ions
• Figure 11B is a graph showing the variation in height on the surface of the silicon substrate of Figure 11 A;
• Figure 12A is an atomic force microscope image of a silicon substrate surface implanted with carbon ions and annealed
• Figure 12B is a second atomic force microscope image of the silicon substrate surface of Figure 12A implanted with carbon ions and annealed
• Figure 12C is a graph of the variation in height of the nanoboulders formed on the surface of the silicon substrate of Figure 12 A;
• Figure 12D is a section of Figure 12 A showing the line on which the graph of Figure 12C has been taken;
• Figure 13 shows an atomic force microscope image and scan analysis of nanoboulders formed on silicon (100);
• Figure 14 shows an atomic force microscope image and scan analysis of nanoboulders formed on silicon (100);
• Figure 15 is a graph showing the relationship between implantation fluence and volume of nanoboulders and size of nanoboulders;
• Figure 16 is a graph showing the relationship between nanoboulder diameter and spacing between nanoboulders
• Figure 17 shows neon ion implantation depth profiles in a silicon substrate
• Figure 18 is an atomic force microscope image showing the surface of a silicon substrate after implantation with neon ions
• Figure 19 is an atomic force microscope image of the surface of a silicon substrate after implantation with neon ions and annealing
• Figure 20 is an atomic force microscope image of the surface of a silicon substrate after plasma immersion ion implantation with nitrogen and annealing
• Figure 21 is an atomic force microscope image of the surface of a silicon substrate after plasma immersion ion implantation with nitrogen and annealing
• Figure 22 is an atomic force microscope image of the surface of a silicon substrate after plasma immersion ion implantation with nitrogen and annealing.
• Silicon nanostructures can have differing shapes include whiskers, boulder and cavities. Various embodiments of this invention cover each of these three nanostructures.
• the formation of nanostructures of the invention all include an annealing step with different nanostructures formed by implantation of particular ions before annealing.
• Figure 1 shows the steps used in the annealing process.
• substrates are provided for processing.
• the substrates may be p-type or n-type and may be (100), (110), or (111) silicon substrates. If the substrate is p-type doping may be Boron doping. Alternatively any suitable dopant may be used.
• step 2 the silicon substrate on which the nanowhiskers are to be formed is cut to the desired target size and polished on that surface that will be annealed.
• a typical target size may be 1 ⁇ l cm.
• the silicon substrate is typically 0.5 mm thick and has resistivity of 1 - 10 ⁇ cm. However other thicknesses of silicon substrate may be used.
• step 3 the targets are mechanically cleaned by spraying pressured air onto the
• This process removes any dust or cutting products from the silicon but does not disturb the native oxide layer on the surface of the silicon substrate.
• This native oxide layer is generally 15 - 20 A thick and is formed by exposure to air and residual contaminants, typically carbon based compounds.
• step 4 the substrate is loaded into the annealing facility.
• the mechanically cleaned side of the substrate faces towards to electron beam direction.
• the annealing process may start. Ideally the residual gas pressure is as low as possible.
• step 5 the silicon substrate is heated by scanning the silicon surface with an electron beam.
• the electron beam is raster scanned along the surface of the substrate.
• This process can be broken into three steps, heating, holding the peak temperature, and cooling. The process typically begins at room temperature.
• the substrate surface is gently heated with a temperature gradient of 5 - 10 °C/s to a peak temperature.
• the peak temperature between 800 and 1200 °C, is held for between 3 and 120 seconds.
• the substrate surface is gently cooled with a temperature gradient of 5 - 10 °C/s, to room temperature.
• the electron beam is typically raster scanned over the substrate with a frequency between 1 and 10 kHz. The frequency of raster scanning is set to allow a homogeneous temperature across the substrate.
• the peak temperature is held for between 3 and 120 seconds. However longer peak temperature holding times (for example up to 1000 seconds) could be used. Processed targets can stay in the vacuum chamber for long time, such as a few hours to allow processing on many targets under identical conditions.
• Figures 2 to 5 show examples of nanostructures formed using the annealing method described with reference to Figure 1.
• Figure 2A is a 4 ⁇ m x 4 ⁇ m top view atomic force microscope image of silicon nanowhiskers produced by the annealing process of the invention using rapid thermal electron beam annealing (EB-RTA) under high vacuum conditions as described with reference to Figure 1.
• EB-RTA rapid thermal electron beam annealing
• the temperature gradient for both increasing and decreasing the temperature to produce the nanowhiskers of Figure 2A was 5°C/s.
• the substrate of Figure 2 A is (100) p-type silicon. As can be seen from this image a plurality of nanowhiskers has been formed.
• Figure 2B shows some analysis of the substrate of Figure 2A including a graph of a line across Figure 2A showing the height of some of the nanowhiskers. As can be seen from this graph the nanowhiskers in this example are up to 15 nm tall.
• Figure 3 A is a 12 ⁇ m x 12 ⁇ m top view atomic force microscope image of silicon nanowhiskers produced by the annealing process of the invention using rapid thermal electron beam annealing under high vacuum conditions.
• the temperature gradient for both increasing and decreasing the temperature to produce the nanowhiskers of Figure 2A was 5°C/s.
• the substrate of Figure 3A is (111) p-type silicon. As can be seen from this image a plurality of nanowhiskers has been formed.
• Figure 3B shows some analysis of the substrate of Figure 3 A including a graph of a line across Figure 3A showing the height of some of the nano-whiskers. As can be seen from this graph the nanowhiskers in this example are up to 50 nm tall.
• silicon nanowhiskers are produced by the manufacturing process using single sided p-type (100) and (111) silicon substrate materials (thickness 0.5 mm).
• Atomic force microscope images on the virgin silicon surface show no significant surface structures as expected.
• Figure 4 A is an 8 ⁇ m x 8 ⁇ m plan view atomic force microscope image of nanostructure growth following scanning of p-type silicon (100) at 1100°C for 15 seconds.
• 127643 type silicon is B-doped, 1 - 10 ⁇ cm and was diced into a 10 x 10 mm 2 sample. This substrate was not cleaned and thus contained native oxide (15 - 20 A thick) formed by exposure to air and residual contaminants, typically carbon-based compounds.
• the annealing system used in the fabrication of the nanostructures of Figure 4A operates with electron energy of 20 keV and sample current up to 2mA. The electron beam is focussed on the sample surface to a spot of approximately 1 mm diameter which can be electromagnetically scanned over a 1 cm 2 sample area with X-Y sweep frequencies of 1 and 10 kHz. The beam current and hence sample temperature is controlled via a thermopile detector.
• True temperature measurements can be performed using a pair of 2-color pyrometers which face the front and back sample surfaces. Residual gas analysis facilities were provided that allow in-situ monitoring of gaseous species evolved during annealing.
• the annealing chamber was evacuated with a turbomolecular pump to a base pressure ⁇ 1 x 10 "6 mbar.
• each feature is expected to be sharper than the AFM tip apex and the AFM image will thus not be a true representation of the feature, rather a convolution of AFM tip and nanostructure.
• Such convolution effects although preventing accurate imaging of the nanopillar apex, will not lead to misrepresentation of the nanowhisker density or height.
• Figure 4B is a 3 ⁇ m 3 ⁇ m top view atomic force microscope image of the central region of Figure 4A.
• the region marked C in Figure 4B is an example of a nanostructure cluster region. Both images show evidence of pillar clustering, as indicated in region C of Figure 4B. Identical clustering was observed in SEM images and is thus not a facet of the AFM imaging. The size and number of clusters was independent of the annealing temperature within the range 800°C to 1100°C.
• Figure 5 A is a 4 ⁇ m x 4 ⁇ m top view atomic force microscope image of a nanowhiskers following annealing of p-type silicon (100) at 1100°C for 3 seconds.
• Figure 5B is a 4 ⁇ m x 4 ⁇ m top view atomic force microscope image of nanowhiskers following annealing of p-type silicon (100) at 1100° for 120 seconds. Surface structures of similar shape and crystallo graphic orientation were observed following annealing at 1100 °C for durations as little as 3 s as shown in the AFM topograph of Figure 5A. However, a large number (density) of nanostructures (up to 27.6 / ⁇ m ) was observed.
• the maximum pillar height was 11 nm with an average nanopillar height of only 6 nm.
• the average pillar height observed was 12 nm, with a maximum height of 21 nm.
• Cluster formation is evident in Figures 4A, 4B, 5A, 5B and the size and number of clusters was independent of annealing duration. Conversely, a clear linear dependence exists between the average pillar height and anneal time, as shown in Figure 6.
• Figure 6 also shows the relationship between the average nanowhisker density and the anneal duration which shows that density decays exponentially reaching a constant value of 17.5 / ⁇ m 2 after approximately 60 s. So as the peak temperature is held the nanowhisker height increases linearly and the nanowhisker density decreases exponentially to a constant value.
• Implanting nitrogen ions into a silicon substrate before annealing leads to areas free of nanostructures where the implantation takes place. This can be seen in Figure 8 where an area of the silicon substrate was implanted with nitrogen ions before annealing.
• substrates were p-type silicon (100) (B-doped, 1-10 ⁇ cm) diced into 10x10 mm 2 samples. No surface cleaning or other treatments were performed on the substrates and the surface thus contains the native oxide (1.5-2.0 nm
• the samples were implanted with 50 keV (fluence of 1.15xl0 17 cm “2 ) and 100 keV (fluence of 2.77x10 17 cm “2 ) 'V ions under high vacuum conditions and at room temperature.
• Annealing was performed using an EB-RTA system at peak temperature of 1100 °C. This system operates with electron energy of 20 keV and sample current up to 2 mA.
• the annealing chamber was evacuated with a turbomolecular pump to a base pressure ⁇ lxl0 "6 mbar.
• the implantation fluences range between 10 17 and 5 x 10 17 cm "2 .
• Figure 7 shows the results of simulations of the 14 N implantation profile as determined using DYNAMIC-TRIM for 50 keV and 100 keV implantations respectively.
• the 14 N profile lies beneath the surface and corresponds to an under stoichiometric film.
• Figure 8 shows an atomic force microscope image of the silicon (100) surface following EB-RTA for a region 14 N implanted at 50 keV. Examples of nanostructures formed without 14 N implantation are shown in earlier figures. These characteristic images were taken from a single 10 x 10 mm silicon (100) substrate in which 14 N implantation was restricted to a central 5 mm diameter spot. The implanted regions, for both 50 keV and
• the relatively broad ion probe used in these experiments does not allow us to provide quantitative information regarding the sharpness of the implantation profile.
• the concentration of 14 N recorded in the un-implanted region following EB-RTA is identical to the concentration of 14 N found in virgin silicon (100). Additionally, no implanted 14 N is lost during annealing since the 14 N concentration measured in the implanted region after EB-RTA is identical to that recorded prior to annealing. Low and comparable levels of oxygen (12 x 10 15 cm “ ) and carbon (4 x 10 cm “ ) contamination were measured in the un-treated and un- implanted, annealed silicon (100) samples. However, the concentration of C (180 x 10 15 cm “2 ) and O (54 x 10 15 cm “2 ) contaminants in 14 N implanted samples was observed to have increased slightly.
• Nanoboulders are another nanostructure that can be formed using electron beam rapid thermal annealing (EB-RTA) as described with reference to Figure 1.
• Nanoboulders are boulder-like formations on the annealed surface of the silicon substrate and are formed by first implanting carbon ions into a surface of the silicon and then annealing that silicon surface.
• FIG 10 is a flow chart showing the major steps performed when forming nanoboulders.
• the target material is supplied.
• the target material may be (100), (110) or other p-type or n-type silicon.
• the target silicon is prepared for processing.
• the silicon substrate on which the nanoboulders are to be formed is cut to the desired target size.
• a typical target size may be 1 x 1 cm.
• the silicon substrate is preferably (100) or (111) p- type silicon.
• the silicon substrate is typically 0.5 mm thick and has resistivity of 1 - 10 ⁇ cm. However other thicknesses of silicon substrate may be used.
• the targets are mechanically cleaned by spraying pressured air onto the surface of the silicon substrate that will be annealed.
• the target is loaded into an ion implantation facility, a high vacuum chamber.
• the mechanically cleaned surface of the target faces towards to electron beam direction.
• the pressure in the vacuum chamber is then reduced.
• the residual gas pressure of 10 "6 mbar (10 "4 Pa) is reached, the implantation process may start. In preferred embodiments the residual gas pressure is less than 10 "3 Pa.
• step 104 carbon ions are implanted into the target surface of the silicon substrate.
• is raster scanned ion current density j ⁇ 10 ⁇ A scanned
• ion current density j ⁇ 10 ⁇ A scanned over the surface to allow for a homogeneous implantation under high vacuum (Residual gas pressure Po ⁇ 1 x 10 " mbar (1 x 10 " Pa).
• the low energy ion beam is shut off and the target can be removed from the implantation chamber.
• the implantation ion fluence ranges between 10 16 and 5 x 10 17 cm “2 .
• the carbon ions implanted into the surface may be 13 C + ions or 12 C + ions.
• step 105 the silicon substrates are transported from the ion implantation chamber of an electron beam annealing chamber.
• the transport of the targets from the implantation chamber to the electron beam annealing facility chamber can be undertaken at air pressure. A few minutes to a few hours can be used for the transportation procedure.
• the target is loaded into the annealing facility.
• the polished side of the target faces towards to electron beam direction. Once the residual gas pressure of 10 "6 mbar (10 "4 Pa) is reached, the annealing process may start. This process is the same as that described with reference to Figure 1.
• step 106 the silicon substrates are annealed. This process can be broken into three steps, heating, holding the peak temperature, and cooling. The process typically begins at room temperature. In the first step the substrate surface is gently heated with a temperature gradient of, 5 - 10 °C/s, to a peak temperature. In the second step the peak temperature, between 800 and 1200 °C, is held for between 3 and 120 seconds. In the third step the substrate surface is gently cooled with a temperature gradient of 5 - 10 °C/s, to room temperature.
• Processed targets can stay in the vacuum chamber for long time, such as hours to allow processing on many targets under identical conditions.
• the nanoboulders formed by this process are silicon carbide (SiC).
• Figure 11A shows an atomic force microscope image of a section of the mechanically cleaned surface of a silicon substrate after implantation with carbon ions.
• Figure 11B shows the variation in surface roughness of the mechanically cleaned surface of the silicon substrate after ion implantation.
• the variation in the surface is other order of O.lnm. This roughness is similar to that of the mechanically cleaned surface before ion implantation.
• Figures 12A and 12B show nanoboulders produced by the manufacturing process using single sided mechanically cleaned p-type (100) silicon substrate materials (thickness 0.5 mm).
• the substrates were implanted with 13 C + ions with ion energy of 20 keV and fluence of 7.8 x 10 16 cm “2 .
• the ion current density used was 2 ⁇ A/cm 2 .
• the ions were implanted in an 8 mm circular implantation area at a temperature close to room temperature.
• the projected carbon range was calculated as 33 nm and the carbon concentration was calculated as 25 at%.
• Annealing of the substrate was performed in an annealing facility.
• the temperature of the substrate surface was raised at a rate of 5°C/s to a peak temperature of 1000°C.
• the peak temperature was held for 15 seconds before being lowered at a rate of 5°C/s.
• Figure 12C is a section of the silicon substrate of Figures 12A and 12B.
• Figure 12C clearly shows the profile of the nanoboulders along the section taken.
• Figure 12D shows the section used in Figure 12C.
• the height of the tallest nanoboulder in this section is between 100 and 200 nm.
• the height of nanoboulders produced using the method of the invention are typically of the order of
• Nanoboulders of different sizes can be produced by varying the process parameters.
• Atomic force microscope images on the virgin silicon surface show no significant surface structures as expected.
• the method of the invention which involves forming the nanoboulders by carbon implantation and rapid thermal annealing enables arrays of 100 - 300 nm high boulders with width similar to heights to be grown on (100) silicon substrate material which have potential for application as field emitters in flat panel displays.
• the angle of implantation may not be specifically important for the manufacturing process as the implantation energy must be adjusted to the incident angle.
• Implantation of the silicon substrate does not affect the average roughness of the silicon substrate. For example for a silicon substrate that is flat with an average roughness in the order of 0.1 nm, after implantation the surface remains flat on that order of magnitude. After annealing, nanoboulders are produced which are in the order of 100 — 300 nm depending on the implantation fluence and annealing parameters. Much smaller and larger nanoboulders may be produced with varying process parameters.
• Figures 13 and 14 show nanoboulders formed using the method of the invention.
• the substrates used to form the nanoboulders of Figures 13 and 14 were p-type (100) (B- doped, 1 - 10 ⁇ cm) and diced into 10 10 mm 2 samples. No surface cleaning or other treatments were performed on the substrates and the surface thus contains the native oxide (15-20 A thick) formed by exposure to air and residual contaminants, typically carbon-based compounds.
• the silicon samples were implanted with 13 C at 10 keV under high vacuum conditions. The ion current density of the raster scanned ion beam was maintained at 5 ⁇ A cm "2 to avoid heating effects during the implantation process. Isotope 13 C was implanted to aid subsequent analysis through elimination of interferences with the regular 12 C isotope. Annealing was performed using an EB-RTA
• Nanostructures were observed across the entire 13 C implanted region while characteristic nanowhisker growth occurred in the un-implanted regions.
• a typical AFM image of nanostructures formed in (100) Si implanted at 10 keV with 13 C + ions and fluence, F 3.6 x 10 16 cm “2 is shown in Figure 13.
• the ellipsoidal structures are randomly distributed throughout the region and AFM images show no commonality in the direction of nanostructure alignment. Under these implantation conditions the nanostructures exhibit an average diameter (along the major axis) of 330 nm and height of 87 nm.
• the structures cover the surface with a density of 0.54 ⁇ m "2 .
• the structures are identical in appearance to those observed following lower fluence implantation, however the number of structures has reduced considerably to a density of 0.07 ⁇ m "2 .
• both the average diameter and height of the boulders have increased to 630 nm and 230 nm respectively. Again, the surface roughness between boulders is greater than that observed for untreated silicon.
• Neon ion implantation occurs in an implantation chamber before annealing the silicon substrate in an annealing facility using the method described with reference to Figure 1.
• Figure 18 shows the surface of a silicon substrate after implantation with neon ions
• Figure 19 shows the surface of a silicon substrate implanted with neon ions after annealing.
• neon ions are implanted with implantation energy between 5 and 30 keV.
• the preferred implantation current density is less than 20 ⁇ A/cm .
• the residual gas pressure during implantation is preferably less than 10 "3 Pa.
• the implantation fluence is between 10 16 and 12 x 10 17 cm "2 .
• Ne + ions were implanted at 20 keV under normal incidence into (100) silicon substrate.
• the implantations were performed under high vacuum conditions at room temperature.
• highly neon enriched amorphous surfaces containing up to 23 at% neon were produced with ion fluences ranging from 2.1 to 7.2 x 10 ions/cm in less than 15 minutes using an ion current density of 10 ⁇ A/cm 2 that does not result in significant heating of the substrate surface.
• the ion beam was raster scanned over the silicon substrate.
• Figure 17 shows implantation profiles for neon ion implantation into (100) silicon with fluences of 3.6 x 10 16 ions/cm 2 and 7.2 x 10 16 ions/cm 2 . These profiles were measured using resonant nuclear reaction analysis. As can be seen from this figure the neon ion concentration in the substrate is greater for the greater implantation fluence. Figure 17 also shows the neon ion profile after annealing the substrates. As shown there is a substantial decrease in neon within the substrate after annealing showing that the annealing process releases neon from the substrate. The annealing stage was performed in the manner described previously with a peak temperature of 1100°C which was maintained for 15 seconds. The temperature gradient for both the increasing and decreasing temperatures was 5°C/sec.
• Figure 18 is a 4 ⁇ m x 4 ⁇ m top view atomic force microscope image of a silicon substrate after implantation with neon ions with energy of 20 keV and fluence of 3.6 x 10 16 ions/cm 2 . This image shows a slight increase in the roughness of the silicon surface. Typically the average surface roughness for virgin silicon is 0.1 Onm and the roughness shown in Figure 18 is 0.13nm. Figure 18 also shows dust particles of up to 2.5nm. These dust particles are not unusual for non-chemically cleaned substrates.
• Figure 19 is a 12 ⁇ m x 12 ⁇ m top view atomic force microscope image of a silicon substrate after implantation with neon ions and annealing. Annealing took place with a peak temperature of 1000°C held for 15 seconds and with an increasing and decreasing temperature gradient of 5°C/s. As can be seen in Figure 19 cavities have formed in the silicon surface. These cavities have an average diameter of 1.7 ⁇ 0.2 ⁇ m. The average depth of the cavities is 38 ⁇ 2nm. This depth matches the projected range of the implanted neon ions. The average number of cavities is 0.07 ⁇ m " .
• the large cavities formed using this process indicates that neon is released from the substrate as large bubbles during the annealing process.
• the change in cavity number and size with changing fluence suggests that the cavity dimensions can be controlled by changing the fluence of the implanted ions.
• N ions using plasma immersion ion implantation into a silicon substrate before annealing leads to modification of the substrate surface in the form of cavities.
• Nitrogen ion implantation occurs in an implantation chamber before annealing the silicon substrate in an annealing facility.
• Plasma immersion ion implantation nitrogen implantation also implants oxygen into the substrate.
• the substrate surface then acts as an oxygen implanted surface which produces cavities when annealed using the method described with reference to Figure 1.
• Figures 20 to 22 show the surface of a silicon
• N 2 ions were implanted using plasma immersion ion implantation at 10 keV under normal incidence into (100) and (111) silicon substrates.
• the implantations were performed under high vacuum conditions at room temperature in a clean implantation chamber. The gas pressure was lowered to 4.8 ⁇ bar. During implantation the substrate temperature was kept below 100°C. Different nitrogen to silicon ratios were achieved in the surface-near region by implanting nitrogen ions with various fluences.
• Oxygen levels were measures in the substrates before and after annealing. Similar values of oxygen were measured on the substrates indicating that the annealing process does not promote the uptake of oxygen.
• Figure 20 is a 3 ⁇ m x 3 ⁇ m top view atomic force microscope image of a (100) silicon substrate after implantation with nitrogen ions with energy of 10 keV and fluence of 5 x 10 16 N ions/cm 2 .
• the nitrogen areal density was 40 ⁇ 2 x 10 15 cm “2 .
• Oxygen was measured with an areal density of 50 ⁇ 2 x 10 15 cm “2 resulting in an N/O ratio of approximately 1.0.
• the nitrogen areal density decreased to 35 x 10 15 cm “2 and the oxygen areal density decreased to 45 10 15 cm “2 .
• the nitrogen fluence formed an understoichiometric (N/Si ratio ⁇ 1.0) silicon nitride layer. Small cavities less than 50nm in diameter and 3 nm in depth can be seen irregularly distributed over the substrate in Figure 20. These craters are formed from a loss of nitrogen and oxygen from the silicon surface.
• Figure 21 is a 4 ⁇ m x 4 ⁇ m top view atomic force microscope image of a (100) silicon substrate after implantation with nitrogen ions with energy of 10 keV and fluence of 1.6 x 10 17 N ions/cm 2 .
• the nitrogen areal density was 60 x 10 15 cm “2 .
• Oxygen was measured with an areal density of 61 ⁇ 2 x 10 15 cm “2 resulting in an N/O ratio of approximately 1.0.
• the nitrogen fluence formed an overstoichiometric (N/Si ratio > 1.0) silicon nitride layer.
• the surface of the substrate in Figure 21 is highly organised with large cavities with diameters of 1-2 ⁇ m and average depth of 80 nm. One such cavity can be seen in the bottom right of Figure 21. These craters are formed from a loss of nitrogen and oxygen from the silicon surface.
• Figure 22 is a 4 ⁇ m x 4 ⁇ m top view atomic force microscope image of a (111) silicon substrate after implantation with nitrogen ions with energy of 10 keV and fluence of 1.0 10 17 N ions/cm 2 .
• the nitrogen areal density was 55 x 10 15 cm “2 .
• Oxygen was measured with an areal density of 53 x 10 cm " resulting in an N/O ratio of approximately 1.0.
• the nitrogen areal density decreased to 50 x 10 15 cm “2 and the oxygen areal density decreased to 31 x 10 15 cm “2 .

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• Physical Vapour Deposition (AREA)

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