EP1519269A3 - Verfahren und System zum Echtzeit-Scheduling - Google Patents
Verfahren und System zum Echtzeit-Scheduling Download PDFInfo
- Publication number
- EP1519269A3 EP1519269A3 EP04021572A EP04021572A EP1519269A3 EP 1519269 A3 EP1519269 A3 EP 1519269A3 EP 04021572 A EP04021572 A EP 04021572A EP 04021572 A EP04021572 A EP 04021572A EP 1519269 A3 EP1519269 A3 EP 1519269A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- tasks
- processors
- bus
- perform
- time interval
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Power Sources (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Bus Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003335498A JP4057989B2 (ja) | 2003-09-26 | 2003-09-26 | スケジューリング方法および情報処理システム |
| JP2003335498 | 2003-09-26 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP1519269A2 EP1519269A2 (de) | 2005-03-30 |
| EP1519269A3 true EP1519269A3 (de) | 2006-08-23 |
Family
ID=34191526
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP04021572A Withdrawn EP1519269A3 (de) | 2003-09-26 | 2004-09-10 | Verfahren und System zum Echtzeit-Scheduling |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7685599B2 (de) |
| EP (1) | EP1519269A3 (de) |
| JP (1) | JP4057989B2 (de) |
| KR (1) | KR100628492B1 (de) |
| CN (1) | CN1318968C (de) |
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| US9778959B2 (en) | 2004-03-13 | 2017-10-03 | Iii Holdings 12, Llc | System and method of performing a pre-reservation analysis to yield an improved fit of workload with the compute environment |
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Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| EP0624842A2 (de) * | 1993-04-12 | 1994-11-17 | Loral/Rolm Mil-Spec Corporation | Verfahren zum automatisierten Auslegen eines Softwareprogramms auf eine Multiprozessorarchitektur |
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2003
- 2003-09-26 JP JP2003335498A patent/JP4057989B2/ja not_active Expired - Fee Related
-
2004
- 2004-09-08 US US10/935,188 patent/US7685599B2/en not_active Expired - Fee Related
- 2004-09-10 EP EP04021572A patent/EP1519269A3/de not_active Withdrawn
- 2004-09-24 CN CNB2004100117191A patent/CN1318968C/zh not_active Expired - Fee Related
- 2004-09-24 KR KR1020040077323A patent/KR100628492B1/ko not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| EP0624842A2 (de) * | 1993-04-12 | 1994-11-17 | Loral/Rolm Mil-Spec Corporation | Verfahren zum automatisierten Auslegen eines Softwareprogramms auf eine Multiprozessorarchitektur |
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| SHEPARD T ET AL: "A PRE-RUN-TIME SCHEDULING ALGORITHM FOR HARD REAL-TIME SYSTEMS", IEEE TRANSACTIONS ON SOFTWARE ENGINEERING, IEEE SERVICE CENTER, LOS ALAMITOS, CA, US, vol. 17, no. 7, 1 July 1991 (1991-07-01), pages 669 - 677, XP000261408, ISSN: 0098-5589 * |
Also Published As
| Publication number | Publication date |
|---|---|
| KR100628492B1 (ko) | 2006-09-26 |
| CN1601474A (zh) | 2005-03-30 |
| EP1519269A2 (de) | 2005-03-30 |
| CN1318968C (zh) | 2007-05-30 |
| JP4057989B2 (ja) | 2008-03-05 |
| US7685599B2 (en) | 2010-03-23 |
| KR20050030871A (ko) | 2005-03-31 |
| JP2005100264A (ja) | 2005-04-14 |
| US20050108715A1 (en) | 2005-05-19 |
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