EP1502356B1 - Methode zur dekodierung von reed-solomon kodes mittels feinentscheidung - Google Patents

Methode zur dekodierung von reed-solomon kodes mittels feinentscheidung Download PDF

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EP1502356B1
EP1502356B1 EP03732314A EP03732314A EP1502356B1 EP 1502356 B1 EP1502356 B1 EP 1502356B1 EP 03732314 A EP03732314 A EP 03732314A EP 03732314 A EP03732314 A EP 03732314A EP 1502356 B1 EP1502356 B1 EP 1502356B1
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symbol
polynomial
erasure
computing
polynomials
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EP1502356A2 (de
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Stefan Müller
Alexander Kravtchenko
Marten Kabutz
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THOMSON LICENSING
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/45—Soft decoding, i.e. using symbol reliability information
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/158—Finite field arithmetic processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515—Reed-Solomon codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors

Definitions

  • the present invention pertains generally to error detection/correction and more particularly to systems and methods used in Reed-Solomon decoders.
  • Reed-Solomon error correcting code A commonly used error correcting technique is the Reed-Solomon error correcting code.
  • Reed-Solomon codes For an overview and for applications of Reed-Solomon codes reference is made to "Reed-Solomon Codes and Their Applications", Stephen B. Wicker, Vijay K. Bhargava, IEEE Press, 1994 and “Digital Communications, Fundamentals and Applications”, Second Edition, Bernard Sklar, Prentice Hall PTR, 2001.
  • US patent no. 5,517,509 shows a Reed-Solomon decoder in the form of a Euclid's algorithm operation circuit in which division polynomials are repeatedly divided by residues resulting from the division process of dividend polynomials and division polynomials until the degree of residues of the division process satisfies a prescribed condition.
  • the Euclid's algorithm operation circuit comprises register groups for storing dividend polynomials and division polynomials, respectively, a feedback loop for storing residues resulting from the division process of the dividend polynomials by the division polynomials, a shifter for shifting contents of registers, and an exchanger for exchanging coefficients of the dividend polynomials with coefficients of the division polynomials.
  • the decoder comprises a syndrome operator for calculating syndromes from received code-words, an erasure locator generator for generating erasure locator data from erasure locator flags synchronous with received code-words, a modified syndrome generator for generating modified syndromes, an erasure locator polynomial generator for generating erasure locator polynomials from the erasure locator data, a Euclid's algorithm operation circuit for obtaining error locator polynomials and error value polynomials, a Chien searcher for obtaining error locations and error values and a correction processor for correcting errors of the received code-word.
  • the modified syndrome generator and the erasure locator polynomial generator are used jointly with the Euclid's algorithm operation circuit.
  • the computation of the modified syndrome polynomial is performed by computation of the product of the syndrome and erasure polynomials. This computation requires additional cycles and computation time to obtain the modified syndrome polynomial.
  • the present invention enables to minimize the computation time for soft-decision decoding of Reed-Solomon codes by parallel on-the-fly computation of the syndrome and erasure polynomials as well as the modified syndrome polynomial.
  • the invention enables to perform the calculation of the modified syndrome polynomial before the computation of the syndrome and erasure polynomials has been completed.
  • the present invention is particularly advantageous in that it enables to compute the modified syndrome polynomials on-the-fly with the incoming symbols. Therefore a separate computation step usually referred to as polynomial expansion can be omitted.
  • the general idea of the invention is to reduce the number of cycles needed to compute the modified syndrome.
  • a multiplication of the erasure and syndrome polynomial has to be done.
  • the general idea of the invention is to compute the modified syndrome on-the-fly. Therefore the present method does not need any additional cycles for computation of the modified syndrome, which saves computation power and time.
  • a receiver can correct as long as 2 e + f ⁇ d min .
  • e is the number of errors
  • f is the number of erasures
  • d min is the Hamming distance.
  • Equations (2) and (3) can be computed on-the-fly with the incoming data symbols ⁇ N -1 ,..., ⁇ 1 , ⁇ 0 .
  • Equation (2) a more detailed explanation of an implementation of above step 1, i.e. Equation (2), is given.
  • FIG. 1 A hardware implementation of an on-the-fly syndrome computation is shown in Figure 1.
  • register 1 is initialised with the power of the position of the first symbol.
  • the registers 2 are initialised with zero.
  • the syndromes are updated according to Equation (12) and the power of the root term in register 1 is decreased by one.
  • Equation (3) i.e. Equation (3)
  • Equation (15) A hardware implementation of an on-the-fly erasure polynomial computation, achieved by Equation (15) is depicted in Figure 2. If the incoming symbol is an erasure, the depicted switches are toggled and the circuit realizes the computation according Equation (15).
  • the switches remain in their depicted position if the symbol is not an erasure.
  • the switches are realized as combinatorial logic; hence they do not cause any extra clock delay. They are directly connected to the erasure signal provided with the symbol information.
  • At the beginning of a new code sequence register 1 is initialised with the power of the position of the first symbol, for example with ⁇ 181 for the inner code of DVD.
  • the registers 2 are initialised with zero. Each time, when a new symbol arrives, register 1 and registers 2 are clocked, the syndromes are then updated according to Equation (15) and the power of the root term in register 1 is decreased by one.
  • Algorithm A For an on-the-fly computation of the modified syndromes.
  • Algorithm A needs two or one consecutive computations, respectively.
  • Algorithm B for an on-the-fly computation of the modified syndromes.
  • Algorithm B consists of two alternative branches, one of which is selected and performed depending on whether the incoming symbol is or is not signalled as an erasure, and where each of the branches needs just one system clock for performing all the computations necessary for the case in question.
  • Equation (19) it is possible to compute the modified syndrome directly without the computation of the syndromes.
  • the flowchart in Figure 3 shows the first embodiment of an on-the-fly computation.
  • the flowchart comprises Equation (20) to calculate two auxiliary terms T * ( x ) , ⁇ * (x) and Equation (21) to calculate an iteration result T j ( x ), ⁇ j ( x ) from the auxiliary terms in case the incoming symbol ⁇ n is an erasure.
  • the modified syndromes are updated according to Equation (20).
  • the resulting modified syndromes are correct up to the latest received symbol.
  • the system clock rate has to be at least twice the symbol clock rate.
  • the algorithm ends after the computation for the last symbol, then the correct modified syndrome is obtained.
  • Equation (20) In case of an erasure two system clocks are needed, one for the updating according to Equation (20) and one for multiplying the polynomial with the root as described by Equation (21). In case of an erasure, the order of computing Equation (20) and (21) can be interchanged. If so, it must be taken care, that if the first symbol of the stream is an erasure, the register T 0 must be preloaded with one, otherwise the first part of Equation (21) would yield zero.
  • Equation (20) directly results from the cyclic convolution described in Equation (19). Therefore we describe in the following the algorithm of getting an erasure symbol.
  • the switches are realized as combinatorial logic; hence they do not cause any extra clock delay.
  • register 1 in Figure 4 is initialised with the power of the position of the first symbol, for example with ⁇ 181 for the example of the inner code of DVD.
  • the registers 2 and 3 are initialised with zeros.
  • register 1 is clocked, decreasing the root power by one.
  • registers 2 are clocked with the next falling edge of the symbol clock, which updates the syndromes according to Equation (20).
  • ⁇ x 1 - ⁇ 180
  • the flowchart in Figure 6 shows the second embodiment of an on-the-fly computation.
  • the flowchart comprises Equation (46) used in case the incoming symbol ⁇ n is an erasure, and Equation (47) used otherwise.
  • the modified syndromes are updated.
  • the resulting modified syndromes are correct up to the latest received symbol.
  • the system clock rate can be the same as the symbol clock rate, which yields to a very fast computation.
  • the algorithm ends after the last symbol, then the correct modified syndrome is obtained.
  • FIG. 7 A second embodiment of an on-the-fly computation of the modified syndrome is depicted in Figure 7. If the switches are in their depicted position, the architecture realizes the computation according to Equation (47). If the switches are toggled, the architecture realizes the computation according to Equation (46).
  • the switches are realized as combinatorial logic; hence they do not cause any extra clock delay. Comparing the depicted architecture with the one in Figure 4, an additional multiplier and adder per cell or register is necessary. Increasing the hardware structure and therefore increasing the latency time can achieve reduction of computation time.
  • register 1 in Figure 7 is initialised with the power of the position of the first symbol, for example with ⁇ 181 for the example of the inner code of DVD.
  • the registers 2 and 3 are initialised with zeros.
  • the switches are directly connected to the erasure signal. All registers 1, 2 and 3 are clocked with the rising edge of the symbol clock, which updates the syndromes according to Equation (46) or (47), depending on the erasure signal.
  • register 1 decreases the power of the root term by one, in preparation for the next symbol.
  • registers 2 hold the modified syndromes of the whole code sequence and registers 3 hold the erasure polynomial.
  • the erasure signal feeds the switches of the circuit in Figure 7. If the erasure signal is false the switches remain in their depicted position, if the erasure signal is true the switches are toggled.
  • the circuit in Figure 7 is clocked and Equation (46) or (47) is computed.
  • Equation (46) or (47) is computed.
  • the correct modified syndrome of the whole codeword is obtained.
  • the intermediate results up to after the fifth incoming symbol shall now be explained in detail.

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  • Mathematical Physics (AREA)
  • Probability & Statistics with Applications (AREA)
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Claims (10)

  1. Verfahren zur Soft-Entscheidungs-Decodierung von Reed-Solomon-Codewörtern, die aus N Symbolen bestehen, wobei das Generatorpolynom des Reed-Solomon-Codes M Wurzeln aufweist,
    gekennzeichnet durch
    paralleles Berechnen eines Syndrompolynoms, eines Löschungspolynoms Γ(x) und eines modifizierten Syndrompolynoms T(x) durch iteratives Aktualisieren von Koeffizienten der Polynome bei jedem Symboltakt, an dem ein neues Datensymbol ankommt, dergestalt, daß die Polynome für ein Codewort direkt erhalten werden, nachdem die Koeffizientenaktualisierung für das letzte Symbol des Codeworts durchgeführt wurde.
  2. Verfahren nach Anspruch 1 mit den folgenden Schritten:
    - Berechnen des Syndrompolynoms S(x) als S x = Σ i = 0 N - 1 v i + Σ i = 0 N - 1 v i α i x + Σ i = 0 N - 1 v i α 2 i x 2 + … + Σ i = 0 N - 1 v i α M - 1 i x M - 1 ,
    Figure imgb0086
    wobei die νi die ankommenden Datensymbole sind;
    - Berechnen des Löschungspolynoms Γ(x) als Γ x = Π i = 0 p - 1 1 - α j i x ,
    Figure imgb0087
    wobei αji die Potenz der Positionen j 0,j 1,... , j p-1 der Löschungen und p die Anzahl der Löschungen in dem Codewort ist;
    - Konstruieren des modifizierten Syndrompolynoms auf eine Weise, die das korrekte modifizierte Syndrom T x = Γ x S x mod x M
    Figure imgb0088
    erhält, nach der Berechnung für das letzte Symbol,
    - Bestimmen der Polynome Λ (x), Ω (x) durch Auslösen der Schlüsselgleichung Λ x T x = Ω x mod x M
    Figure imgb0089
    mit dem Algorithmus von Berlekamp-Massey oder Euklid,
    - Berechnen des Forney-Polynoms Ψ x = Λ x Γ x
    Figure imgb0090
    - Berechnen des Betrags der Fehler und Löschungen unter Verwendung der Forney-Gleichung.
  3. Verfahren nach Anspruch 2, wobei die Berechnung des Löschungspolynoms und des modifizierten Syndrompolynoms im Verlauf mit den ankommenden Datensymbolen v N - 1 , … , v 1 , v 0 .
    Figure imgb0091
    durchgeführt wird.
  4. Verfahren nach einem der vorherigen Ansprüche 1, 2 oder 3, wobei das Syndrompolynom in der folgenden Form berechnet wird: S x = Σ i = 0 N - 1 v i + Σ i = 0 N - 1 v i α i x + Σ i = 0 N - 1 v i α 2 i x 2 + … + Σ i = 0 N - 1 v i α M - 1 i x M - 1   = S 0 + S 1 x + S 2 x 2 + … + S M - 1 x M - 1 .
    Figure imgb0092
    indem die Koeffizienten S i , i=0,1,..., M-1 iterativ aktualisiert werden, wobei bei jedem Symboltakt j, wenn ein neues Symbol ν n ankommt, die Potenz αn der Position n berechnet wird und die Koeffizienten auf die folgende Weise aktualisiert werden: S i , j = S i , j - 1 + v n α in ,   i = 0 , 1 , … , M - 1
    Figure imgb0093
    mit S i,-1 = 0.
  5. Verfahren nach einem der vorhergehenden Ansprüche 1 bis 4, wobei das Löschungspolynom im Verlauf durch iteratives Aktualisieren des Polynoms Γ x = Π i = 0 p - 1 1 - α ji i x   = Γ 0 + Γ 1 x + Γ 2 x 2 + … + Γ p x p
    Figure imgb0094
    berechnet wird, wobei das Aktualisieren an jedem Symboltakt j i durchgeführt wird, wenn ein neues ankommendes Symbol als eine Löschung gekennzeichnet wird, die Potenz α ji der Löschungsposition j i berechnet wird und das Polynom auf die folgende Weise aktualisiert wird: Γ j x = Γ j - 1 x ⋅ 1 - α j i x = Γ 0 , j - 1 + Γ 1 , j - 1 x + … + Γ p , j - 1 x p 1 - α j i x .
    Figure imgb0095
  6. Verfahren nach einem der vorhergehenden Ansprüche 1 bis 5, wobei das Berechnen des modifizierten Syndrompolynoms T(x) direkt durch die folgenden Schritte durchgeführt wird:
    - Vorladen von Polynomen Γ-1(x)=1; T -1 (x)=0;
    - Erhalten von einem Symbol ν n an jedem Symboltakt;
    - Berechnen von folgendem mit dem ersten Systemtakt innerhalb des Symboltakts: T * x = T j - 1 x + v n 1 + α n + Γ 1 , j - 1 x + α 2 n + α n Γ 1 , j - 1 + Γ 2 , j - 1 x 2 + … + Σ i = 0 M - 1 α ni Γ M - 1 - i , j - 1 x M - 1
    Figure imgb0096
     Γ * x = Γ j - 1 x
    Figure imgb0097
    - Bestimmen, ob νn eine Löschung ist;
    - wenn ja: Berechnen von folgendem mit einem zweiten Systemtakt innerhalb des Symboltakts: T j x = T * x 1 - α n x Γ j x = Γ j - 1 x 1 - α n x ;
    Figure imgb0098
    - wenn nein: Verwenden von T j x = T * x
    Figure imgb0099
     Γ j x = Γ * x
    Figure imgb0100
  7. Verfahren nach einem der vorherigen Ansprüche 1 bis 5, wobei die Berechnung des modifizierten Syndrompolynoms T(x), falls ein ankommendes Symbol als eine Löschung gekennzeichnet ist, einen Schritt des Aktualisierens im Verlauf in der folgenden Form umfaßt: T n ( x ) = T n - 1 x 1 - α n x + v n Γ n - 1 x ,  where  Γ - 1 x = 1.
    Figure imgb0101
  8. Verfahren nach einem der vorhergehenden Ansprüche 1 bis 5 oder 7, wobei das modifizierte Syndrompolynom T(x) im Verlauf durch die folgenden Schritte berechnet wird:
    - Vorladen von Polynomen Γ-1 (x)=1; T -1 (x)=0;
    - Erhalten eines Symbols ν n an jedem Symboltakt;
    - Bestimmen, ob νn eine Löschung ist,
    - wenn ja: Berechnen von T j ( x ) = T j - 1 x 1 - α n x + v n Γ j - 1 x
    Figure imgb0102
     Γ j ( x ) = Γ j - 1 x 1 - α n x ;
    Figure imgb0103
    - wenn nein: Berechnen von T j x = T j - 1 x + v n 1 + α n + Γ 1 , j - 1 x + α 2 n + α n Γ 1 , j - 1 + Γ 2 , j - 1 x 2 + … + Σ i = 0 M - 1 α ni Γ M - 1 - i , j - 1 x M - 1
    Figure imgb0104
     Γ j x = Γ j - 1 x .
    Figure imgb0105
  9. Computerprogrammprodukt wie etwa ein digitales Speichermedium mit Programmmitteln zur Soft-Entscheidungs-Decodierung von Reed-Solomon-Codewörtern, wobei die Programmmittel dafür ausgelegt sind, parallel ein Syndrompolynom, ein Löschungspolynom und ein modifiziertes Syndrompolynom zu berechnen, indem Koeffizienten der Polynome iterativ bei jedem Symboltakt aktualisiert werden, wenn ein neues Datensymbol ankommt, dergestalt, daß die Polynome für ein Codewort direkt erhalten werden, nachdem die Koeffizientenaktualisierung für das letzte Symbol des Codeworts durchgeführt wurde.
  10. Reed-Solomon-Codewort-Decoder mit Mitteln zum parallelen Berechnen eines Syndrompolynoms, eines Löschungspolynoms und eines modifizierten Syndrompolynoms durch iteratives Aktualisieren von Koeffizienten der Polynome bei jedem Symboltakt, wenn ein neues Datensymbol ankommt, dergestalt, daß die Polynome für ein Codewort direkt erhalten werden, nachdem die Koeffizientenaktualisierung für das letzte Symbol des Codeworts durchgeführt wurde.
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FR2776115B1 (fr) 1998-03-13 2000-07-21 Thomson Multimedia Sa Dispositif de correction d'erreurs et lecteur de disque optique comportant un tel dispositif
US6449746B1 (en) * 1998-08-17 2002-09-10 T. K. Truong Decoding method for correcting both erasures and errors of reed-solomon codes
US6347389B1 (en) * 1999-03-23 2002-02-12 Storage Technology Corporation Pipelined high speed reed-solomon error/erasure decoder
KR100611956B1 (ko) * 1999-08-19 2006-08-11 삼성전자주식회사 에러 정정 방법과 장치
EP1370003A1 (de) * 2002-06-07 2003-12-10 Deutsche Thomson-Brandt Gmbh Reed-Solomon Dekoder

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WO2003096546A2 (en) 2003-11-20
JP4134029B2 (ja) 2008-08-13
US20050166126A1 (en) 2005-07-28
DE60309857T2 (de) 2007-04-19
WO2003096546A3 (en) 2004-02-05
KR100970223B1 (ko) 2010-07-16
AU2003239834A8 (en) 2003-11-11
KR20040104702A (ko) 2004-12-10
AU2003239834A1 (en) 2003-11-11
DE60309857D1 (de) 2007-01-04
US7353449B2 (en) 2008-04-01
CN1653699A (zh) 2005-08-10
CN1653699B (zh) 2011-06-15
EP1502356A2 (de) 2005-02-02
JP2005525040A (ja) 2005-08-18

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