EP1325518A1 - Electronic unit and process for the production thereof - Google Patents

Electronic unit and process for the production thereof

Info

Publication number
EP1325518A1
EP1325518A1 EP01974502A EP01974502A EP1325518A1 EP 1325518 A1 EP1325518 A1 EP 1325518A1 EP 01974502 A EP01974502 A EP 01974502A EP 01974502 A EP01974502 A EP 01974502A EP 1325518 A1 EP1325518 A1 EP 1325518A1
Authority
EP
European Patent Office
Prior art keywords
carrier
process according
electrical components
bearer
housing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP01974502A
Other languages
German (de)
French (fr)
Inventor
Norbert Ammann
Joerg Baumbach
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TE Connectivity Germany GmbH
Original Assignee
Tyco Electronics AMP GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tyco Electronics AMP GmbH filed Critical Tyco Electronics AMP GmbH
Publication of EP1325518A1 publication Critical patent/EP1325518A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/183—Connection portion, e.g. seal
    • H01L2924/18301—Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor

Definitions

  • the present invention relates to an electronic unit having one or more electrical components, a carrier bearing the electrical components and a housing surrounding the electrical components along with parts of the carrier, and to a process for the production of such an electronic unit.
  • Such units take the form, for example, of Plastic Ball Grid Arrays (PBGAs) or Chip Scale Packages (CSPs); the electrical components contained in such units are one or more semiconductor chips and/or other (preferably housing-less) electrical, electronic, electromechanical or electro-optical elements.
  • PBGAs Plastic Ball Grid Arrays
  • CSPs Chip Scale Packages
  • the carrier bearing these electrical components is in the example given, a laminar element, generally known as a substrate or "interposer”, on which the electrical components which it has to bear can be mounted. On the opposite side from the electrical components, it is provided with electrical terminals for producing a connection with the system containing the unit.
  • the housing is generally made from a moulding composition consisting of epoxy resin for example, which is poured over (dispense moulding) or sprayed on (transfer moulding) parts of the carrier and the components mounted thereon.
  • a feature of units produced in this way is that the moulding composition forming the housing covers only the electrical components and the side of the carrier bearing them.
  • the side faces of the carrier part which extends as far as the lateral edges of the unit, are not covered with moulding composition and form part of the side faces of the unit.
  • This, or more precisely the exposed transition between the carrier and the moulding composition applied thereto constitutes a weak point.
  • the carrier and moulding composition may start to become detached from one another at this point possibly even during singularisation of the units, which may sooner or later lead to detachment of the carrier (delamination). Moisture may penetrate into the unit at these points, which may lead to cracking and/or bursting open of the unit (popcorn effect), in particular on sudden heating.
  • An object of the present invention is therefore to develop further the electronic unit according to the preamble of claim 1 and the process for the production thereof in such a way that the risk of the occurrence of the above-mentioned effects is removed or reduced to a minimum.
  • a unit as defined in the preamble which according to the invention is characterised in that the housing leaves uncovered only the opposite side of the carrier from the side bearing the electrical components, and by a process which is characterised in that, during production of the unit, the carrier is arranged on a carrier bearer which bears the substrate during production of the unit and is subsequently removed again.
  • the electronic unit of the invention does not have any free side faces between the carrier and the composition constituting the housing. Because of this, there is no risk, or only a negligibly small risk, that the unit is seriously damaged or destroyed as a result of the carrier detaching from the housing and/or moisture penetrating between the carrier and the composition constituting the housing.
  • the process of the invention constitutes a very simple yet effective way of producing such electronic units.
  • the carrier bearer makes it possible to use many small carriers, each of which is arranged for bearing the electrical components of only a single unit, instead of a large carrier which is arranged for carrying the electrical components of a plurality of units.
  • the application of such small carriers was not possible until now, or at least not at a reasonable cost.
  • the units can be singularised by only removing the carrier bearer, that is, without sawing, cutting etc. resulting in an arrangement comprising a plurality of units (when the moulding composition is poured over or sprayed on the carrier and the electrical components mounted thereon individually), and - the problems arising from the thermal expansion of the carriers can easily be controlled or can be neglected.
  • Figures 1A to II show a comparison of the above-described conventional process and a first exemplary embodiment of the process described below for producing an electronic unit having one or more electrical components, a carrier bearing the electrical components and a housing surrounding the electrical components and the carrier at least partially;
  • Figures 2A to 2H show a comparison of the above-described conventional process and a second exemplary embodiment of the process described below for producing an electronic package having one or more electrical components, a carrier bearing the electrical components and a housing surrounding the electrical components and the carrier at least partially;
  • Figure 3 shows an electronic package having a specially constructed substrate.
  • the electronic unit contains two electrical components, namely a semiconductor chip and a capacitor. It should be pointed out that this does not constitute any restriction.
  • the electronic unit (electronic package) may also comprise any desired number more or less than two of electrical components and the electrical components may also comprise any other desired electrical, electronic, electromechanical or electro-optical elements.
  • the carrier bearing the electrical components is a laminar element, hereinafter referred to as substrate, having electrically conductive structures, which comprise first contact points, second contact points and conductors (conductive strips) connecting these together, wherein
  • the first contact points are located on the side of the substrate facing the electrical components and serve for connection with the input and/or output terminals of the electrical components arranged on the substrate;
  • the second contact points are located on the side of the substrate opposite from the electrical components and serve for connection with the system containing the unit.
  • a moulding composition forming the unit housing is poured or sprayed on the electrical components and parts of the carrier.
  • the unit and the process of producing such a unit as described here correspond with the unit and the production process described with reference to the Prior Art.
  • the housing leaves uncovered only that side of the carrier which is opposite to the side of the carrier bearing the electrical components.
  • the above-described process of producing such a unit is distinguished in that, during production of the electronic unit, the substrate is arranged on a substrate bearer (carrier bearer) which bears the substrate during production of the electronic units and is subsequently removed again.
  • FIG. 1 A A first exemplary embodiment of such a process is described below with reference to Figures IB, ID, IF, 1G and II.
  • the individual process steps are compared with the process steps performed in a conventional process.
  • the process steps performed in the conventional process are illustrated in Figures 1 A, IC, IE and IH.
  • the starting point of the conventional process is a substrate 12, which is large enough for the electrical components for a plurality of units to be arranged thereon ( Figure 1A).
  • the starting point of the new process is a substrate carrier 1, on which there is arranged a plurality of substrates 2 (Figure IB).
  • the substrate carrier 1 consists, in the example shown, of ceramics, metal or glass and is 100 ⁇ m to 1 mm thick, but may also consist of other materials or have a different thickness.
  • the number of substrates 2 corresponds with the number of units which are to be produced at the same time.
  • the length and width of the substrates 2 are smaller than the lengths and widths of the units produced using the substrates 2.
  • the substrates 2 may be finished individual substrates, which are attached to the substrate carrier 1 for example by adhesion. However, they may also comprise appropriate coating of the substrate carrier 1, applied to the substrate carrier 1 for example by printing or laminating and structured as desired by photo and/or laser technology.
  • the substrates 2 are, in the example shown, multilayer substrates.
  • the layers comprise, for example, electrically conductive layers forming structures and made of copper or copper/titanium and layers of dielectric material, made from polyimide for example, arranged therebetween, the electrically conductive layers exhibiting a thickness of between 0J ⁇ m and 20 ⁇ m and being connected together by plated-through holes and the layers consisting of dielectric material having a thickness of between 2 ⁇ m and 10 ⁇ m.
  • a semiconductor chip 3 or 13 and a capacitor 4 or 14 are positioned on the substrates 2 or 12 respectively and connected electrically and mechanically therewith by adhesion, wire- bonding, soldering etc (see Figures IC and ID).
  • a moulding composition 5 or 15 forming the housing of the unit is then poured or sprayed over the arrangements (see Figures IE and IF).
  • the moulding composition is an epoxy resin.
  • the substrate carrier 1 is then removed (see Figure 1G). Since no substrate carrier is used in the conventional process, there is no corresponding process step. Removal of the substrate carrier 1 may be performed, for example, by etching away thereof or by heating so as to sever the connection between the substrate and the substrate carrier, or by irradiation (e.g. with UN radiation) so as to destroy the connection between the substrate and the substrate carrier.
  • each of the substrates extends up to the lateral edges of the units, this is not the case with the units produced by the novel process ( Figure II) wherein the side edges of the substrate are also surrounded by the moulding composition.
  • a moulding composition 5 or 15 respectively is again poured or sprayed over the arrangement.
  • the moulding composition is only applied on those areas which actually have to be encapsulated to produce the unit.
  • those areas 6 or 16 which after singularisation of the unit are not constituents of the unit the moulding composition 5 or 15 is not applied (see Figures 2E and 2F).
  • Such partial encapsulation may be achieved with the assistance of an appropriate template or an appropriate spraying tool (injection mould).
  • the substrate carrier 1 is then removed (see Figure 2H).
  • the units are singularised at the same time as the substrate carrier 1 is removed. Singularisation by sawing, as in Figure II, may be dispensed with.
  • the unit are still held together by the substrate 12 and have to be singularised by sawing (see Figure 1G).
  • the electronic units produced by the first novel process described with reference to Figure 1 and the electronic units produced by the second novel process described with reference to Figure 2 are substantially identical.
  • a unit produced by the second novel process thus exhibits the same advantages as a unit produced by the first novel process. It has proven advantageous for the side faces of the substrate - contrary to the presentation of Figs. 1 and 2 - to be profiled or structured in such a way that the substrate and the moulding composition forming the housing are anchored together or interlocked in such a way that, even when the substrate and the moulding composition no longer adhere to one another or no longer do so properly, the substrate cannot fall or be pulled out of the moulding composition. This may be achieved, for example, with:
  • the side faces of the substrate may comprise projections and/or recesses, and/or
  • the side faces of the substrate exhibit a stepped, zigzag or curved profile.
  • FIG. 3 A possible embodiment of such a electronic package is illustrated in Figure 3.
  • the specially shaped and/or profiled side faces of the substrate are designated with the reference letter S.

Abstract

An electronic unit has one or more electrical components (3, 4), a carrier (2) bearing the electrical components and a housing (5) surrounding the electrical components and parts of the carrier. The unit is distinguished in that the housing leaves uncovered only the opposite side of the carrier (2) to the side bearing the electrical components. A process for the production of such a unit is distinguished in that, the carrier (2) is arranged on a carrier bearer (1) which bears the carrier during production of the electronic unit and is subsequently removed again.

Description

ELECTRONIC UNIT AND PROCESS FOR THE PRODUCTION THEREOF
The present invention relates to an electronic unit having one or more electrical components, a carrier bearing the electrical components and a housing surrounding the electrical components along with parts of the carrier, and to a process for the production of such an electronic unit.
Such units take the form, for example, of Plastic Ball Grid Arrays (PBGAs) or Chip Scale Packages (CSPs); the electrical components contained in such units are one or more semiconductor chips and/or other (preferably housing-less) electrical, electronic, electromechanical or electro-optical elements.
The carrier bearing these electrical components is in the example given, a laminar element, generally known as a substrate or "interposer", on which the electrical components which it has to bear can be mounted. On the opposite side from the electrical components, it is provided with electrical terminals for producing a connection with the system containing the unit.
The housing is generally made from a moulding composition consisting of epoxy resin for example, which is poured over (dispense moulding) or sprayed on (transfer moulding) parts of the carrier and the components mounted thereon.
Units of this type have been produced by
- mounting electrical components for a plurality of electrical units on a carrier of appropriate size for example by adhesion, soldering, wire bonding etc., - once assembled, pouring or spraying a moulding composition forming the housing over the carrier (casting or injection moulding), and
- cutting out (singularising) the individual units from this arrangement by sawing, water jet cutting or punching.
A feature of units produced in this way is that the moulding composition forming the housing covers only the electrical components and the side of the carrier bearing them. The side faces of the carrier part, which extends as far as the lateral edges of the unit, are not covered with moulding composition and form part of the side faces of the unit. This, or more precisely the exposed transition between the carrier and the moulding composition applied thereto constitutes a weak point. The carrier and moulding composition may start to become detached from one another at this point possibly even during singularisation of the units, which may sooner or later lead to detachment of the carrier (delamination). Moisture may penetrate into the unit at these points, which may lead to cracking and/or bursting open of the unit (popcorn effect), in particular on sudden heating. These are serious drawbacks for which until now no solution had been found.
An object of the present invention is therefore to develop further the electronic unit according to the preamble of claim 1 and the process for the production thereof in such a way that the risk of the occurrence of the above-mentioned effects is removed or reduced to a minimum.
This and other objects are achieved by a unit as defined in the preamble which according to the invention is characterised in that the housing leaves uncovered only the opposite side of the carrier from the side bearing the electrical components, and by a process which is characterised in that, during production of the unit, the carrier is arranged on a carrier bearer which bears the substrate during production of the unit and is subsequently removed again.
The electronic unit of the invention does not have any free side faces between the carrier and the composition constituting the housing. Because of this, there is no risk, or only a negligibly small risk, that the unit is seriously damaged or destroyed as a result of the carrier detaching from the housing and/or moisture penetrating between the carrier and the composition constituting the housing.
The process of the invention constitutes a very simple yet effective way of producing such electronic units. The carrier bearer makes it possible to use many small carriers, each of which is arranged for bearing the electrical components of only a single unit, instead of a large carrier which is arranged for carrying the electrical components of a plurality of units. The application of such small carriers was not possible until now, or at least not at a reasonable cost.
When these small carriers are arranged on the carrier bearer at a sufficient spacing, the side faces of the carriers are also covered by the composition constituting the housing when it is poured over or sprayed on the carriers after mounting the electrical components of the units on the carriers. Then the units resulting from this arrangement do not have any exposed side surfaces between the carrier and the composition constituting the housing. The resulting advantages have been mentioned above.
The application of many small carriers instead of a single large carrier, made possible by the carrier bearer, also makes it possible that:
- the units can be singularised by only removing the carrier bearer, that is, without sawing, cutting etc. resulting in an arrangement comprising a plurality of units (when the moulding composition is poured over or sprayed on the carrier and the electrical components mounted thereon individually), and - the problems arising from the thermal expansion of the carriers can easily be controlled or can be neglected.
Advantageous further developments of the invention are illustrated in the dependent claims, the following description and the Figures.
The invention is explained in more detail below with reference to exemplary embodiments illustrated in the accompanying drawings, in which:
Figures 1A to II show a comparison of the above-described conventional process and a first exemplary embodiment of the process described below for producing an electronic unit having one or more electrical components, a carrier bearing the electrical components and a housing surrounding the electrical components and the carrier at least partially; Figures 2A to 2H show a comparison of the above-described conventional process and a second exemplary embodiment of the process described below for producing an electronic package having one or more electrical components, a carrier bearing the electrical components and a housing surrounding the electrical components and the carrier at least partially; and
Figure 3 shows an electronic package having a specially constructed substrate.
The electronic unit, the structure and manufacture of which is merely by way of non- limiting example described below contains two electrical components, namely a semiconductor chip and a capacitor. It should be pointed out that this does not constitute any restriction. The electronic unit (electronic package) may also comprise any desired number more or less than two of electrical components and the electrical components may also comprise any other desired electrical, electronic, electromechanical or electro-optical elements.
The carrier bearing the electrical components is a laminar element, hereinafter referred to as substrate, having electrically conductive structures, which comprise first contact points, second contact points and conductors (conductive strips) connecting these together, wherein
- the first contact points are located on the side of the substrate facing the electrical components and serve for connection with the input and/or output terminals of the electrical components arranged on the substrate; and
- the second contact points are located on the side of the substrate opposite from the electrical components and serve for connection with the system containing the unit.
A moulding composition forming the unit housing is poured or sprayed on the electrical components and parts of the carrier.
So far the unit and the process of producing such a unit as described here correspond with the unit and the production process described with reference to the Prior Art. In the unit described here the housing leaves uncovered only that side of the carrier which is opposite to the side of the carrier bearing the electrical components. The above-described process of producing such a unit is distinguished in that, during production of the electronic unit, the substrate is arranged on a substrate bearer (carrier bearer) which bears the substrate during production of the electronic units and is subsequently removed again.
A first exemplary embodiment of such a process is described below with reference to Figures IB, ID, IF, 1G and II. In the description, the individual process steps are compared with the process steps performed in a conventional process. The process steps performed in the conventional process are illustrated in Figures 1 A, IC, IE and IH.
The starting point of the conventional process is a substrate 12, which is large enough for the electrical components for a plurality of units to be arranged thereon (Figure 1A).
The starting point of the new process is a substrate carrier 1, on which there is arranged a plurality of substrates 2 (Figure IB). The substrate carrier 1 consists, in the example shown, of ceramics, metal or glass and is 100 μm to 1 mm thick, but may also consist of other materials or have a different thickness.
The number of substrates 2 corresponds with the number of units which are to be produced at the same time. The length and width of the substrates 2 are smaller than the lengths and widths of the units produced using the substrates 2.
The substrates 2 may be finished individual substrates, which are attached to the substrate carrier 1 for example by adhesion. However, they may also comprise appropriate coating of the substrate carrier 1, applied to the substrate carrier 1 for example by printing or laminating and structured as desired by photo and/or laser technology.
The substrates 2 are, in the example shown, multilayer substrates. The layers comprise, for example, electrically conductive layers forming structures and made of copper or copper/titanium and layers of dielectric material, made from polyimide for example, arranged therebetween, the electrically conductive layers exhibiting a thickness of between 0J μm and 20 μm and being connected together by plated-through holes and the layers consisting of dielectric material having a thickness of between 2 μm and 10 μm.
A semiconductor chip 3 or 13 and a capacitor 4 or 14 are positioned on the substrates 2 or 12 respectively and connected electrically and mechanically therewith by adhesion, wire- bonding, soldering etc (see Figures IC and ID).
A moulding composition 5 or 15 forming the housing of the unit is then poured or sprayed over the arrangements (see Figures IE and IF). In the example under consideration, the moulding composition is an epoxy resin.
In the new process, the substrate carrier 1 is then removed (see Figure 1G). Since no substrate carrier is used in the conventional process, there is no corresponding process step. Removal of the substrate carrier 1 may be performed, for example, by etching away thereof or by heating so as to sever the connection between the substrate and the substrate carrier, or by irradiation (e.g. with UN radiation) so as to destroy the connection between the substrate and the substrate carrier.
Finally, the units are singularised by appropriate sawing of the arrangement (see Figures IH and II). Production of the units is then substantially complete, except for only cleaning steps, surface finishing steps etc. which may be required.
As is clear from Figures IH and II, the units produced by the different processes differ from one another. While, in the case of units produced by the conventional process (Figure IH), each of the substrates extends up to the lateral edges of the units, this is not the case with the units produced by the novel process (Figure II) wherein the side edges of the substrate are also surrounded by the moulding composition.
Thus, with the units produced by the novel process, there is no risk of the substrate 2 and the moulding composition 5 becoming detached from one another and/or of moisture penetrating between the substrate 2 and the moulding composition 5. A second embodiment of the novel process will now be described with reference to Figures 2B, 2D, 2F and 2H. In the description, the individual process steps are again compared with the process steps performed in a conventional process. The process steps performed in the conventional process are illustrated in Figures 2A, 2C, 2E and 2G.
The process steps illustrated in Figures 2A to 2D correspond to the process steps illustrated in Figures 1 A to ID. To avoid repetition, reference is made in this respect to the description relating to Figures 1A to ID.
Once the electrical components (the semiconductor chip 3 or 13 and the capacitor 4 or 14 respectively) to be accommodated in the unit being manufactured have been mounted on the substrate 2 or 12 respectively, a moulding composition 5 or 15 respectively is again poured or sprayed over the arrangement. However, during this procedure, the moulding composition is only applied on those areas which actually have to be encapsulated to produce the unit. On those areas 6 or 16 which after singularisation of the unit are not constituents of the unit the moulding composition 5 or 15 is not applied (see Figures 2E and 2F). Such partial encapsulation may be achieved with the assistance of an appropriate template or an appropriate spraying tool (injection mould).
In the novel process, the substrate carrier 1 is then removed (see Figure 2H). As the individual units are not connected together via the moulding composition, the units are singularised at the same time as the substrate carrier 1 is removed. Singularisation by sawing, as in Figure II, may be dispensed with.
In the conventional process, the unit are still held together by the substrate 12 and have to be singularised by sawing (see Figure 1G).
The electronic units produced by the first novel process described with reference to Figure 1 and the electronic units produced by the second novel process described with reference to Figure 2 are substantially identical. A unit produced by the second novel process thus exhibits the same advantages as a unit produced by the first novel process. It has proven advantageous for the side faces of the substrate - contrary to the presentation of Figs. 1 and 2 - to be profiled or structured in such a way that the substrate and the moulding composition forming the housing are anchored together or interlocked in such a way that, even when the substrate and the moulding composition no longer adhere to one another or no longer do so properly, the substrate cannot fall or be pulled out of the moulding composition. This may be achieved, for example, with:
- a point being present at which the substrate is wider and/or longer than elsewhere, as is the case with a substrate having a trapezoidal cross-section, and the area of the substrate at which it is widest and/or longest does not extend to the outside of the electronic package; and/or
- the side faces of the substrate may comprise projections and/or recesses, and/or
- the side faces of the substrate exhibit a stepped, zigzag or curved profile.
A possible embodiment of such a electronic package is illustrated in Figure 3. The specially shaped and/or profiled side faces of the substrate are designated with the reference letter S.
In the case of the units produced by the process described, there is no or only a negligible risk, irrespective of the details of the practical implementation of the process and of the unit, of the substrate 2 and the moulding composition 5 becoming detached from one another and/or of moisture liable to damage or destroy the unit penetrating between the substrate 2 and the moulding composition 5.
It will therefore be understood by those skilled in the art that the present invention is not limited to the embodiments shown and that many additions and modifications are possible without departing from the scope of the present invention as defined in the appending claims.

Claims

Claims
1. Electronic unit having one or more electrical components (3, 4), a carrier (2) bearing the electrical components and a housing (5) surrounding the electrical components and parts of the carrier, characterised in that the housing (5) leaves uncovered only the side of the substrate (2) which is opposite to the side bearing the electrical components (3, 4).
2. Electronic unit according to claim 1, characterised in that the side faces of the carrier (2) are profiled or structured in such a way that the carrier and the housing (5) are anchored together or interlocked to prevent the carrier from falling or being pulled out of the housing.
3. Process for producing an electronic unit having one or more electrical components (3, 4), a carrier (2) bearing the electrical components and a housing (5) surrounding the electrical components and parts of the substrate, characterised in that during production of the electronic unit, the carrier (2) is arranged on a carrier bearer (1) which bears the carrier during production of the electronic unit and is subsequently removed again.
4. Process according to claim 3, characterised in that electrical components (3, 4) comprise one or more semiconductor chips and/or other electrical, electronic, electromechanical or optoelectronic elements.
5. Process according to claim 3 or claim 4, characterised in that the carrier (2) is designed to bear the electrical components (3, 4) of a single unit.
6. Process according to any of claims 3 to 5, characterised in that the carrier (2) is used to connect the electrical components borne thereby and the in- and/or output terminals of the unit.
7. Process according to any of claims 3 to 6, characterised in that housing (5) is formed of a moulding composition, which is cast over the carrier (2) and the electrical components (3, 4) mounted thereon.
8. Process according to any of claims 3 to 1, characterised in that the carrier bearer (1) consists of metal, ceramics or glass.
9. Process according to any of claims 3 to 8, characterised in that the carrier bearer (1) exhibits a thickness of between 100 μm and 1 mm.
10. Process according to any of claims 3 to 9, characterised in that the carriers (2) are attached to the carrier bearer (1).
11. Process according to claim 10, characterised in that the carrier (2) are adhered to the carrier bearer (1).
12. Process according to claim 10, characterised in that the carrier (2) are laminated onto the carrier bearer (1).
13. Process according to any of claims 3 to 12, characterised in that the carriers (2) are produced by coating the carrier bearer (1).
14. Process according to any of claims 3 to 13, characterised in that the carrier (2) are produced by printing of the carrier bearer(l).
15. Process according to any of claims 3 to 14, characterised in that a plurality of carriers (2) is arranged on the carrier bearer(l).
16. Process according to any of claims 3 to 15, characterised in that the carrier bearer(l) is removed by etching away.
17. Process according to any of claims 3 to 16, characterised in that the carrier bearer (1) is removed by severing the connection between the carrier bearer and the carrier (2).
18. Process according to any of claims 3 to 17, characterised in that the carrier bearer (1) is removed by destroying the connection between the carrier bearer and the carrier (2).
19. Process according to claim 17 or claim 18, characterised in that severing or destruction of the connection is performed by heating.
20. Process according to claim 17 or claim 18, characterised in that severing or destruction of the connection is performed by irradiation.
EP01974502A 2000-10-13 2001-10-11 Electronic unit and process for the production thereof Withdrawn EP1325518A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10050855 2000-10-13
DE10050855 2000-10-13
PCT/GB2001/004542 WO2002031881A1 (en) 2000-10-13 2001-10-11 Electronic unit and process for the production thereof

Publications (1)

Publication Number Publication Date
EP1325518A1 true EP1325518A1 (en) 2003-07-09

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Application Number Title Priority Date Filing Date
EP01974502A Withdrawn EP1325518A1 (en) 2000-10-13 2001-10-11 Electronic unit and process for the production thereof

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EP (1) EP1325518A1 (en)
WO (1) WO2002031881A1 (en)

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Publication number Priority date Publication date Assignee Title
CN101101882A (en) * 2006-07-05 2008-01-09 阎跃军 Substrate resin packaging method

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Publication number Priority date Publication date Assignee Title
JPH01106456A (en) * 1987-10-19 1989-04-24 Matsushita Electric Ind Co Ltd Semiconductor integrated circuit device
US5200362A (en) * 1989-09-06 1993-04-06 Motorola, Inc. Method of attaching conductive traces to an encapsulated semiconductor die using a removable transfer film
JP3304705B2 (en) * 1995-09-19 2002-07-22 セイコーエプソン株式会社 Manufacturing method of chip carrier
US5612513A (en) * 1995-09-19 1997-03-18 Micron Communications, Inc. Article and method of manufacturing an enclosed electrical circuit using an encapsulant
JPH11214606A (en) * 1998-01-29 1999-08-06 Matsushita Electron Corp Resin molded semiconductor device and lead frame
JP2000022044A (en) * 1998-07-02 2000-01-21 Mitsubishi Electric Corp Semiconductor device and its manufacture

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