EP1325410A2 - Verfahren zur herstellung von computergestützten echtzeitsystemen - Google Patents
Verfahren zur herstellung von computergestützten echtzeitsystemenInfo
- Publication number
- EP1325410A2 EP1325410A2 EP01969264A EP01969264A EP1325410A2 EP 1325410 A2 EP1325410 A2 EP 1325410A2 EP 01969264 A EP01969264 A EP 01969264A EP 01969264 A EP01969264 A EP 01969264A EP 1325410 A2 EP1325410 A2 EP 1325410A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- clock
- time
- sec
- real
- vlb
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G7/00—Synchronisation
Definitions
- the invention relates to a method for producing computer-based real-time systems with at least one processing unit according to the preamble of claim 1. It also relates to a computer system which has been designed to carry out the method.
- Real-time systems are generally understood to be systems which have to deliver a specific computing result at a predetermined point in time and / or after a predetermined period of time has elapsed.
- the time required to convert speech into digital signals and their transmission and the subsequent reconversion of the digital signals into an analog audio signal is approximately 250 ms, i.e. communication via mobile telephone devices takes place with a time delay of 250 ms. If the time delay is greater than 250 ms, the transmitted language is no longer understandable.
- distributed real-time systems Computer-based real-time systems with several processing units, so-called distributed real-time systems, are widely used in the prior art.
- mobile phones, their switching systems and networks are such a distributed real-time system.
- a distributed real-time system can consist of several processing units. They can be components of one and the same device. However, it may also be the case that processing units, such as a mobile telephone and a switching system, are spatially separated from one another. Distributed real-time systems are produced on the basis of abstract specifications, such as, for example, the "Specification and Description Language” known under the abbreviation "SDL" (ITU-T. Z. 100, Appendix I. ITU, SDL Methodology Guidelines, ITU, 1993 ). SDL is based on the technical principle that a queue is assigned to each processing unit or process. It is imperative that the data exchange or communication between the processing units, which usually takes place via a bus, takes place exclusively via the queue, with all processes running in parallel.
- SDL Specification and Description Language
- each processing unit is also assigned at least one so-called timer module. It is a numerical counter. Its counting period is not standardized; it can be derived from the processor clock. It depends on the hardware selected and / or the respective program. As a result, it has so far not been reliably possible to automatically implement an abstract specification of hardware and software for the real-time-dependent layers of a communication system. The implementations are either too slow or they do not meet the time constraints. In order to counteract this disadvantage, the hardware is specified using circuit diagrams or using hardware description languages and then implemented. The software is mostly implemented using programming languages. The known method is time-consuming and costly and prone to errors.
- the object of the invention is to eliminate the disadvantages of the prior art.
- a method is to be specified with which real-time systems can be produced simply, quickly and inexpensively.
- An automatic implementation of an abstract specification of real-time systems should be made possible.
- Another object of the invention is to avoid errors in the manufacture of real-time systems.
- a method for producing a computer-based real-time system with at least one processing unit in which the real clock is defined by the following relationship: (T)
- R v range of values, R v GR + in [sec],
- T clock period, TGR + in [sec], where
- g accuracy of the clock, g e R, e.g. the quartz accuracy in ppm.
- g (p ⁇ , t) Accuracy change of the clock over time depending on physical quantities, represented by the vector p ⁇ , e.g. the temperature, g (p ⁇ , t) G IR * 2
- the method according to the invention makes it possible to mark data, data packets or data streams in a computer system with a precise time stamp that is independent of the system logic. This opens up completely new freedom in the specification, especially of distributed real-time systems. With a specification produced according to the method according to the invention, the implementation problems according to the prior art are eliminated. The real time can already be taken into account when analyzing the functional and temporal behavior and the subsequent specification.
- the proposed method makes it possible to specify a universal design pattern which is suitable for the production, in particular of distributed real-time systems, in a very wide variety of application areas.
- the formal consideration of time requirements possible with the method according to the invention also makes it possible to specify the real-time-dependent layers of a communication system and to automatically derive efficient implementations therefrom.
- a numerical counter assigned to the processing unit can be controlled by means of the clock.
- one of the clocks advantageously serves as a reference clock for synchronizing the other clocks. This enables an orderly data exchange between the processing units.
- the term "environment” is understood here to mean a technical process. To control or regulate a technical
- the data exchange with the processing units can expediently be carried out in real time-controlled manner.
- the technical processes can e.g. to control a chemical factory, an anti-lock braking system of a motor vehicle, a mobile radio network and the like. act.
- a data stream received by a processing unit and formed from a sequence of data packets and a transmitted data stream can expediently be decoupled, so that the transmitted data stream can have a sequence of data packets that is different from the received data stream.
- the transmission speed can be increased drastically for certain data streams. It is no longer necessary to process the sequence of data packets arriving at the processing unit sequentially and to send them again in the same order.
- a queue can be assigned to the processing unit.
- the queue is advantageously time-controlled, preferably with the further clock according to the invention serving as a reference clock. In this way, time-controlled data can be written to the queue or read from the queue.
- the data packets are provided with a real time stamp generated by the clock. Marking by means of real time stamps makes it possible to send a predefined sequence of data packets, the sequence being changed for transmission and the predefined sequence of data packets subsequently being restored. This can increase the transmission speed.
- Time conditions are understood to mean conditions under which the system carries out a specified action at a specified time.
- Time requirements are system requirements that a specific event has occurred after a specified time has elapsed. This can also be an external event.
- a computer system which is suitable for carrying out the method according to the invention.
- a computer system With such a computer system, a precise automatic implementation of abstract specifications of software and hardware for real-time systems can be carried out quickly and easily.
- Preferred exemplary embodiments of the method according to the invention are explained in more detail below. Show it:
- Fig. 7 the specification of a switching computer with traffic monitoring
- FIG. 8 shows the structure of the outputs of the switching computer according to FIG. 7.
- Fig. 1 represents the function of the ideal clock according to the following formula:
- Ci (t) t; t e R in [sec]
- the continuous real clock requires further parameters.
- the continuous real clock has a constant accuracy. This accuracy is usually given in parts per million (ppm).
- the cycle period of a continuous real clock can fluctuate due to fluctuations in physical parameters such as temperature.
- This is expressed by a function g (p ⁇ , t).
- p ⁇ is a vector with the required physical parameters depending on their changes over time.
- the function g (p ⁇ , t) is not used in the equation of the continuous, real clock, but because it can be periodic fluctuations, the function
- g accuracy of the clock, g G IR, e.g. the quartz accuracy in ppm.
- R v range of values, R v G IR + in [sec],
- G A Granularity, GG IR + in [sec], where G and R v are normalized to the smallest unit that occurs.
- the discretization of time is described by OperationL T.
- R v describes the range of values of the discrete real clock. After R v time units, the discrete real clock shows 0 again. This is described in the equation by the modulo operation.
- the inaccuracy G (p ⁇ , t) does not appear directly here.
- the cycle period T, the granularity G r, the start offset S Q and the value range R v are to be specified in seconds.
- T clock period of the discrete real clock, TG IR + in [sec],
- N A number of changes, N A GN +
- G A granularity of the derived counter, G A GN + ,
- R A Range of values of the derived counter, R A G IM + ,
- the delay time for setting the derived counter is T.
- N A is the number of ad changes in the discrete th real pm until the meter is again changed.
- the granularity G A indicates the interval change of the display.
- R A describes the range of values of the derived counter.
- Fig. 2 shows schematically the structure of a processing unit in SDL or a so-called "SDL process".
- one or more timers provided according to the conventional SDL concept are connected to a real clock. How from 3 can be seen, it is thus possible to synchronize the timers of different SDL processes.
- An incoming signal shown in FIGS. 2 and 3 can be provided with a time stamp, which is a real time stamp.
- 4a shows the definition of a set of abstract data types in SDL, with which it is possible to access the display of the real clocks, to reset the real clocks or to reset them to predetermined values at certain real times.
- design patterns for the automatic derivation of hardware and software from embedded, distributed real-time systems can be specified.
- a useful part of such a design pattern is the formulation of time barriers.
- the programming language used can generate time stamps. This can e.g. by querying the system time.
- Possible time requirements for such a design pattern - such as shown in Fig. 5 are:
- a first time requirement for the periodic occurrence of the READ state ie for the execution of the control branch and a state transition 1.
- the first time requirement results from the rate of the received data stream. It stipulates that on average, as many data words can be read from the queue as the maximum number of words that can be written into them. The first time request only applies if data words are in the queue.
- the second time requirement stipulates that in the case of a medium supporting the data rate R, a signal “output” must be generated for the utilization of the medium every 1 / R time units. The second time requirement only applies if data words are stored in the memory of the design pattern.
- Eventclass The data type "Eventclass" shown in FIG. The following operations are available that are suitable for defining time conditions and time requirements:
- Append enters the current system time in a list of time stamps
- Durationevent Calculates the duration between two time stamps entered in the list and
- Monitor In the event of an error, records the results of the time check and writes them to an appropriate output device.
- ThrowException Calls exception processing in the event of an error in order to e.g. to drive to a safe state.
- Sortinto () and SortOut are respectively determined by the functions Sortinto () and SortOut ().
- the Sortinto () function each data word with a time stamp.
- SortOut () then reads the data words in a defined order according to their time stamp.
- policy traffic monitoring
- QoS Quality of Service
- the respective manipulated variable calculation is carried out in the SortOut () function, while the Sortinto () function stores the sensor values (controlled variables).
- state transition 1 and state transition 2 are considered separately.
- Decoupling makes it possible to define a separate software or hardware module for each state transition.
- the respective Einzw. Output module again represent a mixed HW / SW implementation.
- the module's input and output transitions can be overlapped (pipelining), since synchronization between the two state transitions can take place via the shared memory of the internal buffer.
- 6 shows an example of how the design pattern can be implemented.
- Each part of the pattern can be implemented either in hardware or in software. The following combinations are possible during implementation:
- SortOut () is implemented in hardware, all others
- Sortinto () and SortOut () are implemented in hardware, the rest of the process is implemented in software.
- Fig. 7 shows the basic structure of the system.
- the incoming data streams in the example these are 2, are analyzed with the help of a traffic monitoring (policy). Traffic monitoring is implemented using the design pattern (right side in Fig. 7).
- Policy traffic monitoring
- Traffic monitoring is implemented using the design pattern (right side in Fig. 7).
- Sortinto () function as shown in Fig. 7, has been defined.
- control information In such a switching computer, a distinction is still made between control information and user data. Does the data contain tenstrom control information, this is sent to the control module Control. The usual telecommunications protocols are then processed in this module. The information that describes the data flow (mediation) through the system is generated in Control. To do this, the OutPID variable is set in Control's traffic monitoring. The switching is realized in that there are several instances of the scheduler module (FIG. 8), for example one for each output line, and the data words are sent from the traffic monitoring to the corresponding bandwidth allocator. The addressing (using the OutPID variable) of the corresponding bandwidth allocator (scheduler) assigns a data stream to an output channel.
- the scheduler module FIG. 8
- FIG. 9a shows the basic structure of the switching computer on the specification level.
- Software modules are implemented on processors (abbr. CPU), while hardware modules are "cast” in ASICs (application specific integrated circuits).
- ASICs application specific integrated circuits
- a filled circle is supposed to be one instance of each Represent design patterns, using abbreviations P for Policy or S for Scheduler, C for Control. Communication channels can be mapped to buses or switching modules.
- the implementation in FIG. 9b has a processor for processing the two traffic monitoring entities [policy], three hardware modules for the bandwidth allocation modules (scheduler), a bus for the transmission of data words and a bus for control information.
- policy the two traffic monitoring entities
- bandwidth allocation modules the bandwidth allocation modules
- bus for the transmission of data words
- bus for control information
- FIG. 9c the architecture in FIG. 9c consists of three processors for the control and traffic monitoring instances and a hardware module for implementing the schedulers.
- the switching functionality is not implemented with the aid of a common bus, but rather via a switching module (space multiplexer).
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Hardware Redundancy (AREA)
Abstract
Description
Claims
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10044021 | 2000-09-06 | ||
DE10044021 | 2000-09-06 | ||
DE10057651 | 2000-11-21 | ||
DE10057651A DE10057651C2 (de) | 2000-09-06 | 2000-11-21 | Verfahren zur Herstellung von computergestützten Echtzeitsystemen |
PCT/DE2001/003349 WO2002021261A2 (de) | 2000-09-06 | 2001-09-03 | Verfahren zur herstellung von computergestützten echtzeitsystemen |
Publications (1)
Publication Number | Publication Date |
---|---|
EP1325410A2 true EP1325410A2 (de) | 2003-07-09 |
Family
ID=26006947
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP01969264A Ceased EP1325410A2 (de) | 2000-09-06 | 2001-09-03 | Verfahren zur herstellung von computergestützten echtzeitsystemen |
Country Status (4)
Country | Link |
---|---|
US (1) | US7085198B2 (de) |
EP (1) | EP1325410A2 (de) |
AU (1) | AU2001289575A1 (de) |
WO (1) | WO2002021261A2 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102008030163A1 (de) | 2008-06-27 | 2009-12-31 | Inchron Gmbh | Verfahren zur Simulation von eingebetteten Systemen durch ein für Hardware- und Software-Komponenten integriertes Simulationsmodell |
EP2366146B2 (de) | 2009-12-23 | 2016-10-12 | Inchron GmbH | Verfahren und datenverarbeitungssystem zur simulation eines eingebetteten systems |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6173207B1 (en) * | 1997-09-22 | 2001-01-09 | Agilent Technologies, Inc. | Real-time control system with non-deterministic communication |
-
2001
- 2001-09-03 WO PCT/DE2001/003349 patent/WO2002021261A2/de active Application Filing
- 2001-09-03 AU AU2001289575A patent/AU2001289575A1/en not_active Abandoned
- 2001-09-03 US US10/363,635 patent/US7085198B2/en not_active Expired - Lifetime
- 2001-09-03 EP EP01969264A patent/EP1325410A2/de not_active Ceased
Non-Patent Citations (1)
Title |
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See references of WO0221261A2 * |
Also Published As
Publication number | Publication date |
---|---|
US7085198B2 (en) | 2006-08-01 |
WO2002021261A2 (de) | 2002-03-14 |
WO2002021261A3 (de) | 2002-07-18 |
AU2001289575A1 (en) | 2002-03-22 |
US20040027924A1 (en) | 2004-02-12 |
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