EP1305875A1 - Ensemble de barres basse induction pour mutateur matriciel - Google Patents

Ensemble de barres basse induction pour mutateur matriciel

Info

Publication number
EP1305875A1
EP1305875A1 EP01957734A EP01957734A EP1305875A1 EP 1305875 A1 EP1305875 A1 EP 1305875A1 EP 01957734 A EP01957734 A EP 01957734A EP 01957734 A EP01957734 A EP 01957734A EP 1305875 A1 EP1305875 A1 EP 1305875A1
Authority
EP
European Patent Office
Prior art keywords
busbar
low
sections
section
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP01957734A
Other languages
German (de)
English (en)
Inventor
Manfred Bruckmann
Olaf Simon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP1305875A1 publication Critical patent/EP1305875A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections

Definitions

  • the invention relates to a low-inductance busbar system for a matrix converter comprising a plurality of switching elements arranged in a 3 ⁇ 3 matrix, in particular semiconductor switches, the matrix converter on the network side having a plurality of capacitor elements via which three input voltage potentials can be passed to the matrix converter.
  • a matrix converter is a self-commutated direct converter which enables a rigid three-phase network to be converted into a system with variable voltage and frequency.
  • Known matrix converters have several electrical switching elements, in particular semiconductor switches (e.g. insulated gate bipolar transistors (IGBT)), which are arranged in a switch matrix.
  • IGBT insulated gate bipolar transistors
  • the power electronic switches are arranged in a 3x3 matrix, so that each of the three output phases is electrically connected to one
  • Entry phase can be connected.
  • the matrix converter or the inputs on the input side are connected to capacitor elements which ensure the switching elements for stable voltage conditions. Since three input phases or input voltages are present, three corresponding capacitor elements are also provided.
  • the connection is made using the low-induction busbar system. Only through the presence of the capacitor elements and the low-inductive displacement is it possible for the semiconductor switches in the matrix converter to commutate without excessive overvoltages, so that an ohmic inductive load, e.g. B. a motor can be operated.
  • busbars In the matrix converter, three potentials of the input voltage from the input capacitor elements to the semiconductor module that forms the 3x3 switch matrix (or the modules in a configuration in which the matrix is implemented in three phases, each with modules comprising three switches) must be used with low inductance.
  • Known busbars have a plurality of busbar sections which are arranged in three levels and are insulated from one another, for which purpose corresponding insulation layers are provided between the individual busbar levels. Overall, a three-layer railing is implemented. The low inductance is achieved by the fact that the splinting levels are as close as possible to one another and that the splinting sections are correspondingly large.
  • busbar with three layers is disadvantageous with regard to the inductance insofar as the distance between the two outer busbar sections determines the maximum leakage inductance. Furthermore, the cooling of the inner conductor is very difficult since it is largely embedded between the other two busbar sections. In addition, the production is complex.
  • the invention is therefore based on the problem of specifying a splint which has the lowest possible leakage inductance with a simple structure at the same time.
  • a low-induction busbar system of the type mentioned at the outset which consists of a plurality of busbar sections which are arranged isolated from one another in two planes.
  • the invention starts from the previous three-layer railing and advantageously provides only two-layer railing.
  • the two levels with the different busbar sections can be arranged correspondingly close to one another (there is only the insulating layer in between), so that the leakage inductance can be reduced even further.
  • the busbar sections required to form the respective pairs of rails, which are required for commutation in accordance with the respective switching state of the switch matrix, are shaped or designed accordingly and are distributed over the levels. There are also no cooling problems, since only two conductor levels are provided, which can be easily cooled from the outside. Another considerable advantage is the simplified possibility of manufacturing such a splint according to the invention.
  • busbar sections can be applied in a simple manner to an appropriately designed or dimensioned insulating layer as flat, metallic conductor layers. It is particularly preferred if the conductor layers are laminated onto a circuit board.
  • the lamination of conductors on circuit boards is a well-known method, the technology of which is safe to use and can also be used advantageously for producing the low-inductance splinting according to the invention " .
  • At least one busbar section is provided for each input potential.
  • different layouts are conceivable with regard to the distribution of the busbar sections, which, as will be discussed in the following, only for each input potential require a busbar section, or else require several busbar sections for one or the other input potential.
  • a first large-area busbar section for the first input potential is provided in the first level and second and third busbar sections for the second and third input potential that are at least partially covered by the first busbar section are provided in the second level.
  • two pairs of displacement sections, between which the voltage co-mutates, are guided next to one another, the potentials involved in a pair being located one above the other in the two layers.
  • the low-inductance commutation in the third voltage pair, which in this embodiment lies in the second level, that is, the two busbar sections, between which the voltage is commutated, are arranged next to one another here, is achieved by eddy current formation in the line routing of the large-area first busbar section in the first level.
  • a third busbar section is therefore integrated for this commutation.
  • the first battening section covers at least 75% of the area of the other two battening sections, but the degree of coverage should preferably be as large as possible.
  • an assigned busbar section is provided in the first and second levels for each input potential.
  • all three possible busbar section pairs between which the voltage commutates are guided next to one another, one busbar section being arranged in the first and the other in the second plane underneath.
  • the busbar sections should be arranged in such a way that the respective busbar sections of the first and second levels, which form a commutation voltage pair, lie directly opposite one another and cover one another over the largest possible area.
  • a third alternative of the invention provides that a busbar section assigned to the first and a second input potential is provided in the first level and that a busbar section assigned to the second and a third input potential is provided in the second level, the busbar sections being such are arranged and designed such that the busbar sections forming a commutation pair lie opposite one another or at least partially overlap one another.
  • two are Different busbar sections assigned to different input potential are provided, each of these busbar sections being formed with a significantly larger area. This ensures that these large-area busbar sections, which are located in different planes and are each assigned different potentials and therefore also form a commutation voltage pair, can overlap one another.
  • the area with which the rail sections overlap should essentially be the same size.
  • a fourth alternative of the invention provides that in the first level there is an assigned busbar section for each input potential and in the second level a large busbar section that forms a counter surface, which does not have to lie on any of the three potentials and that covers the busbar sections of the first level ,
  • a busbar section is used which has no particular potential and which is integrated into the respective commutation path.
  • the commutation also takes place here by eddy current formation in the busbar section forming the counter surface, which is preferably connected to ground.
  • the respective sections are dimensioned such that the potential-carrying busbar sections are completely covered by the busbar section opposite.
  • the invention further relates to a circuit arrangement consisting of a matrix converter and at least three capacitor elements which are connected to one another via a low-inductance busbar of the type described above.
  • the matrix converter consists of several separately configured and arranged output phases. Senmodulen exists, which are connected to the capacitor elements via the busbar.
  • the matrix converter is therefore not a one-piece component, rather it consists of separate phase modules, preferably three phase modules, each of which has a separate output phase.
  • the busbar is designed here so that the capacitor elements are contacted with the corresponding phase modules.
  • the phase modules are assigned a common capacitor block consisting of a plurality of capacitor elements, which is contacted with the individual modules via the busbar.
  • each phase module is assigned its own capacitor block consisting of several capacitor elements.
  • FIG. 1 shows a schematic diagram in section to show the arrangement of the busbar sections according to a first distribution according to the invention
  • FIG. 2 shows a layout representation of the busbar connection according to
  • FIG. 1 is a top view as a schematic diagram
  • FIG. 3 is a schematic diagram in section to show the arrangement of the busbar sections according to a second distribution according to the invention
  • Fig. 4 is a layout representation of the busbar according to
  • FIG. 3 shows a schematic diagram in top view
  • FIG. 5 shows a schematic diagram in section to show the arrangement of the busbar sections according to a third distribution according to the invention
  • Fig. 6 is a layout representation of the busbar according to
  • FIG. 5 shows a top view as a schematic diagram
  • FIG. 7 shows a basic illustration in section to show the arrangement of the busbar sections according to a fourth distribution according to the invention
  • FIG. 8 shows a layout illustration of the busbar mounting according to
  • FIGS. 9 and 10 show two different designs of circuit arrangements according to the invention.
  • Fig. 1 shows in the form of a schematic diagram a sectional view through a railing according to the invention of a first embodiment.
  • An insulating layer 1 is shown, in the example shown a circuit board, to which busbar sections Vi, V 2 , V 3 are applied as large-area metallic conductor surfaces (e.g. made of aluminum), primarily laminated, on the upper and lower sides.
  • each of the busbar sections is assigned a specific input voltage potential, which is supplied via capacitor elements to be described in more detail in FIG. 2.
  • the upper displacement section Vi is assigned to the potential Pl and the two lower V and V 3 to the potentials P 2 and P 3 .
  • the respective assignment of the input potentials to the respective busbar sections is arbitrary, ie the potentials can also be interchanged in any way. This applies to all of the exemplary embodiments described below.
  • the upper busbar section Vi is substantially wider than the lower busbar sections V 2 , V 3 . These are dimensioned and positioned so that they are largely covered by the upper rail section Vi. The degree of coverage should be as large as possible and at least 75%.
  • the dashed areas, which each represent busbar sections, are in the upper level, the solid, also depicting busbar sections are arranged in the lower level. Obviously, the busbar section Vi covers the two busbar sections V 2 , V 3 over a large area.
  • a total of three commutation voltage pairs that is to say, pairs of blocking sections between which current and voltage commutate, are formed.
  • the first commutation voltage pair consists of the busbar sections Vi and V
  • the second pair consists of the sections Vi and V 3 . It can be seen that these commutation voltage pairs are arranged next to one another, the respective sections involved in the commutation lying opposite one another and being separated via the insulation layer.
  • the third commutation voltage pair V 2 - V lies side by side. The commutation in this voltage pair is achieved by eddy currents that are generated in the busbar section Vi.
  • Fig. 2 also shows the splinting of the capacitor elements and the respective connections on the matrix converter.
  • a total of three capacitor elements Ki, K 2 and K 3 are provided.
  • the capacitor elements are placed on the configuration shown in FIG. 2 from above.
  • the capacitor element Ki is connected to the busbar section Vi and to the busbar section V 2, a suitable opening 2 being provided on the busbar section Vi for contacting the busbar section V 2 .
  • the capacitor element K is contacted at the busbar section Vi and at the busbar section V 3 .
  • both capacitor elements Ki and K 2 lie at a common contact point on the busbar section Vi.
  • the capacitor element K 3 is connected to the two busbar sections V 2 , V 3 , wherein here in the case of contacting connections by speaking openings 2 are guided in rail section Vi.
  • each busbar section Vi, V, V 3 is connected to one of the connections Li, L 2 L 3 .
  • the connections Li, L 2 , L 3 are part of the matrix converter 3 shown here only as an example.
  • FIG. 3 Another exemplary embodiment is shown in FIG. 3.
  • the busbar sections are laminated onto the insulation layer 1 in two planes as large-area metallic conductor surfaces.
  • a total of six busbar sections are used here, one busbar section Vi, V 2 and V 3 being provided in each level.
  • a certain input potential Pi, P 2 , P 3 is again assigned to each of the displacement sections Vi, V 2 , V 3 .
  • three commutation voltage pairs lying next to one another are formed, namely the pair Vi - V 2 , the pair V 2 - V 3 , and the pair V 3 - Vi, each via the insulation layer 1 Cut.
  • the respective rail sections located in one plane are somewhat spaced apart from one another for insulation purposes, that is to say the insulation in the horizontal plane takes place via the air gap.
  • FIG. 4 shows a top view of the modification shown in FIG. 3.
  • the busbar sections located in the upper level are dashed and the busbar sections located in the lower level are shown as solid lines.
  • the respective capacitor elements Ki, K 2 , K 3 are also contacted here at the respective busbar sections, with corresponding openings being provided in the respective connecting section for through-contacting here as well. Since a busbar section assigned to a specific potential Pi, P 2 / P 3 is guided here in each level, both busbar sections must be led to a common connection Li, L 2 , L 3 be, which requires appropriate training of the rail sections.
  • the busbar sections Vi, V 2 , V 3 running in the lower level are each guided in a straight line to the respective conductor connection Li, L 2 and L 3 , the ends of the upper busbar sections V x , V 2 , and V 3 are angled accordingly trained and led to the respective conductor connection Li, L 2 and L 3 .
  • the two busbar sections Vi on the conductor connection Li, the busbar sections V 2 on the conductor connection L 2 and the busbar sections V 3 on the conductor connection L 3 are contacted.
  • the modification acc. Fig. 3 shows a total of seven insulation points, namely the insulation between the upper and lower busbar sections (three insulation points) and the respective insulation distances between the busbar sections lying in one plane (a total of four insulation points).
  • FIG. 5 shows a railing that requires less insulation. There are two railing sections in each level, in the upper level the railing sections Vi and V 2 , in the lower level the railing sections V 2 and V 3 .
  • the busbar section Vi of the upper level and the busbar section V 3 of the lower level are each made very wide, so that it is ensured that they overlap in the middle section. In this embodiment too, a total of three commutation voltage pairs arranged next to one another are formed.
  • the number of insulation points can be reduced to a total of five, since only two busbar sections are provided in each level.
  • FIG. 6 shows The corresponding layout of this busbar arrangement.
  • the one busbar section Vi and the one busbar section V 3 are each located at the line connection L x and L 3
  • the two busbar sections V 2 are located on the upper and lower sides at the common line connection L 2 .
  • the capacitor elements Ki, K 2 , K 3 are also connected here in a known manner.
  • FIG. 7 shows a fourth embodiment according to the invention.
  • Three busbar sections Vi, V 2 , V 3 are arranged in the lower level, and a single, large-area busbar section V is provided in the upper level. While the busbar sections Vi, V 2 , V 3 each have an associated potential P x , P 2 and P 3 , the busbar section V is not at a specific potential, and is preferably grounded.
  • the respective commutation voltage pairs are formed with the inclusion of the upper busbar section V 4 forming a metallic counter surface, which largely covers the busbar sections below it. Because during commutation, eddy currents are generated in the busbar section V, so that commutation is made possible. Although the busbar section V must not be at a certain potential, it is expedient to put it to ground, since in this way it also serves as interference suppression.
  • each busbar section Vi, V, V 3 is connected to a line connection Li, L 2 and L 3 ; the busbar sections are connected to one another with the corresponding capacitors Ki, K 2 , K 3 .
  • the capacitor elements are all placed on the modification from above, which is why a corresponding number of openings 2 are provided in the busbar section V 4 for plated-through holes.
  • FIG. 9 shows a schematic diagram of a first embodiment of a circuit arrangement according to the invention with separately implemented output phases of the matrix converter.
  • Three phase modules 4, 5, 6 are shown, each of which is assigned to specific phases.
  • the phase modules 4, 5, 6 are assigned a common capacitor block 7 consisting of three individual capacitor elements, the capacitor elements being connected via the busbar 8 shown to the corresponding phase modules 4, 5, 6, which in their entirety form the matrix converter.
  • FIG. 10 A second possibility of executing a circuit arrangement with separate phase modules is shown in FIG. 10.
  • three separate phase modules 4, 5, 6 are again provided, each of which is assigned a capacitor block 7 with a plurality of capacitor elements in the exemplary embodiment shown.
  • the individual capacitor elements here have a low inductance over the busbar shown, as in the embodiment according to FIG. 9.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Power Conversion In General (AREA)

Abstract

L'invention concerne un ensemble de barres basse induction pour un mutateur matriciel, qui comprend plusieurs éléments de commutation disposés selon une matrice 3x3, en particulier des commutateurs à semi-conducteurs. Le mutateur matriciel est pourvu, côté réseau, de barres, présentant plusieurs éléments condensateurs, par l'intermédiaire desquels les trois potentiels de tension d'entrée sont conduits au mutateur matriciel. L'ensemble de barres est constitué de plusieurs barres (V1, V2, V3, V4) qui sont disposées dans deux plans, en étant isolées l'une de l'autre.
EP01957734A 2000-08-03 2001-07-23 Ensemble de barres basse induction pour mutateur matriciel Withdrawn EP1305875A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10037970 2000-08-03
DE10037970A DE10037970A1 (de) 2000-08-03 2000-08-03 Niederinduktive Verschienung für einen Matrixumrichter
PCT/DE2001/002793 WO2002013363A1 (fr) 2000-08-03 2001-07-23 Ensemble de barres basse induction pour mutateur matriciel

Publications (1)

Publication Number Publication Date
EP1305875A1 true EP1305875A1 (fr) 2003-05-02

Family

ID=7651266

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01957734A Withdrawn EP1305875A1 (fr) 2000-08-03 2001-07-23 Ensemble de barres basse induction pour mutateur matriciel

Country Status (5)

Country Link
US (1) US6683801B2 (fr)
EP (1) EP1305875A1 (fr)
CN (1) CN1437790A (fr)
DE (1) DE10037970A1 (fr)
WO (1) WO2002013363A1 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10246526B4 (de) * 2002-10-05 2006-08-24 Semikron Elektronik Gmbh & Co. Kg Verfahren zur Ansteuerung eines Matrixumrichters
DE10336659B4 (de) * 2002-11-20 2006-04-27 Sew-Eurodrive Gmbh & Co. Kg Blockheizkraftwerk und Steuer- und/oder Regelverfahren für ein Blockheizkraftwerk
US8057239B2 (en) * 2009-04-29 2011-11-15 GM Global Technology Operations LLC Power module assembly
US8772634B2 (en) 2011-02-28 2014-07-08 General Electric Company Busbar for power conversion applications
JP5377574B2 (ja) 2011-05-31 2013-12-25 日産自動車株式会社 電力変換装置
JP5377575B2 (ja) 2011-05-31 2013-12-25 日産自動車株式会社 電力変換装置
JP5437312B2 (ja) 2011-05-31 2014-03-12 日産自動車株式会社 電力変換装置
JP5437314B2 (ja) * 2011-05-31 2014-03-12 日産自動車株式会社 電力変換装置
JP5377573B2 (ja) 2011-05-31 2013-12-25 日産自動車株式会社 電力変換装置
JP5437313B2 (ja) 2011-05-31 2014-03-12 日産自動車株式会社 電力変換装置
US10658941B2 (en) 2018-04-17 2020-05-19 General Electric Company Compact design of multilevel power converter systems
US11451156B2 (en) 2020-01-21 2022-09-20 Itt Manufacturing Enterprises Llc Overvoltage clamp for a matrix converter

Family Cites Families (7)

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Publication number Priority date Publication date Assignee Title
DE3609065A1 (de) * 1986-03-18 1987-09-24 Siemens Ag Niederinduktive verschienung
DE19717550A1 (de) * 1997-04-25 1998-10-29 Abb Daimler Benz Transp Flaches Stromschienenpaket für ein Stromrichtergerät
JP3424532B2 (ja) * 1997-11-25 2003-07-07 株式会社日立製作所 電力変換装置
DE19833491A1 (de) * 1998-07-24 2000-02-03 Siemens Ag Niederinduktive Verschienung für einen Dreipunkt-Phasenbaustein
JP3552549B2 (ja) * 1998-09-08 2004-08-11 株式会社豊田自動織機 半導体モジュールの電極端子接続構造
DE10016230B4 (de) * 2000-03-31 2006-04-20 Siemens Ag Verfahren zur Steuerung von Freilaufpfaden bei einem Matrixumrichter
EP1195877B1 (fr) * 2000-10-06 2018-09-12 ABB Schweiz AG Système d'onduleur avec modules onduleurs connectés par circuit intermédiaire à tension continue et procédé de fonctionnement

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO0213363A1 *

Also Published As

Publication number Publication date
US6683801B2 (en) 2004-01-27
WO2002013363A1 (fr) 2002-02-14
US20030174527A1 (en) 2003-09-18
CN1437790A (zh) 2003-08-20
DE10037970A1 (de) 2002-03-07

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