Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L23/00—Details of semiconductor or other solid state devices
  • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
  • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
  • H01F17/00—Fixed inductances of the signal type 
  • H01F17/0006—Printed inductances
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/0001—Technical content checked by a classifier
  • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

• the present invention relates to the field of integrated circuits and more particularly to the production of an inductor formed above a semiconductor substrate.
• FIGS. 1A and 1B represent, respectively seen from above and in section along the line BB 'of FIG. 1A, a classic example of an inductor 1 formed above a semiconductor substrate 2.
• the inductor 1 comprises a certain number of turns or turns (at least one turn) generally concentric obtained by depositing a conductive element on an insulating layer 3 ( Figure IB).
• the insulating layer 3, for example silicon oxide, rests on the last level of metalization 4 added to the substrate 2 after the formation of components integrated in this substrate.
• two other metallization levels 5, 6 have been illustrated in dotted lines between the substrate 2 and the upper level 4. Each level is of course separated from the underlying level by an insulating layer, respectively 7 , 8.
• the conductive element of inductance 1 is conventionally of constant width and thickness. It is deposited on the insulating layer 3, in the form of a flat winding from a first internal end 10 to a second external end 11. To allow a connection of the inductor 1 to the rest of the integrated circuit or to a terminal of a box, it is necessary to provide a contact resumption of the internal end 10 of the winding to the outside of this winding. Conventionally, this resumption of contact is obtained by using an underlying metallization level (generally the upper level 4). A conductive track 12 is formed there (generally rectilinear) between the plumb of the internal end 10 of the inductor 1 and the plumb of a stud 13 outside the winding.
• the stud 13 is produced on the insulating layer 3 in the same conductive material as the winding of the inductor 1.
• Vias 14 and 15 (for example, in tungsten) electrically connect the end 10 and the stud 13 at the respective ends of the underlying track 12.
• the parasitic resistance (series resistance) of the inductor is a paramount parameter. To reduce the resistance of the conductive element to the passage of current, it is generally sought to maximize its section. It then increases not only the thickness but also the width of the turns of the inductor 1.
• a drawback is that the resumption of contact with the internal end of the winding introduces a resistance in series which cancels the beneficial effects of the increase in cross section of this winding.
• the thickness of the metal levels underlying the winding is imposed by the technology in which the other components integrated with the inductor are manufactured.
• the metallization levels consist of aluminum deposited over a thickness of 0.8 to 1 ⁇ m.
• the conductive level attached to the top of the structure and in which the turns are made has, in the case of aluminum, a thickness of the order of 2.5 ⁇ m.
• such a an increase in thickness is only possible on the last level deposited.
• the present invention aims to propose a new inductor in integrated circuit which overcomes the drawbacks of known integrated inductors.
• the invention aims, more particularly, to solve the problems associated with the resumption of contact of the internal end of one inductor.
• the invention aims to propose a solution to the problem of crossing, by resumption of contact in a lower level, of a flat winding of an inductor.
• the present invention provides an integrated inductance, formed by a flat winding of at least one turn of a conductive material above a substrate provided with at least one underlying conductive level in which is achieved, by a contact recovery track, at least one crossing of the winding, the width of the coil being reduced directly above said contact recovery track.
• the invention also provides an integrated inductance, formed by a winding of several turns, the width of at least one turn and / or at least one interval separating two turns being reduced in line with said recovery track of contact .
• the crossing is used for the resumption of contact from an internal end of the winding to an external stud.
• the layout of the turns is such that the outer turn is, at the level of contact resumption, closer to the center of the winding than the rest of this outer turn.
• the resistance per square of the conductive material constituting the winding is substantially lower than the resistance per square of the underlying conductive level in which the contact is made, the thickness of the material conductor constituting the winding preferably being substantially greater than the thickness of the underlying conductor level.
• the differences, in the alignment of the contact recovery, between the two connected winding parts, are minimized.
• the length of the narrowed section or sections which is a function of the width of the contact recovery track, is chosen to be as short as possible.
• the conductive material is aluminum, the underlying conductive level also being made of aluminum.
• said conductive material is copper having a thickness of several tens of micrometers, the underlying conductive level being made of aluminum with a thickness of the order of a micrometer.
• said conductive level consists of the upper level of metallization used for the interconnections of other components of the integrated circuit.
• FIGS. 2A and 2B show, respectively from above and in section, an embodiment of an integrated inductor according to the present invention
• FIGS. 3A and 3B illustrate, by representations of an integrated inductor, respectively from above and in section, alternative embodiments of the present invention.
• a feature of the present invention is to provide a narrowing of the conductive element constituting a winding of an integrated inductor, directly above an underlying conductive track allowing, by contact recovery, a crossing of the 'winding.
• Such localized narrowing of the winding turn (s) makes it possible to reduce the length of the underlying contact resumption section, therefore the series resistance of the inductor.
• a characteristic of the invention is to provide, at the base of the underlying contact resumption, a narrowing of at least one turn of the conductive element and / or of at least an insulating interval between turns.
• FIGS. 2A and 2B represent, respectively by a top view and by a section along the line BB 'in FIG. 2A, an embodiment of an integrated inductor according to the present invention.
• an inductor 20 according to the invention consists of one or more turns of a conductive element deposited above a semiconductor substrate 2 in which integrated circuits have been formed.
• the inductor 20 is deposited flat on an insulating layer 3 covering the last level of metallization 4 of the integrated circuit.
• FIG. 2B shows the same metallic levels 5, 6 and insulators 7, 8 as in the example described previously in relation to FIG. IB.
• the inductor 20 comprises three turns, a quarter of square shape.
• an inductor according to the invention can have any shape (round, oval or polygonal) and any number of turns as well.
• This resumption of contact is carried out by means of a conductive track 12 ′ obtained, for example, in the last level of metallization 4 underlying the conductive element constituting the inductor 20.
• the internal end 10 and the stud 13 are connected to the respective ends of the track 12 ′ by means of vias 14, 15.
• each turn 21, 22 or 23 which must pass over the contact recovery track 12 ′ has, at the base of this track 12 ′, a narrowed section, respectively 21 ', 22' and 23 '.
• the narrowing 22 ′ of the intermediate turn 22 is, for example, in alignment with the rest of the straight section in which it is formed.
• the narrowing 21 'and 23' are then not aligned with the rest of the corresponding sections of the turns 21 and 23 in order to bring the sections 21 'and 23' as close as possible to the section 22 '.
• the connection between each narrowed section and the rest of the corresponding turn can have any shape (for example, oblique as shown, or at right angles).
• the narrowing makes it possible to reduce the length of the track 12 'relative to the same track having to cross the sections 21, 22 and 23 in their non-narrowed portions.
• the narrowed sections are mutually parallel and, for example, perpendicular to the contact recovery track, the length of which we want to minimize. Consequently, a contact recovery section according to the invention has a lower resistance than that of a conventional section in the same technology. By reducing the resistance of the contact recovery section, the overall series resistance of the inductor is reduced and its quality factor is therefore improved.
• the narrowing provided by the invention is localized and as short as possible to minimize the resistance introduced into each turn.
• this narrowing is not accompanied by a thinning, so that the section of the sections 21 ′, 22 ′ and 23 ′ remain relatively large (in particular compared to the underlying level).
• integrated inductors are generally used for high frequency applications where the current in the inductor is essentially a function of the perimeter of its section (skin effect). Consequently, if the turns are sufficiently thick (thicker than wide), the inductance is not degraded by the narrowing provided for by the invention.
• the minimum width of the conductive sections of the inductance and of the intervals between turns is essentially linked to the technological sector used as a function of the thickness of these conductive sections.
• copper is also used which can then be deposited in a much thicker layer to make the inductor. Copper thicknesses of several tens of ⁇ m can then be obtained (for example, around 30 ⁇ m). With such technology, the minimum width and spacing are approximately half the thickness (i.e., about 15 ⁇ m, for example).
• the width of the non-narrowed sections is for example of the order of
• the underlying metallization levels remain, for example, aluminum.
• FIGS. 3A and 3B illustrate alternative embodiments of an inductor according to the invention.
• Figure 3A is a top view and Figure 3B is a sectional view along line B-B 'of Figure 3A.
• FIGS. 3A and 3B is a hexagonal inductor 30 of four one-third turns, formed of rectilinear sections.
• this embodiment includes another variant in the arrangement of the narrowing 31 ', 32', 33 'and 34' of the turns 31, 32, 33 and 34 directly above the track 12 'of transfer from the internal end 10 of the inductor 30 towards the external stud 13.
• these narrowing are brought as close as possible to the internal end 10 of the inductor 30 while in the embodiment of FIGS. 2A and 2B, these narrowing make it possible to tighten the turns 21 and 23 symmetrically with respect to the second turn 22.
• Other variants are possible. For example, provision may be made to tighten the narrowed sections towards the external turn
• the inductance is said to be "symmetrical" and comprises a crossing approximately equidistant from the ends of the winding which are both outside of the latter. In the case of a winding with several turns, there are then several crossings, each resumption of contact passing under a single turn.
• An advantage of the present invention is that it reduces the series resistance of the inductor compared to a conventional inductor.
• the implementation of the invention reduces the parasitic capacities. On the one hand by reducing the length of the contact recovery track, the capacity between it is reduced and the substrate. On the other hand, by narrowing the turns, the capacity between the winding and the resumption of contact is reduced.
• Another advantage of the invention is that it reduces the surface area of the integrated circuit in which the inductance is inscribed. Indeed, by tightening the turns inward at their narrowing, we bring the pad 13 of external connection, the center of the winding. This advantage is shown in particular in FIG. 3A.
• the present invention is susceptible of various variants and modifications which will appear to those skilled in the art.
• the respective dimensions of the sections of the inductor, of their narrowing and of the underlying contact resumption track depend on the application and are to be adapted on a case-by-case basis by those skilled in the art.
• the level of contact recovery can be constituted by any level of metallization or polycrystalline silicon, or even by a region of the substrate.
• the winding itself may include several conductive levels in parallel (connected by vias) provided that the winding has, at least in one of these levels, a linear resistance lower than that of the resumption of contact.

Landscapes

• Engineering & Computer Science (AREA)
• Power Engineering (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Physics & Mathematics (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Computer Hardware Design (AREA)
• Coils Or Transformers For Communication (AREA)
• Semiconductor Integrated Circuits (AREA)

Applications Claiming Priority (3)

Publications (1)

Family

ID=8853325

Family Applications (1)

Country Status (6)

Families Citing this family (9)

Family Cites Families (2)

• 2000
  • 2000-08-04 FR FR0010340A patent/FR2812755B1/fr not_active Expired - Fee Related
• 2001
  • 2001-08-03 JP JP2002518480A patent/JP2004506320A/ja not_active Withdrawn
  • 2001-08-03 EP EP01965316A patent/EP1305808A1/de not_active Withdrawn
  • 2001-08-03 WO PCT/FR2001/002546 patent/WO2002013212A1/fr not_active Application Discontinuation
  • 2001-08-03 AU AU2001285983A patent/AU2001285983A1/en not_active Abandoned
  • 2001-08-03 US US10/343,897 patent/US6791158B2/en not_active Expired - Lifetime

Non-Patent Citations (1)

Also Published As

Similar Documents

Legal Events