EP1294100A3 - Method and apparatus for providing resampling function in a modulus prescaler of a frequency source - Google Patents

Method and apparatus for providing resampling function in a modulus prescaler of a frequency source Download PDF

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Publication number
EP1294100A3
EP1294100A3 EP02256053A EP02256053A EP1294100A3 EP 1294100 A3 EP1294100 A3 EP 1294100A3 EP 02256053 A EP02256053 A EP 02256053A EP 02256053 A EP02256053 A EP 02256053A EP 1294100 A3 EP1294100 A3 EP 1294100A3
Authority
EP
European Patent Office
Prior art keywords
prescaler
output
resampling
noise
providing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP02256053A
Other languages
German (de)
French (fr)
Other versions
EP1294100A2 (en
Inventor
Mika Salmi
Mikael Svard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Oyj
Original Assignee
Nokia Oyj
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Oyj filed Critical Nokia Oyj
Publication of EP1294100A2 publication Critical patent/EP1294100A2/en
Publication of EP1294100A3 publication Critical patent/EP1294100A3/en
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K21/00—Details of pulse counters or frequency dividers
    • H03K21/40—Monitoring; Error detection; Preventing or correcting improper counter operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K21/00—Details of pulse counters or frequency dividers
    • H03K21/08—Output circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/193—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

A resampling technique is used to reduce the noise and improve the signal quality in the output of a prescaler circuit (10). The resampling of the output of a last frequency divider stage is accomplished using at least one flip/flop (FF) (e.g., a D-type FF 18) that is clocked by a signal obtained from the input of the prescaler. This reduces or eliminates the noise caused by edge jitter in the output of the prescaler, as well as the effect of spurious signals generated by the prescaler. These teachings can be used in integer N PLLs and in fractional N PLLs, as well as in single and programmable dual or multi-modulus prescalers. Using this technique the current consumption of the prescaler frequency dividers (12, 14, 16) need not be increased in an effort to reduce the prescaler noise., thereby conserving current in battery powered and other applications.
EP02256053A 2001-09-18 2002-08-30 Method and apparatus for providing resampling function in a modulus prescaler of a frequency source Ceased EP1294100A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US955874 2001-09-18
US09/955,874 US6784751B2 (en) 2001-09-18 2001-09-18 Method and apparatus providing resampling function in a modulus prescaler of a frequency source

Publications (2)

Publication Number Publication Date
EP1294100A2 EP1294100A2 (en) 2003-03-19
EP1294100A3 true EP1294100A3 (en) 2004-07-14

Family

ID=25497475

Family Applications (1)

Application Number Title Priority Date Filing Date
EP02256053A Ceased EP1294100A3 (en) 2001-09-18 2002-08-30 Method and apparatus for providing resampling function in a modulus prescaler of a frequency source

Country Status (2)

Country Link
US (1) US6784751B2 (en)
EP (1) EP1294100A3 (en)

Families Citing this family (18)

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US7012984B2 (en) * 1999-07-29 2006-03-14 Tropian, Inc. PLL noise smoothing using dual-modulus interleaving
US6614870B1 (en) * 2002-07-31 2003-09-02 Agilent Technologies, Inc. Multi-modulus prescaler with synchronous output
US7003274B1 (en) * 2003-03-05 2006-02-21 Cisco Systems Wireless Networking (Australia) Pty Limited Frequency synthesizer and synthesis method for generating a multiband local oscillator signal
US6928127B2 (en) * 2003-03-11 2005-08-09 Atheros Communications, Inc. Frequency synthesizer with prescaler
US7102447B2 (en) * 2004-05-04 2006-09-05 Telefonaktiebolaget L M Ericsson (Publ) XO-buffer robust to interference
US7379522B2 (en) * 2006-01-11 2008-05-27 Qualcomm Incorporated Configurable multi-modulus frequency divider for multi-mode mobile communication devices
US7532049B2 (en) * 2006-10-27 2009-05-12 Agilent Technologies, Inc. Reduced-noise frequency divider system
US20080111597A1 (en) * 2006-11-09 2008-05-15 International Business Machines Corporation Systems and Arrangements for Controlling a Phase Locked Loop
US7782991B2 (en) * 2007-01-09 2010-08-24 Freescale Semiconductor, Inc. Fractionally related multirate signal processor and method
US7899147B2 (en) * 2008-06-02 2011-03-01 Mediatek Singapore Pte. Ltd. Counter/divider, and phase locked loop including such counter/divider
US8165255B2 (en) * 2008-12-19 2012-04-24 Freescale Semiconductor, Inc. Multirate resampling and filtering system and method
US8570076B2 (en) * 2010-07-01 2013-10-29 Qualcomm Incorporated Parallel path frequency divider circuit
CN102637121B (en) * 2011-02-11 2015-11-18 慧荣科技股份有限公司 Division method and devision device
US8406371B1 (en) 2012-01-04 2013-03-26 Silicon Laboratories Inc. Programmable divider circuitry for improved duty cycle consistency and related systems and methods
US8933706B1 (en) * 2012-02-27 2015-01-13 Keysight Technologioes, Inc. Apparatus for measuring frequency change of an oscillator
CN105893992A (en) * 2016-05-31 2016-08-24 京东方科技集团股份有限公司 Fingerprint identification structure and method and display device
US9712176B1 (en) * 2016-06-10 2017-07-18 Silicon Laboratories Inc. Apparatus for low power signal generator and associated methods
US9998129B1 (en) * 2017-09-21 2018-06-12 Qualcomm Incorporated PLL post divider phase continuity

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3806981A1 (en) * 1988-03-03 1989-09-14 Siemens Ag Binary counter
US4891825A (en) * 1988-02-09 1990-01-02 Motorola, Inc. Fully synchronized programmable counter with a near 50% duty cycle output signal
EP0613250A1 (en) * 1993-01-29 1994-08-31 Blaupunkt-Werke GmbH Phase correction circuit for the output signals of a frequency divider
JP2001127629A (en) * 1999-10-25 2001-05-11 Sharp Corp Pll frequency synthesizer circuit

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Publication number Priority date Publication date Assignee Title
US4573023A (en) * 1984-08-07 1986-02-25 John Fluke Mfg. Co., Inc. Multiple-multiple modulus prescaler for a phase-locked loop
US4991187A (en) * 1989-07-21 1991-02-05 Motorola, Inc. High speed prescaler
FI98420C (en) 1995-01-24 1997-06-10 Nokia Mobile Phones Ltd Method and connection to generate a modulated signal in a transmitter / receiver
JP2836555B2 (en) * 1995-12-15 1998-12-14 日本電気株式会社 PLL circuit
FI112131B (en) 1996-02-08 2003-10-31 Nokia Corp Method and circuitry for reducing offset potential in a signal
US6094100A (en) * 1996-05-20 2000-07-25 Sony Corporation PLL synthesizer apparatus
GB2317512B (en) 1996-09-12 2001-01-24 Nokia Mobile Phones Ltd Frequency modulation using a phase-locked loop
US6134285A (en) * 1997-05-28 2000-10-17 Integrated Memory Logic, Inc. Asynchronous data receiving circuit and method
FI108380B (en) * 2000-03-10 2002-01-15 Nokia Corp MÕngbrÕkdivisorf ÷ rskalare
KR100329590B1 (en) * 2000-05-25 2002-03-21 대표이사 서승모 Dual-Modulus Prescaler For RF Frequency Synthesizer
US6385276B1 (en) * 2001-06-12 2002-05-07 Rf Micro Devices, Inc. Dual-modulus prescaler
US6633185B2 (en) * 2001-10-16 2003-10-14 Altera Corporation PLL/DLL circuitry programmable for high bandwidth and low bandwidth applications

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4891825A (en) * 1988-02-09 1990-01-02 Motorola, Inc. Fully synchronized programmable counter with a near 50% duty cycle output signal
DE3806981A1 (en) * 1988-03-03 1989-09-14 Siemens Ag Binary counter
EP0613250A1 (en) * 1993-01-29 1994-08-31 Blaupunkt-Werke GmbH Phase correction circuit for the output signals of a frequency divider
JP2001127629A (en) * 1999-10-25 2001-05-11 Sharp Corp Pll frequency synthesizer circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 2000, no. 22 9 March 2001 (2001-03-09) *

Also Published As

Publication number Publication date
US6784751B2 (en) 2004-08-31
EP1294100A2 (en) 2003-03-19
US20030052740A1 (en) 2003-03-20

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