EP1223585B1 - Tri-layer stack spin polarised magnetic device and memory using the same - Google Patents

Description

Technical area

The present invention relates to a magnetic device spin polarization and stack (s) tri-layer (s) and a memory using this device.

It finds an application in electronics and in particular in the realization of memory points and memory type MRAM ("Magnetic Random Access Memory" or magnetic memory direct access (or random)).

State of the art

MRAM magnetic memories have been renewed with the development of magnetic tunnel junctions (abbreviated MTJ for "Magnetic Tunnel Junction") with a high magnetoresistance at room temperature. The Figures 1A and 1B annexed schematically illustrate the structure and function of such a junction.

The junction bears the reference 2. It is a stack comprising an oxide layer sandwiched between two magnetic layers. This system functions as a spin valve, with the difference that the current flows perpendicular to the plane of the layers. One of the magnetic layers is called "free" because its magnetization can be oriented in an external magnetic field (bidirectional arrow); the other is said "trapped" because its direction of magnetization is fixed by an antiferromagnetic exchange layer (unidirectional arrow). When the magnetizations of the magnetic layers are antiparallel, the strength of the junction is high; when the magnetizations are parallel, the resistance becomes weak. The relative variation of resistance between these two states can reach 40% by an appropriate choice of materials.

The junction 2 is placed between a switching transistor 4 and a current supply line 6. A current flowing in it produces a magnetic field 7. A conductor 8 orthogonal to the current supply line 6 (c) that is to say in this case, perpendicular to the plane of the figure) makes it possible to produce a second magnetic field 9 (located in the plane of the figure).

In the "write" mode ( Fig. 1A ), the transistor 4 is blocked. Currents flow in the current supply 6 and in the conductor 8. The junction 2 is therefore subjected to two orthogonal magnetic fields. One is applied along the axis of difficult magnetization of the free layer, in order to reduce its reversal field, the other being applied along its easy axis in order to cause the reversal of the magnetization and the writing of the memory point . In principle, only the memory point placed at the intersection of the two lines 6 and 8 is likely to turn over, because each magnetic field taken individually is not large enough to cause a tilting of the magnetization.

In the "reading" mode ( Fig. 1B ), the transistor is placed in saturated mode (that is to say that the current passing through it is maximum) by sending a positive current pulse in the base. The current sent in line 6 passes only the memory point whose transistor is open. This current makes it possible to measure the resistance of the junction. By comparison with a reference memory point, the state of the memory point ("O" or "1") can thus be determined.

1. 1) Comme le renversement de l'aimantation de la couche libre d'une jonction se produit sous l'effet de champs extérieurs, et comme les champs de retournement sont statistiquement distribués, il n'est pas impossible de retourner accidentellement certaines jonctions voisines simplement par l'effet du champ magnétique produit le long de la ligne d'adressage 6. Comme, pour des mémoires à haute densité, la taille des points mémoires est nettement submicronique, le nombre d'erreurs d'adressage augmente.
2. 2) La diminution de la taille des points mémoires entraîne une augmentation de la valeur du champ de retournement individuel ; un courant plus important est alors nécessaire pour écrire les points mémoires, ce qui tend à augmenter la consommation électrique.
3. 3) L'écriture nécessitant deux lignes de courant à 90°, la densité d'intégration se trouve limitée par la présence de ces lignes.
4. 4) Le mode d'écriture utilisé ne permet d'écrire qu'un seul point mémoire à la fois, si l'on veut minimiser le risque d'erreur d'adressage.

Such a writing mechanism has drawbacks in particular in a network of junctions:

1. 1) As the reversal of the magnetization of the free layer of a junction occurs under the effect of external fields, and as the turning fields are statistically distributed, it is not impossible to accidentally return some neighboring junctions simply by the effect of the magnetic field produced along the address line 6. As, for high-density memories, the size of the memory points is clearly submicron, the number of addressing errors increases.
2. 2) The decrease in the size of the memory points results in an increase in the value of the individual reversal field; a larger current is then required to write the memory points, which tends to increase the power consumption.
3. 3) Since the writing requires two 90 ° current lines, the integration density is limited by the presence of these lines.
4. 4) The write mode used allows only one memory point to be written at a time, in order to minimize the risk of an error in addressing.

1. a) la résistance du dispositif est si faible qu'il faut injecter un courant très intense pour avoir une tension aux bornes comparable à celle des systèmes anciens,
2. b) une telle intensité nécessite un transistor de grande taille, ce qui limite la densité d'intégration de la mémoire,
3. c) l'amplitude de la variation de résistance obtenue est très faible (2-3%), ce qui limite la tension de sortie,
4. d) dans l'application aux MRAM, le document cité prévoit trois niveaux de conducteurs et deux sources de tension. Un conducteur central a pour but de récupérer le courant polarisé ayant servi au retournement de la couche libre. Le dispositif est donc complexe.

Recently, other types of magnetic devices have appeared where the reverse of the magnetization is no longer produced by external magnetic fields but by electrons crossing the stack perpendicularly to the plane of the layers. These devices are described in the document US Patent 5,695,864 . The mechanism used is based on a transfer of magnetic moment between the electrons on the one hand and the magnetization of the free layer, on the other hand. In such a system, the stack is formed of electrically conductive layers, in order to limit the power dissipated. This results in several disadvantages:

1. a) the resistance of the device is so low that it is necessary to inject a very intense current to have a terminal voltage comparable to that of the old systems,
2. b) such an intensity requires a large transistor, which limits the integration density of the memory,
3. c) the amplitude of the resistance variation obtained is very small (2-3%), which limits the output voltage,
4. d) in the application to MRAMs, the cited document provides for three levels of conductors and two sources of voltage. A central conductor aims to recover the polarized current used to turn the free layer. The device is therefore complex.

The present invention precisely aims to overcome these disadvantages.

US-A-5,966,323 describes a low-field magneto-resistive tunnel junction for high-density networks. EP-A-1,187,103 discloses a magnetoresistive effect device and a memory using this device.

Presentation of the invention

The invention aims to reduce the critical current density from which the reversal of magnetization occurs in the free layer. The work and reflections of the Applicant made it possible to understand that this critical density was linked to the demagnetizing field specific to the free layer. The invention then proposes a device in which this demagnetizing field is very weak or even zero. For this purpose, a three-layer stack (hereinafter referred to as a "tri-layer stack" or simply a "tri-layer" layer) formed of two magnetic layers separated by a non-magnetic conductive layer is used. thickness sufficiently low that the coupling between the two magnetic layers is strong enough that the magnetizations in these layers are antiparallel. Overall, such a system does not present (or little) demagnetizing field. The Applicant qualifies such stacks as "synthetic".

Precisely, the invention therefore relates to a magnetic device according to claim 1.

In one embodiment, the trapped layer is also constituted by a tri-layer stack, this second stack being covered with an antiferromagnetic exchange layer fixing the direction of the magnetizations in said second tri-layer stack.

In another embodiment, the device comprises a third tri-layer stack separated from the first by a non-magnetic conductive layer, this third tri-layer stack resting on a second antiferromagnetic exchange layer fixing the magnetizations in this third tri-layer .

The material of the magnetic layers of the first and / or second and / or the third stack The trilayer is preferably of a material selected from the group consisting of Co, Fe, Ni and their alloys.

The non-magnetic conductive layer of the first and / or second and / or third trilayer stack is preferably a metal selected from the group consisting of Ru, Re, Cu, Cr, Pt, Ag.

The first and / or second antiferromagnetic layer may be an Mn-based alloy (for example FeMn, IrMn, NiMn, PtMn, PtPdMn, RuRhMn).

Brief description of the drawings

• the Figures 1A and 1B , already described, show a known device for writing and reading a binary information in a tunnel magnetic junction by external magnetic fields;
• the figure 2 shows, in section, a first embodiment of a device according to the invention;
• FIGS. 3A and 3B show the orientations of the magnetizations in the different layers according to whether a "0" or "1" has been written for this first embodiment;
• the Figures 4A and 4B show the transient variations of the magnetization component along an axis Oz perpendicular to the plane of the layers and along an axis Oy parallel to the plane of the layers, for a weak and a strong anisotropy;
• the figure 5 shows, in section, a second embodiment of a device according to the invention;
• the Figures 6A and 6B show the orientations of the magnetizations in the different layers according to whether an "O" or a "1" has been written, for this second embodiment;
• the figure 7 schematically shows a memory using a matrix of devices according to the invention.

Description of particular embodiments

With regard to the spin polarization phenomenon for electrons circulating in tunnel junction devices, the following principles can be recalled. An electric current flowing in a conductor consists of electrons whose spin has no reason a priori to be oriented in a particular direction. When this current passes through a magnetic layer having a particular magnetization, the spins will be oriented by magnetic moment exchange phenomena, so that the electrons will emerge from this layer with a polarized spin. Such a layer (or a set of such layers) thus constitutes a "polarizer". This phenomenon can play both in transmission (through the layer) and in reflection (on this layer), depending on the flow direction of the current. It can also act in the opposite direction by preferably passing electrons having a polarized spin in a certain direction. The function of the layer is that of an analyzer.

Turning now to the first embodiment of the invention, it consists in using a tunnel junction formed of two tri-layer stacks disposed on either side of an insulating layer, for example alumina (Al ₂ O ₃ ). One of the three-layers has its magnetization direction fixed by exchange coupling with an antiferromagnetic layer. This layer plays a dual role of polarizer (writing) and parser (writing and reading). The choice of a tri-layer was chosen to eliminate the magnetostatic coupling with the second tri-layer and thus to be able to use the memory without an external compensating field. The other tri-layer is free to orient itself in the spin polarization direction. This layer has a planar anisotropy defining an easy axis and a hard magnetization axis in order to reduce the write time. The thicknesses of the magnetic layers of this tri-layer system are almost equal in order to eliminate the demagnetizing field effect and thus allow the magnetization of this layer to precede easily out of the plane.

In the write mode, a current of density greater than the critical density crossing the junction will cause precession and alignment of the magnetization of the free layer (closest to the oxide barrier) by transfer of the magnetic moment of the electrons polarized at the magnetic moment of the free layer. The voltage appearing at the terminals of the junction makes it possible to follow the magnetic state of the free layer. The writing can be done in direct current or in pulsed current, the duration of the pulse to be adjusted according to the process of reversal of the magnetization.

In the read mode, a current of density less than the critical density crosses the junction and makes it possible to read the magnetic state of the device, which thus behaves like a memory point.

The figure 2 illustrates this first embodiment. As shown, the device comprises two tri-layer (or "synthetic") stacks, respectively 12 and 16, one for the trapped layer (12) and the other for the free layer (16). In the variant illustrated, the device comprises successively, from top to bottom, an antiferromagnetic exchange layer 10, the trapped layer 12, a non-magnetic insulating layer 14, the free layer 16, the assembly referenced 18 forming a magnetic tunnel junction . This junction rests on a conductive substrate 20 and is interposed between a conductor 22 and a transistor 24.

According to the illustrated embodiment, the trapped layer 12 is a tri-layer composed of two magnetic layers 121, 123 separated by a non-magnetic conductive layer 122. Similarly, the free layer 16 is a tri-layer composed of two magnetic layers 161, 163 separated by a non-magnetic conductive layer 162.

In the two tri-layers 12 and 16, the magnetizations of the two magnetic layers are antiparallel, as represented symbolically in the figure by the arrows of alternating directions, arrows which represent the magnetization. This antiparallelism is due to a very strong antiferromagnetic coupling existing between the magnetic layers. The thicknesses of the magnetic layers 121, 123 are advantageously the same in order to have a zero magnetostatic coupling on the free layer 16.

The free layer 16 has characteristics similar to the trapped layer 12. However, not being trapped by exchange, it is free, and sees the direction of its magnetization change when a spin polarized current passes through it. This change is related to the transfer of magnetic moment of the electrons towards the magnetization of the layer.

The barrier 14 is preferably formed of an oxidized or nitrided aluminum layer, and is obtained by methods known to those skilled in the art (plasma oxidation, natural oxidation in situ, atomic oxygen source,. ..). Semiconductor materials may also be employed but the magnetoresistive properties are not as good as with nitrides and oxides.

FIG. 3A illustrates the writing of an "O" and FIG. 3B the writing of a "1". In these figures, the current supply and the transistor have not been shown. The different directions are marked with respect to a trirectangular trihedron Oxyz, the direction Oz being perpendicular to the plane of the layers. Moreover, the Figure 4A shows how the component My of the magnetization of the layer 161 changes sign and the Figure 4B shows the oscillation of the Mz component during the precession movement that accompanies the reversal of the magnetization.

To write a "0", a current (continuous or pulsed) of positive sign, that is to say circulating from top to bottom (hence to the transistor), is circulated in the stack. The electrons see their spin polarized in the layer 123 in the direction (-y). They will transmit their magnetic moment to the moments of the layer 161 whose magnetization will align parallel to that of the layer 123. The layer 163, coupled antiparallel to the layer 161, so will also reorient. During the magnetic moment transfer, the magnetization of the layer 161 will precede around the axis (-y) with a component Mz that will oscillate over time, as shown in FIG. Figure 4B . When the angle of the precession cone exceeds 90 °, the direction of rotation will reverse and the magnetization will realign according to (+ y). The number of precessions required for the reversal depends on the anisotropy of the layer in its plane. When the anisotropy is weak (curves 30 and 32), the inversion requires a large number of oscillations of precessions but a weak critical current. For a stronger anisotropy (curves 31 and 34) the turning time is shorter but a stronger current is needed to overcome the anisotropy.

As said above, the writing can be done in direct current or pulsed. In the case of pulsed current, the duration of the pulse must be long enough for the reversal to be complete. The overturn control can be done by measuring the voltage across the junction. When the magnetizations of the layers 123 and 161 are parallel, the Electron transfer probability by tunnel effect is high and the resistance of the junction is low. If the flipping did not occur completely, the resistance is great. In comparison with the voltage taken at the terminals of a reference junction, the magnetic state of the device is determined. In this magnetic state control step, the 123 (exchange-fixed) layer acts as an analyzer to probe the orientation of the free layer 161.

To write a "1", a current of negative sign is circulated as shown in FIG. 3B. Starting from the state "0", the polarized majority electrons in the layer 161 according to (-y) will cross the layer 123, while the minority electrons polarized according to (+ y) will accumulate in front of the layer 123. Antiparallel spin electrons at layer 161 will transfer their magnetic moment to the moments of layer 41 and cause a precession until the magnetization of layer 161 reverses as shown in FIG. 3B. This magnetic configuration corresponds to the writing of a "1" and the resistance of the junction is maximum.

For reading, a current whose density is less than the critical density is sent and the output voltage is compared with the voltage of a reference junction, in order to determine the magnetic state of the device.

In a second embodiment, the device comprises three tri-layers, two of the tri-layers being disposed on either side of an insulating layer, by example alumina (Al ₂ O ₃ ). One of these tri-layers has its magnetization directions fixed by exchange coupling with an antiferromagnetic layer. This layer plays a dual role of polarizer (writing) and parser (writing and reading). The choice of a tri-layer makes it possible to eliminate the magnetostatic coupling on the second tri-layer and thus to be able to use the memory without an external compensating field. The other tri-layer is free to orient itself in the direction of polarization of the spins. This layer may have a planar anisotropy defining an easy axis and a hard magnetization axis in order to reduce the write time. The thicknesses of the magnetic layers of this system are almost equal in order to eliminate the demagnetizing field effect. The device also comprises a polarizer separated from the tunnel junction by a non-magnetic conductive layer and preferably formed of a tri-layer stack trapped by exchange with an antiferromagnetic layer in order to maintain its direction of magnetization.

The figure 5 illustrates this second embodiment. The three tri-layers bear respectively the references 16, 12 and 32. The third tri-layer 32 is separated from the first 16 by a non-magnetic conductive layer 30. This third tri-layer comprises two magnetic layers 321, 323 separated by a layer non-magnetic conductor 322. It is based on an antiferromagnetic coupling layer 34 which fixes the magnetization in the layer 323, therefore in the layer 321. The third tri-layer 32 is thus of the trapped type, like the second (12). The assembly rests on a conductive substrate 36.

The layer 30 separating the first and third tri-layers may be formed from a noble metal. Its thickness is chosen between 3 and 10 nm to avoid inadvertent magnetic couplings between the tri-layers 16 and 32.

The writing of the magnetic states "1" and "O" is effected, as before, by the choice of the orientation of the direction of the current as shown by the Figures 6A and 6B . The addition of the third tri-layer 32 will stabilize the magnetic states and thus reduce the critical current density by a factor of 2. In the case of writing a "0" ( Figure 6A ), the current biased in the curve 123 according to (-y) (with respect to the same Oxyz trirectangeal trihedron not shown) will cause the alignment of the layer 161 by transfer of the moment of the electrons to the magnetization of the layer 161. At the output of the layer 161, the electrons are always polarized along (-y) and polarize according to (+ y) after passing through the layer 163, without causing the layer 163 to tilt because of the antiferromagnetic exchange between the layers 161 and 163 which is much higher than the coupling exerted by the electrons. Arriving at the level of the layer 321, the majority electrons will accumulate in the layers 30 and 163, which will stabilize the orientation of the layer 163. It can therefore be considered that the polarizer 12 acts by transmission of polarized electrons then that the polarizer 32 acts by reflection of polarized electrons.

For the writing of a "1", the roles of the polarizers are reversed, but the stabilizing and lowering effects of the critical density remain.

The polarizer 32 eliminates the magneto-static coupling field on the layer 16 and also makes it possible to have an identical direction of exchange between the layers 121 and 323 in order to make possible the magnetic ordering of the antiferromagnetic exchange layers 10 and 34. It is indeed difficult to define two opposite directions of exchange in a system using a single type of antiferromagnetic material.

The reading is performed as in the first variant by injecting a current of density less than the critical density and comparing the voltage read to the voltage of a reference junction.

• t est l'épaisseur de la couche magnétique à retourner,
• Ms est l'aimantation à saturation de la couche à retourner, dans le cas de CoFe (Ms=1500 emu/cc)),
• Hk est l'anisotropie de la couche magnétique à retourner,
• Jc (écriture) est la densité de courant pour écrire un point mémoire,
• RA_max est le produit de la résistance par la surface de la jonction tunnel, défini de telle façon que la tension à l'écriture n'excède pas 0,6 V,
• Jc (lecture) est la densité de courant pour une tension de lecture de 0,3 V avec RA_max,
• a_min est la taille minimale d'un côté du point mémoire (pour un point mémoire carré) avant d'atteindre la limite superparamagnétique.

The two embodiments that have just been described can be compared in the table below, where:

• t is the thickness of the magnetic layer to be returned,
• Ms is the saturation magnetization of the layer to be returned, in the case of CoFe (Ms = 1500 emu / cc),
• Hk is the anisotropy of the magnetic layer to be returned,
• Jc (write) is the current density to write a memory point,
• RA _max is the product of the resistance of the tunnel junction surface, defined in such a way that the write voltage does not exceed 0.6 V,
• Jc (reading) is the current density for a reading voltage of 0.3 V with RA _max ,
• a _min is the minimum size of one side of the memory point (for a square memory point) before reaching the superparamagnetic limit.

dans laquelle la valeur 84 est calculée en considérant une durée de fonctionnement de la mémoire de 100 ans à une température de 100°C. Mode de réalisation 1 2 t(nm) 5 5 Ms (emu/cc) 1500 1500 Hk effectif (G) 40 40 Jc (écriture) (A/cm²) 3,2E + 05 1,6E + 05 RA_max (Ohm.µm²) 188 375 Jc (lecture) (A/cm²) 1,6E + 05 8E + 04 a_min (micron) 0,12 0,12 The value of a _min is calculated from the formula: $${\mathrm{at}}_{\min }\mathrm{=}\sqrt{\frac{\mathrm{84}{\mathrm{k}}_{\mathrm{B}}\mathrm{T}}{{\mathrm{M}}_{\mathrm{s}}{\mathrm{H}}_{\mathrm{K}}\mathrm{T}}}$$

wherein the value 84 is calculated considering a running time of the 100-year memory at a temperature of 100 ° C. Mode of realization 1 2 t (nm) 5 5 Ms (emu / cc) 1500 1500 Effective Hk (G) 40 40 JC (writing) (A / cm ² ) 3,2E + 05 1.6E + 05 RA _max (Ohm.μm ² ) 188 375 Jc (reading) (A / cm ² ) 1.6E + 05 8E + 04 a _min (micron) 0.12 0.12

It can be seen from this table that with the invention it is possible to achieve low write current densities compatible with reasonable RA product junctions (> 100 Ω.μm ² ). Such RA products can be obtained either by plasma oxidation or, preferably, by natural oxidation in situ.

The figure 7 finally, shows a memory formed of a matrix of memory points addressable by rows and columns. Each memory point comprises a device according to the invention, with a stack of layers symbolized by a resistor 60 and a switching means 70 constituted by a transistor. Each stack is connected to an address line 80 and the base (or gate) of the transistor to an address column 90. The lines 80 are called "bit lines" and the columns 90 "word lines" (or digit). The lines 80 are connected to the outputs of a line addressing circuit 85 and the columns 90 to the outputs of a column addressing circuit 95.

When a sequence of bits has to be written (for example 100110), the addressing of a column is controlled by a pulse able to open the transistors of the column in question and a current pulse is sent on each line having an appropriate polarity (in the example taken respectively + - ++ -). All the bits are thus written in the column of this memory, simultaneously.

This multiple addressing is possible thanks to the invention since, as explained in the introduction, a memory point can be written without risk of inadvertent writing on neighboring points.

Somewhere in the memory, for example in the center, is a reference column 100, which allows reading. When a reading current flows in the memory points of a column 90, the reading voltage of each point is compared with the voltage read on the memory point of the reference column belonging to the same line.

This column write and read mechanism significantly reduces the memory cycle time.

Claims (11)

1. Magnetic device consisting of:

   • a first magnetic layer called the "anchored" layer (12) which has a fixed magnetisation direction,

   • a second magnetic layer called the "free" layer (16) which has a variable magnetisation direction,

   • an insulating or semiconducting layer (14) which separates the anchored layer from the free layer,

   • means (22, 24) for passing a current of electrons through and perpendicular to the layers,

   • the anchored magnetic layer or the free magnetic layer being able to polarize the spin of said electronics,

   the free magnetic layer (16), at least, consisting of a first tri-layer stack which consists of two magnetic layers (161, 163) with anti-parallel magnetisation, separated by a conducting non-magnetic layer (162), characterized in that the means (22, 24) for passing into the layers and perpendicular thereto an electron current are writing means making an electron current pass through the layers in a first direction and in the opposite direction.
2. Device in accordance with claim 1, in which the said anchored magnetic layer (12) consists of a second tri-layer stack which consists of two magnetic layers (121, 123) with anti-parallel magnetisation, separated by a conducting non-magnetic layer (122), this second stack being covered with a first layer of anti-ferromagnetic exchange (10) which fixes the direction of magnetisation in the said second tri-layer stack (12).
3. Device in accordance with claim 2, including additionally a third tri-layer stack (32) formed of two magnetic layers (321, 323) with anti-parallel magnetisation, separated by a conducting non-magnetic layer (322), this third stack (32) being separated from the first (16) by a conducting non-magnetic layer (30), this third tri-layer stack (32) being mounted on a second anti-ferromagnetic exchange layer (34) which fixes the magnetisation in the said third tri-layer stack (32).
4. Device in accordance with any of claims 1 to 3, in which the two magnetic layers (161, 163), in the first tri-layer stack (16) are of the same thickness.
5. Device in accordance with any of claims 1 to 3, in which the magnetic layers of the first tri-layer stack (16) and/or the second tri-layer stack (12) and/or the third tri-layer stack (32) are made from a material taken from the group formed by Co, Fe, Ni and their alloys.
6. Device in accordance with any of claims 1 to 3, in which the conducting non-magnetic layer of the first tri-layer stack (162), and/or the second tri-layer stack (122) and/or the third tri-layer stack (322) is made from a metal taken from the group formed by Ru, Re, Cu, Cr, Pt, Ag.
7. Device in accordance with either of claims 2 and 3, in which the first anti-ferromagnetic layer (10) and/or the second anti-ferromagnetic layer (34) is made from a Mn-based alloy.
8. Device in accordance with any of claims 1 to 7, wherein the current of electrons has a density greater than a certain critical density.
9. Device in accordance with claim 8, including additionally reading means suitable for passing a current of electrons through the layers, with a density less than the said critical density, and means for measuring the voltage appearing at the terminals of the layer stack terminals.
10. Memory consisting of a matrix of memory cells addressable in rows (80) and columns (90), characterized in that each memory cell consists of a magnetic device (60) in accordance with any of claims 1 to 7, and by a current switching means (70) connected in series with the device (60), each magnetic device (60) being connected to an addressing row (80) and each switching means (70) to an addressing column (90).
11. Memory in accordance with claim 10, including additionally a reference column (100) and means for comparing the voltage read at the terminals of a device located at the intersection between a specific row (80) and a column (90), and the voltage read at the terminals of the device located on the same row (80) but in the reference column (100).

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