EP1101313A1 - Systeme de correction aval des erreurs comprenant des codeurs configures en parallele et/ou en serie - Google Patents

Systeme de correction aval des erreurs comprenant des codeurs configures en parallele et/ou en serie

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Publication number
EP1101313A1
EP1101313A1 EP99938916A EP99938916A EP1101313A1 EP 1101313 A1 EP1101313 A1 EP 1101313A1 EP 99938916 A EP99938916 A EP 99938916A EP 99938916 A EP99938916 A EP 99938916A EP 1101313 A1 EP1101313 A1 EP 1101313A1
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Prior art keywords
shall
code
convolutional
data
wherem
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German (de)
English (en)
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Juan Alberto Torres
Victor Demjanenko
Frederic Hirzel
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Vocal Technologies Ltd
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Vocal Technologies Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0047—Decoding adapted to other signal detection operation
    • H04L1/005—Iterative decoding, including iteration between signal detection and decoding operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0065—Serial concatenated codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0066—Parallel concatenated codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2614—Peak power aspects
    • H04L27/2615—Reduction thereof using coding

Definitions

  • the present invention relates to the use of forward error correction techniques m data transmission over wired and wireless sv stems using an optional Reed-Solomon encoder as an outer encoder and a multiple concatenated convolutional encoder (in se ⁇ al or parallel configuration) as an inner encoder
  • a preferred embodiment of the invention pertains particularly to ADSL svstems. as a representative species of wired-based svstems
  • the invention is based on use of a multiple concatenated convolutional encoder in se ⁇ al or in parallel configuration
  • SMCCC Se ⁇ al Multiple Concatenated Convolutional Code
  • PMCCC Parallel Multiple Concatenated Convolutional Code Tins gives an extra redundancv to the signal a way that improves the performance of the codification (increasing the coding gam)
  • Trellis Coding Modulation constellations of more than 2 points such as Quadrature Amplitude Modulation (QAM), and Quaternary
  • Phase Shift Kevmg (QPSK) are used to mcrease the bit rate at the cost ol smaller Euclidean distances (distance between adjacent points in a signal constellation) Coding techniques are used to decrease transmission errors, when transmitting over power-limited channels
  • Trellis Coding combines coding and modulation to improve bit error rate performance
  • the basic idea behind Trellis Codmg is to introduce controlled redundancy in order to reduce channel error rates What sets Trellis Codes apart is that this technique introduces redundancy by doubling the number of signal points m the
  • the actual (noisv) received signal will tend to be somewhere around the "correct” signal point
  • the receiver chooses the signal point closest to the noisv received signal As more points are added to the signal constellation and the power is kept constant, the probability of error increases, because the Euclidean distance (distance between adjacent signal pomts) "d" is decreased and the receiver has a more difficult job making the co ⁇ ect decision Thus it would make sense, that the Euclidean distance "d" dominates the probability of error expressions
  • Trellis Codmg expands on this concept to increase the Euclidean path distance for a more thorough de ⁇ vation ol the probability of error
  • both error expressions depend on the signal spacing d and that the probability for QPSK errors is higher (not surp ⁇ sing since the signal spacing is smaller)
  • Trellis coding enables us to recover from this increase in probability of error
  • Trellis Coding uses 2 *M possible symbols for the same factor-ot-M reduction of bandwidth (and each signal is still transmitted during the same signaling pe ⁇ od)
  • Trellis Codmg provides controlled redundancy, by doubling the number of signal pomts
  • Trellis codmg defines the way in which signal transitions are allowed to occur (Signal transitions that do not follow this scheme will be detected as errors) This is best explained using the Trellis Coded 8-PSK example
  • the 8-PSK signal constellation is show in Figure 7, where we can see the individual signal pomts
  • the received signal includes noise and will tend to be located somewhere around the state pomts
  • the receiver again has to make a decision based on which signal point is closest and a mistaken output state value will be chosen if the receiver made an incorrect decision
  • Figure 12 show when case “1 " followed by “2” is received instead of the transmitted "7" - “7” sequence
  • the Euclidean distance (see Figure 7 for an illustration of the Euclidean distances and Figure 8 for the Trellis Diagram) for this path is
  • the only remaining error event is the single interval "3" instead of "7" error event, which has a Euclidean distance of 2 (see Figure 7)
  • the minimum Euclidean distances for a trellis is the minimum tree Euclidean distance "d E " (simi to the minimum Iree distance m convolutional coding)
  • d ⁇ l 608
  • Tins is a low coding gain for the amount ol overhead required to handle Trellis coding
  • the present invention compnses forward error correction techniques in data transmission over wired systems using an optional Reed Solomon encoder as an outer encoder and a multiple concatenated convolutional encoder (MCCC) (m se ⁇ al or parallel configuration) as an inner encoder
  • MCCC multiple concatenated convolutional encoder
  • Optional Reed-Solomon outer encoder we mean that it could be present or not
  • ADSL DMT Discrete Multi-Tone, multiple-camer
  • CAP/QAM single-earner
  • other xDSL systems HDSL, VDSL, HDSL2, etc
  • other wired commumcation systems wireless systems and satellite systems
  • ADSL modems are designed to operate between a Central Office CO (or a similar point of presence) and a customer premises CPE As such they use existmg telephone network wiring between the CO and the CPE
  • modems in this class which function in generally similar manner All of these modems transmit their signals usuallv above the voice band As such
  • TCM Trellis Coded Modulation
  • Figure 1 shows a BPSK signal constellation
  • Figure 2 shows a QPSK signal constellation
  • Figure 4 shows a QPSK signal constellation.
  • Figure 8 shows a two-state Trellis 8-PSK system
  • Figure 9 shows an error Event "5" ⁇ "6" in a 2 states Trellis encoding
  • Figure 10 shows an error Event “ 1" ⁇ '6" in a 2 states Trellis encoding
  • Figure 11 shows an error Event "5" ⁇ "2” in a 2 states Trellis encoding
  • Figure 12 shows an error Event "1" -> “2” in a 2 states Trellis encoding
  • Figure 13 shows a four-state Trellis, 8-PSK system
  • Figure 14 shows a se ⁇ al Concatenated (n,k,N) block code
  • Figure 15 shows the action ol a uniform mterleaver of length 4 on sequences of weight 2
  • Figure 16 shows a senally Concatenated (n,k,N) Convolutional code
  • Figure 17 shows a code sequence in A uy
  • Figure 24 shows an analytical bounds for SMCCC4
  • Figure 25 shows a PMCCC
  • Figure 26 shows a transmission svstem structure
  • Figure 27 shows notations in a transmission svstem structure
  • Figure 28 shows a PMCCC of three convolutional codes
  • Figure 29 shows a signal flow graph lor extrinsic information
  • Figure 30 shows an iterative decoder structure tor three parallel concatenated codes
  • Figure 31 shows an iterative decoder structure tor two parallel concatenated codes
  • Figure 32 shows a convergence of turbo coding bit-error probability versus number of iterations for va ⁇ ous Ei No using the SW2-BCJR algo ⁇ thm
  • Figure 33 shows a convergence of turbo coding bit-error probability versus number of iterations for va ⁇ ous Ei No usmg the SWAL2-BCJR algo ⁇ thm
  • Figure 34 shows a bit-error probability as a function of the bit signal-to-noise ratio using the SW2-BCJR and
  • Figure 35 shows a number of iterations to achieve several bit-error probabilities as a function of the bit signal-to-noise ratio using the SWAL2-BCJR algo ⁇ thm
  • Figure 36 shows a Number of iterations to achieve several bit-error probabilities as a function of the bit signal-to-noise ratio usmg the SW2-BC JR algo ⁇ thm
  • Figure 37 shows a basic structure for backward computation m the log-BCJR MAP algo ⁇ thm
  • Figure 38 shows a Trellis Termination
  • Figure 39 shows an example where a block interleaver fails to "break" the mput sequence
  • Figure 42 shows three-code performance
  • Figure 43 shows a compa ⁇ son of SMCBC and PMCBC with va ⁇ ous interleaver lengths chosen so as to yield the same mput decoding delay
  • Figure 44 shows a compa ⁇ son of SMCCC and PMCCC with four-state MCCs
  • PMCCC parallel concatenated convolutional code
  • SMCCC se ⁇ al concatenated convolutional code
  • Figure 47 shows a trellis encoder
  • Figure 48 shows an edge of the trellis section
  • Figure 49 shows the soft-input soft-output (SISO) model.
  • Figure 50 shows the convergence of PMCCC-decodmg bit error probability versus the number of iterations usmg the ASW-SISO algo ⁇ thm.
  • Figure 51 shows the convergence of iterative decoding tor a se ⁇ al concatenated code bit e ⁇ or rate probability versus number of iterations using the ASW-SISO algo ⁇ thm
  • Figure 52 shows a compa ⁇ son of two rate 1/3 PMCCC and SMCCC The curves refer to six and nine iterations of the decoding algo ⁇ tlim and to an equal input decoding delay of 16,384.
  • Figure 53 shows a block diagram for a modem transmitter m accordance with this invention, for the Central Office and for STM tr ⁇ ansport
  • Figure 54 shows a block diagram for a modem transmitter in accordance with this invention, for the Central Office and for ATM transport.
  • Figure 55 shows a block diagram for a modem transmitter in accordance with this invention, for the Remote modem and for STM transport.
  • Figure 56 shows a block diagram for a modem transmitter in accordance with this invention, lor the Remote modem and for ATM transport.
  • Figure 57 shows an ATU-C functional interfaces tor STM transport at the V-C reference point.
  • Figure 58 shows an ATU-C functional interfaces to the ATM laver at the V-C reference point.
  • Figure 59 shows an ATM cell delineation state macnme
  • Figure 69 shows an Example implementation of the Admeasurement
  • Figure 61 shows an ADSL superframe structure - ATU-C transmitter.
  • Figure 62 shows a fast synchronization byte ("fast byte") format - ATU-C transmitter.
  • Figure 63 shows an interleaved synchronization byte ("sync bvte") tormat - ATU-C transmitter.
  • Figure 64 shows a fast data buffer - ATU-C transmitter,
  • Figure 65 shows an mterleaved data buffer, ATU-C transmitter.
  • Figure 66 shows a scrambler
  • Figure 67 shows a tone ordering and bit extraction example (without trellis codmg).
  • Figure 68 shows a tone ordering and bit extraction example (with trellis coding)
  • Figure 69 shows a conversion of u to v and w
  • Figure 70 shows a finite state machine for Wei's encoder
  • Figure 71 shows a convolutional Encoder
  • Figure 72 shows a trellis diagram
  • Figure 74 shows an expansion of point n mto the next larger square constellation.
  • Figure 77 shows a MTPR test
  • Figure 78 shows ⁇ ATU-R functional interfaces for STM transport at the T-R reference point
  • Figure 79 shows an ATU-R functional interfaces to the ATM layer at the T-R reference point
  • Figure 80 shows a fast data buffer - ATU-R transmitter
  • Figure 81 shows an interleaved data buffer - ATU-R fransmitter
  • Figure 82 shows two parallel Concatenated convolutional Encoder
  • Figure 83 shows a conversion of u to v and w m the PMCCC encoder
  • Figure 84 shows a decoder for PMCCC
  • Figure 85 shows the convergence of "constellation" mterleaver for PMCCC
  • Figure 86 shows an interleaver for PMCCC
  • Figure 87 shows a Se ⁇ al Convolutional Concatenated Encoder
  • Figure 88 shows a decoder for SMCCC
  • Figure 89 shows an interleaver for SMCCC
  • Figure 90 shows the Convolutional Concatenated Encoder used for simulations.
  • Figure 91 shows simulations tor PMCCC
  • Figure 92 shows the Convolutional encoder uses for simulations
  • the overall SMCBC is then an (n, k) code, and we will refer to it as the (n, k, N) code C s , including also the mterleaver length
  • the CCs are linear, so that the SMCBC also is lmear and the umform error property applies, I e , the bit-e ⁇ or probability can be evaluated assuming that the all-zero codeword has been transmitted
  • the output- word of the outer code and the mput word of the inner code share the same weight
  • Use of the uniform mterleaver permits the computation of the "average" performance of SMCBCs, mtended as the expectation of the performance of SMCBCs usmg the same MCCs, taken over the ensemble of all rnterleavers of a given length It can be proof the meaningfulness of the average performance, in the sense that there will always be, for each value of the signal-to-noise ratio, at least one particular interleaver yielding performance better than or equal to
  • a c,(W,H) ⁇ AZ' W W H h (1) wh where A ⁇ ,' h i the number of codewords of the SMCBC with weight h associated with an input word of weight w
  • CWEF conditional weight enumerating function
  • each codeword of the outer code C Through the action of the umform mterleaver, enters the mner encoder generatmg ( codewords of the inner code C,
  • the number A w ' h of codewords of the SMCBC of weight h associated with an input word of weight w is given by
  • a c ° (W ⁇ I) is the conditional weight dist ⁇ bution of the input words that generate codewords of the outer code of weight
  • A(l, H,j) ⁇ A lkj H h (11 ) h be the weight enumerating function of sequences of the convolutional code that concatenate j error events with total mput weight / (see Figure 17), where A ihj is the number of sequences of weight h, mput weight /, and number of concatenated error events 7
  • the coefficient A ⁇ h °f me equivalent block code can be approximated (this assumption permits neglecting the length of e ⁇ or events compared to N , which also assumes that the
  • N N/p de ⁇ ves from the fact that the code has rate p/n, and thus N bits corresponds to N/p mput words or, equivalently, trellis steps
  • ⁇ M the largest number of e ⁇ or events concatenated in a codeword of weight /; and generated by a weight / mput sequence, is a function of ⁇ and / that depends on the encoder
  • d°/ is the free distance of the outer code
  • free distance d/ we mean the minimum Hamming weight of error events for convolutional CCs and the mmimum Flamming weight of codewords for block CCs
  • n' M and n°M are the maximum number of concatenated error events in codewords of the mner and outer code of weights h m and /, respectively, the following inequalities hold true
  • Equation (21 ) shows that the exponent of N co ⁇ espondmg to the mmimum weight of SMCCC codewords is always negative for 2 ⁇ df , thus cordmg an mterleaver gam at high Ei No Substitution of the exponent a (h mto Expression (16) truncated to the first term of the summation m h yields hm P effet(e) _ ⁇ B m N
  • W m is the set of mput weights w that generates codewords of the outer code with weight (h m ) Expression (22) suggests the following conclusions
  • the mmimum weight of mput sequences generating e ⁇ or events is 2 As a
  • an mput sequence of weight / can generate at most e ⁇ or events
  • Equation (29b) w M jis the maximum mput weight yielding outer codewords with weight equal to d°, , ⁇ d A' is the number of such codewords
  • N°f and wuj should be minimized
  • SMCBCs obtamed as follows a) The first is the (7m, 3m, N) SMCBC, b) The second is a (15m, 4m, N) SMCBC usmg as outer code a (5, 4) pa ⁇ tv-check code and as inner code a (15, 5) Bose-Chaudhu ⁇ -Hocquenghem (BCH) code, c) The third is a (15m, 4m, N) SMCBC using as outer code a (7, 4) Hamming code and as inner code a (15, 7) BCH code
  • SMCCC 1 is a (3.1.N) SMCCC, usmg as outer code a four-state (2,1 ) recursive, systematic convolutional encoder and as inner code a four-state (3,2) recursive, systematic convolutional encoder
  • SMCCC2 is a (3,1,N) SMCCC, usmg as outer code the same four-state (2,1 ) recursive, systematic convolutional encoder as SMCCC 1, and as mner code a four-state (3,2) nonrecursive convolutional encoder
  • SMCCC3 is a (3,1,N) SMCCC, usmg as outer code a four-state (2,1) nonrecursive, convolutional encoder, and as mner code the same four-state (3,2) recursive, systematic convolutional encoder as SMCCC 1
  • SMCCC4 is a (6,2,N) SMCCC usm
  • PMCCC Parallel Multiple Concatenated Convolutional Code
  • PMCCC Parallel Multiple Concatenated Convolutional Code
  • the algonthms work in a sliding window form (like the Viterbi algo ⁇ thm) and can thus be used to decode contmuously transmitted sequences obtamed by PMCCC, without requinng code trellis termination
  • a heu ⁇ stic explanation is also given of how to embed the maximum a posteno ⁇ algonthms into the iterative decoding of PMCCC
  • the performances of the two algo ⁇ thms are compared on the basis of a powerful rate 1/3 PMCCC Basic circuits to implement the simplified a postenon decoding algo ⁇ thm usmg lookup tables, and two further approximations (linear and threshold), with a very small penalty, to eliminate the need for lookup tables are proposed
  • the broad framework of this analysis encompasses digital transmission systems where the received signal is a sequence of waveforms whose co ⁇ elation extends well beyond T, the signaling pe ⁇ od
  • co ⁇ elation such as codmg, lntersymbol interference (ISI), or co ⁇ elated fading
  • ISI lntersymbol interference
  • the optimum receiver m such situations cannot perform its decisions on a svmbol-by-symbol basis, so that deciding on a particular information symbol U k involves processing a portion of the received signal Tj seconds long, with Tj>T
  • the final aim is to find suitable soft-output decoding algonthms for iterated staged decodmg of PMCCC employed in a continuous transmission
  • Both source and code sequences are defined over a tune index set K (a finite or infinite set of integers)
  • the code C can be wntten as a subset of the Cartesian product of C by itself K times, ⁇ e , C c C f
  • the channel symbols obviouslye transmitted over a stationary memorvless channel with output symbols vi
  • the channel is characte ⁇ zed bv the transitions probability dist ⁇ bution (discrete or continuous, according to the channel model) P ( ⁇ x)
  • the BC JR is the optimum algo ⁇ thm to produce the sequence of APP
  • the notations u, c, x, and v will refer to sequences n-svmbols long, and the mteger time va ⁇ able A will assume the values 1, ,n
  • the encoder admits a trellis representation with N states, so that the code sequences c (and the co ⁇ esponding transmitted signal sequences x) can be represented as paths in the trellis and uniquely associated with a state sequence 5 - (so. ,SN) whose first and last states, so and SH , are assumed to be known by the decoder
  • the demodulator supplies to the decoder the "branch met ⁇ cs" ⁇ k of Equation (38), and the decoder computes the probabilities c tk according to Equation (40)
  • the obtained values of a (S, ) as well as the ⁇ k are stored for all A, s, , and x (3)
  • the decoder recursively computes the probabilities ⁇ k accordmg to the recursion of Equation (42) and uses them together with the stored a's and ⁇ s to compute the a poste ⁇ o ⁇ transition probabilities a. k (S, , ) according to Equation (37) and, finally, the APP P k (u ⁇ y) from Equation (36)
  • the BCJR algo ⁇ thm requires that the whole sequence have been received before starting the decoding process In this aspect, it is similar to the Viterbi algonthm in its optimum version To apply it in a PMCCC, we need to subdivide the information sequence into blocks, decode them bv terminating the trellises of both CCs, and then decode the received sequence block bv block Bevond the ⁇ giditv, this solution also reduces the overall code rate
  • a more flexible decodmg strategy is offered by a modification of the BCJR algonthm in which the decoder operates on a fixed memory span, and decisions are forced with a given delay D
  • SW-BCJR sliding wmdow BCJR
  • the SW1-BCJR algo ⁇ thm requires storage of N ⁇ D values of ⁇ 's and M > ⁇ D values of the probabilities ⁇ k (x) generated by the soft demodulator Moreover, to update the ⁇ 's and ⁇ 's for each time instant, the algo ⁇ thm needs to perform
  • the Viterbi algonthm would require, in the same situation, Mx2 ko additions and Afx2 ko -way compansons, plus the trace-back operations, to get the decoded bits
  • This version of the slidmg window BCJR algonthm does not require storage of the N x D values of a's as thev are updated with a delay of D steps As a consequence, only N values of a's and M*D values of the probabilities ⁇ k (x) generated by the soft demodulator must be stored
  • the computational complexity is the same as the previous version of the algonthm
  • a k (S,) log fa k (S,)J
  • ⁇ k(S, . ) A k .,(S,) Tk(x(S, , )) + B k (S7 ( )) + Hz (52) with the following initializations
  • B k (S,) max [ B k+ ⁇ (ST( )) + r k + ⁇ (ST(u)) ⁇ + H B (55)
  • ⁇ k (S, ,u) A k .i(S,) + T k (x(S suru)) + B k (S7 (u)) + Hz (56) with the same initialization of the log-BCJR
  • Both versions of the SW-BCJR algonthm descnbed can be used, with obvious modifications, to transform the block log-BCJR and the AL-BCJR mto their slidmg wmdow versions, leadmg to the SW-log-BCJR and the SWALl-BCJR euid SWAL2-BCJR algo ⁇ thms 1 3 4 Explicit Algo ⁇ thms for Some Particular Cases
  • ⁇ k(S,,u) Ak- ⁇ (S,)+ ⁇ c m (S,,u)( ⁇ km + N km ) + Bk(St(u)) (63) where A stands for the loga ⁇ thm of the co ⁇ espondmg quantity ⁇ 1342.
  • Equation (68) ⁇ P(y 0 ⁇ u) P( y ⁇ ⁇ u) P(y 2 ⁇ u) P(y 3 ⁇ u) .
  • k 0 but, m practice, we cannot compute Equation (68) for large n because the permutations ⁇ S , ⁇ j imply that vi and .vj are no longer simple convolutional encodmgs of u
  • the MAP algo ⁇ thm approximates a nonseparable dist ⁇ bution with a separable one, however it is not clear ho good it is compared with the Kullback cross-entropy mnumizer
  • the iterative decodmg as the reliability of the fu k ⁇ improves mtuitiveh one expects that the cross-entropv between the input and the output of the MAP algo ⁇ thm will decrease, so that the approximation will unprove
  • 1 e Equation
  • Equation (69) can be obtamed
  • ⁇ lk by
  • Equation (69) f(y 2 - ⁇ o ⁇ ⁇ i ⁇ ⁇ 3 . k) + Lok " I + L 3k (73) and similarly,
  • the overall decoder is composed of block decoders D , connected m parallel, as in Figure 30 (when the switches are m position P), which can be implemented as a pipeline or by feedback
  • a se ⁇ al implementation is also shown in Figure 30 (when the switches are in position 5
  • jT 0 0
  • o 0 m ⁇ consider vo as part of v; If the systematic bits are dist ⁇ aded among encoders, we use the same dist ⁇ bution for yo among the received observations tor MAP decoders
  • Equation (77) For turbo codes with only two constituent codes, Equation (77) reduces to
  • FIG. 37 shows the implementation of Equation (50) for the forward recursion usmg a lookup table for evaluation of log(l+e" ), and subtraction of max A k fS J ⁇ from AkjS J is used for normalization to prevent buffer overflow
  • the circuit for maximization can be implemented simply by usmg a comparator and selector with feedback operation
  • Figure 38 shows the implementation of Equation (51 ) for the backward recursion, which is similar to Figure 37
  • a circuit for computation of log(P k (u ⁇ y)J from Equation (36) usmg Equation (52) for final computation of bit reliability is shown m
  • the encoder in Figure 28 may generate a n(N + M), N) block code, where the M tail bits of encoder 2 and encoder 3 are not transmitted Since the component encoders are recursive, it is not sufficient to set the last M information bits to zero in order to d ⁇ ve all the encoder to the all zero state, l e to terminate the trellis
  • the termination (tail) sequence depends on the state of each component encoder after N bits, which makes it impossible to terminate the component encoders with just Mbits This issue has not been resolved m previously proposed turbo code implementations Fortunately, the simple stratagem illustrated in Figure 33 is sufficient to terminate the trellis at the end of the block (The code shown is not important) Here the switch is m position "A" for the first N clock cycles and is in position "B" for M additional cycles, which will flush the encoders with zeros The decoder does not assume knowledge of the hi tail bits
  • the same termination method may be used for all encoders
  • each t is defined as a multiple of 1/3 If any U is not an integer, the co ⁇ esponding encoded output will have a high weight because then the convolutional code output is non-terminating (until the end of the block) If all /,'s are mtegers, the total encoded weight will be 14+2 ⁇ - ⁇ 3 /, Thus, one of the considerations m designing the mterleaver is to avoid integer t ⁇ plets (/;, h, ts) that are simultaneously small in all three components In fact, it would be nice to design an mterleaver to guarantee that the smallest value of ⁇ -i 3 /, (for integer /,) grows with the block size N
  • the bad we ⁇ ght-3 data sequences have a small probability of being matched with bad we ⁇ ght-3 permuted data sequences, even in a two-code system
  • l-(l-(6/N 2 ) q'l * (6/N)(6/N 2 ) q This implies that the minimum distance codeword of the turbo code m Figure 28 is more likely to result from a weight-2 data sequence of the form ( ..001001000.
  • Block interleavers are effective if the low-weight sequence is confined to a row
  • low-weight sequences (which can be regarded as the combination of lower weight sequences) are confined to several consecutive rows, then the ⁇ c columns of the mterleaver should be sent in a specified order to spread as much as possible the low- weight sequence
  • the sequence 1001 will still appear at the mput of the encoders for anv possible column permutation Onlv if we permute the rows of the mterleaver m addition to its columns it is possible
  • the PMCCC is a rate 1/3 code obtained concatenating two equal rate 1/2, four-state systematic recursive convolutional codes with a generator matrix as in the first row of Table 2.
  • the SMCBC is a rate 1/3 code. It is form using as an outer code the same rate 1/2, four-state code as in the PMCCC and, as an inner code, a rate 2/3, four-state systematic recursive convolutional code with a generator matrix as in the third row of Table 2.
  • the interleaver lengths have been chosen so as to yield the same decoding delay, due to the interleaver, in terms of input bits. The results are shown in Figure 44, where we plot the bit-e ⁇ or probability versus the signal-to-noise ratio Et/No for various input delays.
  • SISO soft-input soft-output
  • FIG. 45 The block diagram of a PMCCC is shown in Figure 45 (a) (the same construction also applies to block codes).
  • a rate 1/3 PMCCC is obtained using two rate 1/2 constituent codes (CCs) and an interleaver.
  • CCs constituent codes
  • interleaver For each input information bit, the codeword sent to the channel is formed by the input bit, followed by the parity check bits generated by the two encoders.
  • Figure 45 (b) the block diagram of the iterative decoder is also shown. It is based on two modules denoted by "SISO,” one for each encoder, an interleaver, and a deinterleaver performing the inverse permutation with respect to the interleaver.
  • the SISO module is a four-port device (quadriport), with two inputs and two outputs.
  • quadriport accepts as inputs the probability distributions of the information and code symbols labeling the edges of the code trellis, and forms as outputs an update of these dist ⁇ butions based upon the code constraints
  • Figure 45 (b) can be seen that the updated probabilities of the code symbols, are never used by the decodmg algonthm 2 22 Senallv Multiple Concatenated Codes
  • FIG. 46 (a) The block diagram of a SMCCC is shown m Figure 46 (a) (the same construction also applies to block codes)
  • a rate 1/3 SMCCC is obtamed usmg as an outer encoder a rate 1/2 encoder, and as an mner encoder a rate 2/3 encoder
  • An mterleaver permutes the output codewords of the outer code before passmg them to the inner code
  • the block diagram of the iterative decoder is shown It is based on two modules denoted by "SISO", one for each encoder, an mterleaver, and a deinterleaver
  • the SISO module is the same as desc ⁇ bed before In this case, though, both updated probabilities of the input and code symbols are used m the decoding procedure 2 2 3 Soft-Output algo ⁇ thms
  • the SISO module is based on MAP algo ⁇ thms
  • These algo ⁇ thms perform both forward and backward recursions and, thus, require that the whole sequence be received before starting the decoding operations As a consequence, they can onlv be used m block-mode decodmg
  • the memory requirement and computational complexity grow linearly with the sequence length
  • Some algo ⁇ thms require only a forward recursion, so that it can be used in continuous-mode decoding However, its memory and computational complexity grow exponentially with the decoding delav
  • va ⁇ ous forms of suboptunum soft-output algo ⁇ thms can be used Two approaches have been taken The first approach tnes to modify
  • the dynamics of a time-inva ⁇ ant convolutional code are completely specified by a smgle trellis section, which descnbes the transitions (edges) between the states of the trellis at time instants A and k +1
  • a Trel sO section is characterized by the following
  • the SISO module is a four-port device that accepts at the mput the sequences of probability dist ⁇ butions P (c, I) P (u, I) and outputs the sequences of probability dist ⁇ butions P (c, O) P (u, O) based on its mputs and on its knowledge of the trellis section (or code m general)
  • the algo ⁇ thm by which the SISO operates in evaluating the output dist ⁇ butions will be explained in two steps In the first step, we consider the following algo ⁇ thm
  • the new probability dist ⁇ butions P k (u.O) and P k (c.O) represent a smoothed version of the input dist ⁇ butions P k
  • bit extnnsic information is de ⁇ ved from the symbol ext ⁇ nsic information usmg Equations (84) and (85)
  • a rate A ⁇ / ⁇ 0 trellis encoder such that each input symbol U compnses of k 0 bits and each output symbol C compnses ot n culinary bits
  • Equation (86) is not used for those encoders in a concatenated coded system connected to a channel
  • Pk c(e),I] is not represented as a product
  • SW-SISO Sliding- Window Soft-Input Soft-Output Module
  • SW-SISO s ding-wmdow soft-input soft-output
  • SW-SISOl First Version of the Shding-Window SISO Algo ⁇ thm
  • SW-SISQ2 Second Simplified Version of the Shding-Window SISO Algonthm
  • Equations (84) and (85) and Equations (80) and (81) becomes the following-
  • the quantities h c and ⁇ -- are normalization constants needed to prevent excessive growth of the nume ⁇ cal values of the a's and ⁇ 's
  • Equation (101) To evaluate a in Equation (101), we can use two approximations, with mcreasmg accuracy (and complexity)
  • Equation (101) can be written as * faj.
  • the second term, ⁇ ( ai , a ,. .. a ⁇ ) is called the co ⁇ ection term and can be computed using a look-up table, as discussed above
  • max can be replaced by max* in Equations (103) through (106)
  • the overall PMCCC forms a very powerful code for possible use in applications requinng reliable operation at very low signal-to-noise ratios
  • the performance of the continuous iterative decodmg algo ⁇ thm, applied to the concatenated code, is obtamed bv simulation, using the ASW-SISO and the look-up table algonthms It is shown in Figure 50, where we plot the bit-e ⁇ or probability as a function of the number of iterations of the decodmg algo ⁇ thm for va ⁇ ous values of the bit signal-to-noise ratio, E b No It can be seen that the decoding algo ⁇ thm converges up to an e ⁇ or probability of 10 5 , for signal-to-noise ratios of 0 2 dB with nine iterations Moreover, convergence is guaranteed also at signal-to-noise ratios as low as 0 05 dB, which is
  • G(D) [ 1 + D + D 3 1 + D J and as an inner code, the rate 1/2, 8-state recursive encoder with generating matrix
  • the resulting SMCCC has rate 1/4
  • the mterleaver length has been chosen to ensure a decodmg delav in terms of mput mformation bits equal to 16,384
  • Figures 53, 54, 55 and 56 are models for facilitating accurate and concise DMT signal waveform desc ⁇ ptions
  • DMT sub-earner ⁇ defined in the frequency domam
  • x consumer is the w" 1 IDFT output sample (defined m the time domam)
  • the DAC and analog processing block construct the contmuous transmit voltage waveform co ⁇ espondmg to the discrete digital input samples More precise specifications for these analog blocks a ⁇ se indirectly from the analog transmit signal linea ⁇ ty and power spectral density specifications
  • the use of Figures 53, 54, 55 and 56 as a transmitter reference model allows all initialization signal waveforms to be desc ⁇ bed through the sequence of DMT symbols, ⁇ Z, ⁇ , required to produce that signal Allowable differences in the characte ⁇ stics of different digital to analog and analog processing blocks will produce somewhat different contmuous-time voltage waveforms for the same initialization signal 3 1
  • ATU-C transmitter reference models ATM and STM are application options ATU-C and A
  • ATM cell transport 3 1 1 ATU-C transmitter reference model for STM transport
  • Figure 53 is a block diagram of an ADSL Transceiver Unit-Central office (ATU-C) transmitter showing the functional blocks and interfaces for the downstream transport of STM data
  • ATU-C ADSL Transceiver Unit-Central office
  • the basic STM transport mode is bit se ⁇ al
  • the framing mode used determines if byte bounda ⁇ es, if present at the
  • V-C interface shall be preserved Outside the ASx/LSx senal interfaces data bvtes are transmitted MSB first All se ⁇ al processing in the ADSL frame (e g , CRC, scrambling, etc ) shall, however, be performed LSB first, with the outside world MSB considered bv the ADSL as LSB As a result, the first incoming bit (outside world MSB) shall be the first processed bit inside the ADSL (ADSL LSB)
  • ADSL equipment shall support at least bearer channels AS0 and LS0 downstream Support of other bearer channels is optional Two paths are shown between the Mux/Svnc control and Tone orde ⁇ ng, the "fast" path provides low latencv the interleaved path provides verv low e ⁇ or rate and greater latency
  • An ADSL system supporting STM shall be capable of operatmg m a dual latencv mode for the downstream direcUon, m which user data is allocated to both paths (1 e fast and mterleave
  • FIG 54 is a block diagram of an ADSL Transceiver Unit-Central office (ATU-C) transmitter showing the functional blocks and interfaces that are referenced in ITU-T G 992 1 Recommendation for the downstream transport of ATM data Byte bounda ⁇ es at the V-C interface shall be preserved m the ADSL data frame.
  • ATU-C ADSL Transceiver Unit-Central office
  • ADSL frame (e g , CRC, scrambling, etc ) shall, however, be performed LSB first, with the outside world MSB considered by the ADSL as LSB
  • the first incoming bit (outside world MSB)
  • the CLP bit of the ATM cell header will be earned in the MSB of the ADSL frame byte (l e , processed last)
  • ADSL equipment shall support at least bearer channel ASO downstream)
  • Two paths are shown between the Mux/Svnc control and Tone ordermg, the "fast" path provides low latency, the interleaved path provides very low e ⁇ or rate and greater latency
  • An ADSL system supporting ATM transport shall be capable of operatmg m a smgle latency mode, m which all user data is allocated to one path (l e fast or interleaved)
  • ATM and STM are application options ATU-C and ATU-R may be configured for either STM bit sync transport or ATM cell transport 3 2 1 ATU-R transmitter reference model for STM transport
  • Figure 55 show a block diagram of an ATU-R transmitter showing the functional blocks and interfaces that are referenced m this Recommendation tor the upstream transport of STM
  • the basic STM transport mode is bit se ⁇ al
  • the framing mode used determines if byte boundanes, if present at the V-C interface, shall be preserved Outside the LSx senal interfaces data bvtes are MSB transmitted first All se ⁇ al processing m the ADSL frame (e g , CRC, scrambling, etc ) shall, however, be performed LSB first, with the outside world MSB considered by the ADSL as LSB As a result, the first incoming bit (outside world MSB) will be the first processed bit mside the ADSL (ADSL LSB) ADSL equipment shall support at least bearer channel LSO upstream Two paths are shown between the Mux/Sync control and Tone ordermg, the "fast" path provides low latency, the interleaved path provides very low e ⁇ or rate and greater latency An ADSL system supportmg STM shall be capable of operating in a dual latency mode for the downstream direction, m which user data is allocated to both paths (l e fast
  • FIG. 56 show a block diagram ot an ATU-R transmitter showing the functional blocks and interfaces that are referenced in this Recommendation for the upstream transport of ATM data
  • Byte bounda ⁇ es at the T-R interface shall be preserved in the ADSL data trame Outside the LSx senal interlaces data bvtes are transmitted MSB first in accordance with ITU-T Recommendations I 361 and 1432 All se ⁇ al processing m the ADSL frame (e g CRC, scrambling etc ) shall however, be performed LSB first with the outside world MSB considered bv the ADSL as LSB As a result the first incoming bit (outside world MSB) will be the first processed bit inside the ADSL (ADSL LSB), and the CLP bit of the ATM cell header will be earned m the MSB of the ADSL frame bvte (1 e , processed last) ADSL equipment shall support at least bearer channel LSO upstream Two paths are shown between the Mux/Sync control
  • An ADSL system may transport up to seven user data streams on seven bearer channels simultaneously up to four independent downstream simplex bearers (unidirectional from the network operator (I e V-C interface) to the CI (I e T-R interface))
  • An ADSL system may transport up to three duplex bearers (bi-directional between the network operator and the CI)
  • the three duplex bearers may alternatively be configured as independent unidirectional simplex bearers, and the rates of the bearers m the two chrections (network operator toward CI and vice versa) do not need to match
  • All bearer channel data rates shall be programmable m any combmation of integer multiples ot 32 kbit/s
  • the ADSL data multiplexing format is flexible enough to allow other transport data rates, such as channelizations based on existmg 1 544 Mbit/s, but the support of these data rates (non-mteger multiples of 32 kbit/s) will be limited by the ADSL system's available capacity for synchronization
  • the maximum net data rate transport capacity of an ADSL system will depend on the characteristics of the loop on which the system is deployed, and on certam configurable options that affect overhead
  • the ADSL bearer channel rates shall be configured during the initialization and training procedure
  • the transport capacity of an ADSL system per se is defined only as that of the bearer channels When, however, an ADSL system is mstalled on a lme that also carnes POTS or ISDN signals the overall capacity is that of POTS or ISDN plus ADSL
  • An ATU-x shall be configured to support STM transmission or ATM transmission Bearer channels configured to transport STM data can also be configured to carry ATM data ADSL equipment may be capable of simultaneously supporting both ATM and STM transport
  • an ADSL system may transport a Network Timing Reference (NTR) 3 3 1 Transport of STM data
  • ADSL systems transporting STM shall support the simplex bearer channel ASO and the duplex bearer channel LSO downstream Bearer channels ASO, LSO, and any other bearer channels supported shall be mdependently allocable to a particular latency path as selected by the ATU-C at start-up
  • the system shall support dual-latency downstream
  • ADSL systems transporting STM shall support the duplex bearer channel LSO upstream using a single latency path Bearer channel
  • ASO shall support the transport of data at all mteger multiples of 32 kbit/s from 32 kbit/s to 6144 kbit/s
  • Bearer channel LSO shall support 16 kbit/s and all integer multiples of 32 kbit/s from 32 kbit/s to 640 kbit/s
  • thev shall support the range of integer multiples of 32 kbit/s shown in Table 4 Support for data rates based on non-integer multiples of 32 kbit s is also optional Table 4 shows the required 32 kbit/s integer multiples for transport ol STM Table 4 Required 32 kbitts integer multiples tor transport of STM
  • Table 5 illustrates the data rate terminology and definitions used for STM transport Table 5 Data Rate Terminology for STM transport
  • STMdata rate "Net data rate” ⁇ (B ⁇ ,B F ) X 32 ASx + LSx (NOTE)
  • Total data rate Lme rate ⁇ b , X 4 U overhead rate
  • An ADSL system transporting ATM shall support the single latency mode at all integer multiples of 32kb ⁇ t/s up to
  • ATM data shall be mapped to bearer channel ASO m the downstream direction and to bearer channel LSO m the upstream direction
  • ASO m the downstream direction
  • LSO m the upstream direction
  • One of three different “latency classes” may be used Smgle latency, not necessanly the same for each direction of transmission, Dual latency downstream, single latency upstream, Dual latency both upstream and downstream
  • ADSL systems transporting ATM shall support bearer channel ASO downstream and bearer channel LSO upstream, with each of these bearer channels independently allocable to a particular latency path as selected by the ATU-C at start-up Therefore, support of dual latency is optional for both downstream and upstream
  • onlv bearer channel ASO shall be used, and it shall be allocated to the appropnate latencv path
  • downstream ATM data are transmitted through both latency paths (I e , 'fast' and 'interleaved')
  • onlv bearer channels ASO and ASl shall be used, and thev shall be allocated to different latencv paths
  • upstream ATM data are transmitted through a single latencv path (I e , 'fast' only or 'interleaved' onlv)
  • onlv bearer channel LSO shall be used and it shall be allocated to the appropnate latencv path
  • the choice of the fast or interleaved path mav be made mdependentlv ot the choice for the downstream data
  • upstream ATM data are transmitted through both latency paths (1 e , 'fast' and 'mterle
  • Bearer channel ASO shall support the transport ot data at all integer multiples of 32 kbit/s from 32 kbit/s to 6144 kbit/s
  • Bearer channel LSO shall support all integer multiples of 32 kbit/s from 32 kbit/s to 640 kbit/s Support for data rates based on non-integer multiples of 32 kbit/s is also optional
  • thev shall support the range of integer multiples ot 32 kbit/s shown in Table 4 Data rates based on non-integer multiples of 32 kbit/s is optional
  • Bearer channels AS2, AS3 and LS2 shall not be provided for an ATM based ATU-x
  • Table 6 illustrates the data rate terminology and defimtions used for ATM transport Table 6- Data Rate Terminology for ATM transport
  • Trellis Coding overhead Lme rate ⁇ b ⁇ X 4 U rate
  • the total bit rate transmitted by the ADSL system when operatmg in an optional reduced-overhead framing mode shall include capacity for the data rate transmitted m the ADSL bearer channels and ADSL system overhead (which includes an ADSL embedded operations channel, EOC, an ADSL overhead control channel, AOC, CRC check bytes, fixed mdicator bits for OAM, FEC redundancy bytes)
  • ADSL system overhead which includes an ADSL embedded operations channel, EOC, an ADSL overhead control channel, AOC, CRC check bytes, fixed mdicator bits for OAM, FEC redundancy bytes
  • the total bit rate shall also include capacity for the synchronization control bytes and capacity for bearer channel synchronization control
  • An ATU-C may support STM transmission or ATM transmission or both Framing modes that shall be supported, depend upon the ATU-C be g configured for either STM or ATM transport If framing mode k is supported, then modes k- 1 , , 0 shall also be supported
  • the ATU-C and ATU-R shall indicate a framing mode number 0, 1, 2 or 3, which thev intend to use The lowest indicated framing mode shall be used
  • Usmg framing mode 0 ensure than an STM based ATU-x with an external ATM TC will mteroperate with an ATM based ATU-x Additional modes of interoperation are possible depending upon optional features provided in either ATU-x
  • NTR Network Timing Reference
  • LSO Three input and output data interfaces are defined at the ATU-C for the duplex channels supported by the ADSL system, LSO, LSI, and LS2 (LSx in general) LSO is also known as the "C" or control channel It car ⁇ es the signaling associated with the ASx bearer channels and it may also carry some or all of the signaling associated with the other duplex bearer channels 3 4 1 4 Payload transfer delav
  • the one-way transfer delay for payload bits m all bearers (simplex and duplex) from the V reference pomt at central office end (V-C) to the T reference pomt at remote end (T-R) for channels assigned to the fast buffer shall be no more than 2 ms
  • An ATU-C configured for STM transport shall support the full overhead frammg structure 0
  • the support of full overhead frammg structure 1 and the reduced overhead frammg structures 2 and 3 is optional Preservation of V-C mterface byte bounda ⁇ es (if present) at the U-C mterface may be supported for any of the U-C interface frammg structures
  • An ATU-C configured for STM transport may support insertion of a Network Tuning Reference (NTR) 3 42 ATM Transmission Protocol Specific functionalities
  • the functional data interfaces at the ATU-C for ATM is shown m Figure 58
  • the ATM channel ATM0 shall alwavs be provided, the channel ATM1 may be provided for support of dual latency mode
  • Each channel operates as an mterface to a physical layer pipe
  • no fixed allocation between the ATM channels 0 and 1 on one hand and transport of 'fast' and 'mterleaved' data on the other hand is assumed This relationship is configured inside the ATU-C
  • Flow control functionality shall be available on the V reference point to allow the ATU-C (l e the physical layer) to control the cell flow to and from the ATM layer.
  • This functionality is represented by Tx_Cell_Handshake and
  • Rx_Cell_Handshake A cell may be transfe ⁇ ed from ATM to PHY layer only after the ATU-C has activated the
  • Tx_Cell_Handshake Similarly a cell may be transfe ⁇ ed from the PHY laver to the ATM layer only after the Rx_Cell_Handshake This functionalitv is important to avoid cell overflow or underflow in the ATU-C and ATM layers
  • the one-way transfer delav (excluding cell specific functionalities) tor pavload bits in all bearers (simplex and duplex) from the V reference point at central office end (V-C) to the T reference point at remote end (T-R) for channels assigned to the fast buffer shall be no more than 2 ms
  • Idle cells shall be inserted in the transmitter direction for cell rate de-coupling. Idle cells are identified by the standardized pattern for the cell header given in ITU-T Recommendation 1.432. 3.4.2.3.2. Header E ⁇ or Control (HEC) Generation.
  • HEC Header E ⁇ or Control
  • the HEC byte shall be generated in the transmit direction as described in ITU-T Recommendation 1.432, including the recommended modulo 2 addition (XOR) of the pattern 01010101 to the HEC bits.
  • the generator polynomial coefficient set used and the HEC sequence generation procedure shall be in accordance with ITU-T Recommendation 1.432.
  • bits timing and ordering When interfacing ATM data bytes to the ASO or ASl bearer channel, the most significant bit (MSB) shall be sent first.
  • the ASO or ASl bearer channel data rates shall be integer multiples 32 kbit/s, with bit timing synchronous with the ADSL downstream timing base.
  • the cell delineation function permits the identification of cell boundaries in the payload. It uses the HEC field in the cell header. Cell delineation shall be performed using a coding law checking the HEC field in the cell header according to the algorithm described in ITU-T Recommendation 1.432.
  • the ATM cell delineation state machine is shown in Figure 59.
  • the delineation process is performed by checking bit by bit for the co ⁇ ect HEC. Once such .an agreement is found, it is assumed that one header has been found, and the method enters the PRESYNC state.
  • the cell delineation process may be performed byte by byte.
  • the delineation process is performed by checking cell by cell for the co ⁇ ect HEC. The process repeats until the co ⁇ ect HEC has been confirmed DELTA times consecutively. If an incorrect HEC is found, the process returns to the HUNT state.
  • the HEC covers the entire cell header.
  • the code used for this function is capable of either: single bit e ⁇ or co ⁇ ection or multiple bit e ⁇ or detection.
  • E ⁇ or detection shall be implemented as defined in ITU-T Recommendation 1.432 with the exception that any HEC e ⁇ or shall be considered as a multiple bit e ⁇ or, and therefore, HEC e ⁇ or co ⁇ ection shall not be performed.
  • An ATU-C configured for ATM transport shall support the full overhead framing structures 0 and 1.
  • the support of reduced overhead framing structures 2 and 3 is optional.
  • the ATU-C transmitter shall preserve V-C interface byte boundaries (explicitly present or implied by ATM cell boundaries) at the U-C interface, independent of the U-C interface framing structure.
  • transporting ATM cells and not preserving T-R byte boundaries at the U-R interface shall indicate during initialization that frame structure 0 is the highest frame structure supported
  • An STM ATU-R transporting ATM cells and preserving T-R byte bounda ⁇ es at the U-R mterface shall indicate during initialization that frame structure 0, 1 , 2 or 3 is the highest frame structure supported
  • An ATM ATU-C receiver operating m frammg structure 0 can not assume that the ATU-R transmitter will preserve T-R mterface byte boundanes at the U-R mterface and shall therefore perform the cell delineation bit-by-bit
  • An ATU-C configured tor ATM transport may support insertion ol a Network Timmg Reference (NTR) 3 4 3 Network tinung reference (NTR) 3 4 3 1 Need for NTR
  • VTOA Voice and Telephony Over ATM
  • DVC Desktop Video Conferencing
  • the ADSL system may transport an 8 kHz timmg marker as NTR This 8 kHz timmg marker mav be used for voice/video playback at the decoder (D/A converter) m DVC and VTOA applications
  • the 8 kHz timmg marker is mput to the ATU-C as part of the mterface at the V-C reference pomt 3 4 3 2 Transport of the NTR
  • the intention of the NTR transport mechanism is that the ATU-C provides timmg mformation at the U-C reference pomt to enable the ATU-R to deliver to the T-R reference pomt timing mformation that has a tinung accuracy co ⁇ espondmg to the accuracy of the clock provided to the V-C reference pomt
  • the NTR shall be inserted m the U-C frammg structure as follows a) The ATU-C may generate an 8 kHz local tinung reference (LTR) by dividing its sampling clock by the appropnate integer (276 if 2 208 MHz is used), b) It shall transmit the change m phase offset between the mput NTR and LTR (measured In cycles of the 2 208 MHz clock, that is units of approximately 452 ns) from the previous superframe to the present one This shall be encoded mto four bits ntr3 - ntrO (with ntr3 the MSB), representing a signed integer in the
  • This subclause specifies framing of the downstream signal (ATU-C transmitter)
  • Two types of framing are defined full overhead and reduced overhead
  • two versions of full overhead and t o versions ot reduced overhead are defined
  • the four resulting framing modes are defined in Table 8, and shall be refe ⁇ ed to as framing modes 0 1 , 2 and 3 Table 8- Definition of framing modes
  • the ATU-C shall indicate during initialization the highest framing structure number it supports. If the ATU-C indicates it supports framing structure A, it shall also support all framing structures A-l to 0. If the ATU-R indicates a lower framing structure number during initialization, the ATU-C shall fall back to the framing structure number indicated by the ATU-R.
  • ASx LSx serial interfaces data bytes are transmitted MSB first in accordance with ITU-T Recommendations G.703, G.709, 1.361, and 1.432.
  • All serial processing in the ADSL frame (e.g., CRC, scrambling, etc.) shall, however, be performed LSB first, with the outside world MSB considered by the ADSL as LSB.
  • the first incoming bit (outside world MSB) will be the first processed bit inside the ADSL (ADSL LSB).
  • Figures 53 and 54 show functional block diagrams of the ATU-C transmitter with reference points for data framing.
  • Up to four downstream simplex data channels and up to three duplex data channels shall be synchronized to the 4 kHz ADSL DMT frame rate, and multiplexed into two separate data buffers (fast and interleaved).
  • a cyclic redundancy check (CRC), scrambling, and forward e ⁇ or co ⁇ ection (FEC) coding shall be applied to the contents of each buffer separately, and the data from the interleaved buffer shall then be passed through an interleaving function.
  • the two data streams shall then be tone ordered, and combined into a data symbol that is input to the constellation encoder. After constellation encoding the data shall be modulated to produce an analog signal for transmission across the customer loop.
  • a bit-level framing pattern shall not be inserted into the data symbols of the frame or superframe structure.
  • DMT frame (i.e. symbol) boundaries are delineated by the cyclic prefix inserted by the modulator.
  • Superframe boundaries are determined by the synchronization symbol and shall also be inserted by the modulator, and which carries no user data.
  • the data frames i.e. bit-level data prior to constellation encoding
  • the reference points for which data framing will be described in the following subclauses is: a) A (Mux data frame): the multiplexed, synchronized data after the CRC has been inserted b) B (FEC output data frame): the data frame generated at the output of the FEC encoder at the DMT symbol rate, where an FEC block may span more than one DMT symbol period c) C (constellation encoder input data frame): the data frame presented to the constellation coder.
  • A Multiple data frame
  • B FEC output data frame
  • C tellation encoder input data frame
  • Each superframe is composed of 68 data frames, numbered from 0 to 67, which are encoded and modulated into DMT symbols, followed by a synchronization symbol, which carries no user or overhead bit-level data and is inserted by the modulator to establish superframe boundaries.
  • Each data frame within the superframe contains data from the fast buffer and the mterleaved buffer During each ADSL superframe, eight bits shall be reserved for the CRC on the fast data buffer (crc0-crc7), and 24 mdicator bits ( ⁇ b0- ⁇ b23) shall be assigned for OAM functions
  • the synchronizaton byte of the fast data buffer (“fast byte") car ⁇ es the CRC check bits m frame 0 and the mdicator bits m frames 1, 34, and 35
  • the fast byte m other frames is assigned in even-/odd-frame pairs to either the EOC or to synchronization control of the bearer channels assigned to the fast buffer
  • Bit 0 of the fast byte in an even-numbered frame (other than frames 0 and 34) and bit 0 of the fast byte of the odd- numbered frame immediately following shall be set to "0" to indicate these frames carry a synchronization control information
  • CRC CRC
  • indicator bits the fast bytes of two successive ADSL frames, beginrung with an even-numbered frame, may contain mdications of "no synchronization action" or alternatively, they may be used to transmit one EOC message, consistmg of 13 bits
  • the mdicator bits are defined in Table 9 Bit 0 of the fast byte m an even-numbered frame (other than frames 0 and 34) and bit 0 of the fast byte of the odd-numbered frame immediately following shall be set to "1 " to indicate these frames carry a 13-bit EOC message plus one additional bit, rl
  • the rl bit is reserved for future use and shall be set to 1
  • the synchronization byte of the mterleaved data buffer (sync byte) carnes the CRC check bits for the previous superframe m frame 0
  • the svnc byte shall be used for synchronization control of the bearer channels assigned to the interleaved data buffer or used to carry an ADSL overhead control (AOC) channel
  • AOC ADSL overhead control
  • Each data frame shall be encoded mto a DMT symbol As is shown in Figure 61, each frame is composed of a fast data buffer and an mterleaved data buffer, and the frame structure has a different appearance at each of the reference pomts (A, B, and C)
  • the bytes of the fast data buffer shall be clocked mto the constellation encoder first, followed by the bytes of the interleaved data buffer. Bytes are clocked least significant bit first
  • Each bearer channel shall be assigned to either the fast or the mterleaved buffer during initialization, and a pan of bytes, [B F ,B ], transmitted for each bearer channel, where B and B ⁇ designate the number of bytes allocated to the fast and mterleaved buffers, respectively
  • the frame structure of the fast data buffer shall be as shown m Figure 64, for reference pomts A and B, which are defined in Figure 53 and 54
  • the fast buffer shall always contain at least the fast bvte This is followed by B F (AS0) bytes of channel ASO, then B F (AS1) bytes of channel ASl, B (AS2) bytes of channel AS2 and B F (AS3) bvtes of channel AS3 Next come the bvtes for any duplex (LSx) channels allocated to the fast buffer If any
  • B F (ASx) is non-zero
  • both an AEX and a LEY byte follow the bytes of the last LSx channel, and if any BpfLSx) is non-zero, the LEX bvte shall be included
  • B F (LS0) 255
  • no bytes are mcluded for the LSO channel
  • the 16 kbit/s C channel shall be transported m every other LEX byte on average, usmg the svnc byte to denote when to add the LEX bvte to the LSO bearer channel
  • R F FEC redundancy bytes shall be added to the mux data frame (reference pomt A) to produce the FEC output data frame (reference pomt B), where Rp is given m the options used during initialization
  • the constellation encoder mput data frame (reference pomt C) is identical to the FEC output data frame (reference pomt B) 3 44 1 2 2 Interleaved data buffer (with full overhead)
  • the interleaved data buffer shall always contain at least the sync byte
  • the rest of the buffer shall be built m the same manner as the fast buffer substituting B ⁇ in place of ⁇ p
  • the length of each mux data frame is A' bytes, as defined m Figure 65
  • the FEC output Data Frame (reference pomt B) shall partially overlap two mux data frames tor all except the last frame, which shall contain the ⁇ j FEC redundancy bytes
  • the FEC output data frames are mterleaved to a specified mterleave depth
  • the interleaving process delays each bvte of a given FEC output data frame a different amount, so that the constellation encoder input data frames will contam bvtes from manv different FEC data frames
  • mux data frame 0 of the interleaved data buffer is aligned with the ADSL superframe and mux data frame 0 ot the fast data buffer (this is not true at reference point C)
  • the interleaved data buffer will be delayed bv (S interleave depth 250) ms with respect to the fast data buffer, and data frame 0 (containing the CRC bits for the interleaved data buffer)
  • D is the delay operator That is, CRC is the remainder when M(D) ⁇ fi is divided by G(D).
  • the CRC check bits are transported m the synchronization bytes (fast and mterleaved. 8 bits each) of frame 0 for each data buffer
  • the bits (l e message polynomials) covered by the CRC m clude
  • Each byte shall be clocked into the CRC least significant bit first
  • the number of bits over which the CRC is computed vanes with the allocation of bytes to the fast and mterleaved data buffers (the numbers of bytes in ASx and LSx vary accordmg to the [B Bj] pairs, AEX is present m a given buffer onlv if at least one ASx is allocated to that buffer, LEX is present m a given buffer only if at least one ASx or one LSx is allocated to that buffer)
  • CRC field lengths over an ADSL superframe will vary from approximately 67 bytes to approximately 14,875 bvtes 3 44 2 Synchronization
  • the mput data streams shall be synchronized to the ADSL tinung base usmg the synchronization control mechanism (consisting of synchronization control byte and the AEX and LEX bytes) Forward-e ⁇ or-co ⁇ ection coding shall always be applied to the synchronization control byte(s)
  • the synchronization control mechanism is not needed, and the synchronization control bvte shall always indicate no synchronization action" (see Table 10 and Table 1 1 ) 3 4 4 2 1 Synchronization for the fast data buffer
  • Synchronization control for the fast data buffer may occur m frames 2 through 33, and 36 through 67 of an ADSL superframe, where the fast byte may be used as the synchronization control byte No synchronization action shall be taken for those frames for which the fast byte is used for CRC, fixed mdicator bits, or EOC
  • ADSL deployments may need to inter-work with DSl (1 544 Mbit/s) or DSIC (3 152 Mbit/s) rates
  • the synchronization control option that allows adding up to two bytes to an ASx bearer channel provides sufficient overhead capacity to transport combinations of DSl or DSIC channels transp.arently (without mterpretmg or st ⁇ ppmg and regeneratmg the frammg embedded within the DSl or DSIC)
  • the synchronization control algo ⁇ thm shall, however, guarantee that the fast byte in some minimum number of frames is available to carry EOC frames, so that a minimum EOC rate (4 kbit/s) may be maintained
  • the LSO bearer channel is transported in the LEX byte, usmg the "add LEX byte to designated LSx channel", with LSO as the designated channel, every other frame on average
  • the synchronization control byte shall indicate "no synchronization action" (1 e , sc7-0 coded "XX001 IXO 2 ", with X discretionary) 3 4 4 2 2 Synchronization for the interleaved data buffer
  • Synchronization control for the interleaved data buffer can occur in frames 1 through 67 of an ADSL superframe, where the svnc bvte may be used as the synchronization control bvte No synchronization action shall be taken du ⁇ ng frame 0, where the svnc bvte is used for CRC du ⁇ ng frames when the LEX bvte carnes the AOC
  • the format ot the sync bvte when used as synchronization control for the mterleaved data buffer shall be as given m Table 11 In the case where no signals are allocated to the mterleaved data buffer, the sync byte shall carry the AOC data directly, as shown m Figure 63
  • ADSL deployments may need to mter-work with DSl ( 1 544 Mbit s) or DSIC (3 152 Mbit/s) rates
  • the synchronization control option that allows adding up to two bytes to an ASx bearer channel provides sufficient overhead capacity to transport combmations of DSl or DSIC channels transparently (without mterpretmg or shipping and regeneratmg the frammg embedded within the DSl or DSIC)
  • the data rate of the C ch.annel is 16 kbit/s
  • the LSO bearer channel is transported m the LEX bvte, usmg the
  • bit timmg base of the mput bearer channels (ASx, LSx) is synchronous with the ADSL modem timmg base then
  • the synchronization control byte shall indicate "no synchronization action"
  • the sc7-0 shall always be coded "XX001 IXX2", with X discretionary
  • the LEX byte shall carry AOC
  • the LEX byte shall be coded 00 lo
  • the scO may be set to 0 only in between transmissions of 5 concatenated and identical AOC messages
  • the format descnbed tor full overhead framing includes overhead to allow tor the synchronization of the seven ASx and LSx bearer channels
  • the ADSL equipment may operate in a reduced overhead mode This mode retains all the full overhead mode functions except synchronization control 3 4 4 3 1 Reduced overhead frammg with separate fast and svnc bvtes
  • the AEX and LEX bytes shall be eliminated from the ADSL frame format, and both the fast and sync bytes shall carry overhead information
  • the fast byte cames the fast buffer CRC, mdicator bits, and EOC messages, and the sync byte car ⁇ es the mterleaved buffer CRC and AOC message
  • the assignment of overhead functions to fast and sync bytes when usmg the full overhead frammg and when usmg the reduced overhead frammg with separate fast and svnc bvtes shall be as shown m Table 12
  • the structure of the fast data buffer shall be as shown m Figure 64 with Ap and Lp set to 0
  • the structure of the mterleaved data buffer shall be as shown m Figure 65 with A j and L set to 0
  • AOC function shall be earned in a smgle overhead byte assigned to separate data frames within the superframe structure
  • the CRC remains m frame 0 and the indicator bits m frames 1, 34, and 35
  • the AOC and EOC bytes are assigned to alternate pairs of frames
  • the assignment of overhead functions shall be as shown m Table 13
  • scramblers are applied to the serial data streams without reference to any framing or symbol synchronization. Descrambling in receivers can likewise be performed independent of symbol synchronization.
  • the ATU-C shall support downstream transmission with at least any combination of the FEC coding capabilities shown in Table 14.
  • the ATU-C shall also support upstream transmission with at least any combination of the FEC coding capabilities shown in Table 23. 3.4 6.1 Reed-Solomon coding
  • R i.e , R F or R
  • C(D) eg rfi- 1 + c l ⁇ fi- 2 + + c R _ 2 D + c R _ ⁇ is the check polynomial
  • the anthmetic is performed in the Galois Field GF(256), where a is a primitive element that satisfies the primitive bmary polynomial x + x ⁇ + x ⁇ + x ⁇ + l
  • a data byte (d , d ... , d j , d Q)
  • the ATU When entering the SHOWTIME state after completion of Initialization and Fast Retrain, the ATU shall align the first byte of the first Reed Solomon code-word with the first data byte of DF 0 3 4 6 3 Interleaving
  • the Reed-Solomon codewords in the mterleaved buffer shall be convolutionally interleaved
  • the interleaving depth vanes shall always be a power of 2 Convolutional interleaving is defined by the rule " Each of the N bytes BQ, B J , , B y_ j in a Reed-Solomon codeword is delaved by an amount that vanes linearly with the byte index More precisely, byte B, (with index l) is delayed by (D-l ) x i bytes, where D is the interleave depth"
  • N 5
  • the output bytes from the mterleaver always occupy distmct time slots when N is odd
  • a dummv byte shall be added at the beginning of the codeword at the mput to the mterleaver
  • the resultant odd-length code-word is then convolutionallv interleaved, and the dummv bvte shall then removed from the output ot the interleaver 3 4 6 4
  • Support of higher downstream bit rates with S 112
  • the ADSL downstream line rate is limited to approximately 8 Mbit/s per latency path
  • I e Ki
  • Ki Ki + R > 255
  • the Ki data bvtes shall be split mto two consecutive RS code-words
  • a DMT time-domain signal has a high peak-to-average ratio (PAR) (its amplitude distnbution is almost Gaussian), and large values may be clipped by the digital-to-analog converter
  • PAR peak-to-average ratio
  • the e ⁇ or signal caused by clipping can be considered as an additive negative impulse for the time sample that was clipped
  • the clippmg e ⁇ or power is almost equally dist ⁇ ubbed across all tones in the symbol in which clippmg occurs Clipping is therefore most likely to cause e ⁇ ors on those tones that, m anticipation of a higher received SNR, have been assigned the largest number of bits (and therefore have the densest constellations)
  • These occasional e ⁇ ors can be reliably co ⁇ ected by the FEC codmg if the tones with the largest number of bits have been assigned to the mterleave buffer
  • the numbers of bits and the relative gams to be used for every tone shall be calculated in the ATU-R receiver, and sent back to the ATU-C accordmg to a defined protocol
  • the pans of numbers are stored, m ascending order of frequency (or tone number l), in a bit and gam table
  • the "tone-ordered" encodmg shall first assign the S*N F bits from the fast data buffer to the tones with the smallest number of bits assigned to them, and then the 8' ⁇ 7 / bits from the interleave data buffer to the remaining tones
  • All tones shall be encoded with the number of bits assigned to them, one tone may therefore have a mixture of bits from the fast and mterleaved buffers
  • the ordered bit table b' t shall be based on the o ⁇ gmal bit table b, as follows
  • the last two 4-d ⁇ mens ⁇ onal symbols in the DMT symbol shall be chosen to force the convolutional encoder state to the zero state
  • the 2 LSBs of u are pre-determined, and onlv ( ⁇ +V -3) bits shall be extracted from the data frame buffer and shall be allocated to t , 3 4 8 2 Bit conversion
  • the bits ( « 3 , «2, « ] ) determine (VJ .VQ) and accordmg to Figure 69
  • the convolutional encoder shown in Figure 69 is a systematic encoder (I e i j and 2 are passed
  • the expanded constellation is labeled and partitioned mto subsets ("cosets") usmg a techmque called mappmg by set-partitionmg
  • cosets mto subsets
  • mappmg a techmque
  • the four-dimensional cosets m Wei's code can each be w ⁇ tten as the union of two Cartesian products of two 2-d ⁇ mens ⁇ onal cosets
  • C4 0 (C 2 " * C ' ) x (C- C j )
  • the four constituent 2- dimensional cosets, denoted by C 2 , C 2 , 2 , C 2 are shown in Figure 71
  • the encoding algonthm ensures that the 2 least significant bits of a constellation point compnse the mdex 1 of the 2- dimensional coset C 2 ' in which the constellation pomt lies
  • the bits (vj, VQ) and (wj, WQ) are m fact the binary representations of this mdex
  • the three bits (U2,UJ,UQ) are used to select one of the 8 possible four-dimensional cosets
  • the 8 cosets are labeled
  • Figure 72 shows the trellis diagram based on the fimte state machine in Figure 70, and the one-to-one co ⁇ espondence between (u , « j , U Q ) and the 4-d ⁇ mens ⁇ onal cosets
  • S (S2,S 2 .S l ,Sry represents the cu ⁇ ent state
  • T (T3)
  • T 2 , T j , TQ represents the next state m the finite state machine 5 is connected to T in the constellation diagram by a branch determined by the values of u and « j
  • the branch is labeled with the 4-d ⁇ mens ⁇ onal coset specified by the values of u 2 , MJ
  • the encoder shall select an odd-integer point ( ⁇ ' ⁇ ") from the square-gnd constellation based on the b bits ot either ⁇ v ⁇ . j ,v ⁇ . 2 , .VI .VQ ⁇ or ⁇ w j . ] ,w ⁇ . , ,W ] ,W Q ⁇
  • these b bits are identified with an integer label whose binary representation is ( ⁇ ,.
  • the integer values A and Y of the constellation point (X,Y) shall be determined from the b bits f fc-l' y b-2 ⁇ ' v l' v ⁇ ⁇ foll° ws ⁇ and Y are the odd mtegers with twos-complement binary representations (v ⁇ .j, v6 -3 , , vj , 1 ) and (vj,. , v£_4, ,vrj, 1 ), respectively
  • MSBs most significant bits
  • v ⁇ . j and v ⁇ are the sign bits for X and Y respectively
  • the 4-bit constellation can be obtamed from the 2-bit constellation by replacmg each label n by a 2 x 2 block of labels as shown m Figure 74
  • the same procedure can be used to construct the larger even-bit constellations recursively
  • the constellations obtamed for even values of b are square m shape
  • An algonthnuc constellation encoder shall be used to construct constellations with a maximum number of bits equal t0 downmax . where 8 ⁇ Ndow ⁇ max ⁇ 15 The constellation encoder shall not use trellis codmg with this option 3 4 9 1 Bit extraction Data bits from the frame data buffer shall be extracted accordmg to a re-ordered bit allocation table b , least sigmficant bit first The number of bits per tone, b',, can take any non-negative integer values not exceedmg ⁇ /downmax.
  • the frequency spacing, ⁇ " between sub-earners is 4 3125 kHz, with a tolerance of +/- 50 ppm 3 4 11 1 1 Data sub-earners
  • the lower limit of n depends on both the duplexing and service options selected For example, tor ADSL above POTS service option, if overlapped spectrum is used to separate downstream and upstream signals, then the lower limit on n is determmed by the POTS splitting filters, if frequency division multiplexing (FDM) is used, the lower limit is set by the downstream-upstream separation filters 3 4 11 1 2 Pilot
  • the data modulated onto the pilot sub-camer shall be a constant ⁇ 0,0 ⁇ Use of this pilot allows resolution of sample timing m a receiver modulo-8 samples Therefore a gross tinung e ⁇ or that is an integer multiple of 8 samples could still persist after a micro-interruption (e g , a temporary short- cucuit, open circuit or severe line hit), co ⁇ ection of such timmg e ⁇ ors is made possible by the use of the synchronization symbol 3 4 1 1 1 3 Nvquist frequency
  • the earner at the Nvquist trequencv (#256) shall not be used for user data and shall be real valued 3 4 1 1 1 4 DC
  • the earner at DC (#0) shall not be used, and shall contain no energy " 4 1 1 2 Modulation by the inverse discrete Founer transform (IDFT)
  • the constellation encoder and gam scalmg generate onlv 255 complex values of Z,
  • the mput values 255 complex values plus zero at DC and one real value for Nyquist if used
  • the synchronization symbol permits recovery of the frame boundary after micro-interruptions that might otherwise force retraining
  • the cyclic prefix shall, however, be shortened to 32 samples, and a synchronization symbol (with a nominal length of 544 samples) is inserted after every 68 data symbols That is,
  • the first pan of bits (d ⁇ and ⁇ / 2 ) shall be used for the DC and Nyquist sub-earners (the power assigned to them is zero, so the bits are effectively ignored)
  • the pe ⁇ od of the PRD is only 511 bits, so d512 shall be equal to dl
  • the dl - d9 shall be re-initialized for each synchronization symbol, so each symbol uses the same data Bits 129 and 130, which modulate the pilot earner, shall be overwritten bv ⁇ 0,0 ⁇ generatmg the ⁇ +,+ ⁇ constellation
  • the minimum set of sub-earners to be used is the set used for data transmission (l e , those for which b, > 0)
  • the data modulated onto each sub-earner shall be as defined above, it shall not depend on which sub-earners are used 3 4 12 Cyclic prefix
  • the transmitter mcludes all analog transmitter functions the D/A converter, the anti-aliasing filter, the hyb ⁇ d circuitn .and the high-pass part of the POTS or ISDN splitter 3 4 13 1 Maximum clippmg rate
  • the maximum output signal of the transmitter shall be such that the signal shall be clipped no more than 0 00001% of the time
  • the signal to noise plus distortion ratio of the transmitted signal in a given sub-earner is specified as the ratio of the rms value of the tone in that sub-earner to the rms sum of all the non-tone signals m the 4 3125 kHz frequency band centered on the sub-earner frequency This ratio is measured for each sub-earner used for transmission usmg a MultiTone Power Ratio (MTPR) test as shown m Figure 77
  • MTPR MultiTone Power Ratio
  • the MTPR of the transmitter m any sub-earner shall be no less than (3 ⁇ ' (]ow + 20)dB, where ⁇ owru ls defined as the size of the constellation (m bits) to be used on sub-earner i
  • the minimum transmitter MTPR shall be at least 38dB (co ⁇ espondmg to an ⁇ faowni o 6) for anv sub-earner
  • An ATU-R may support STM transmission or ATM transmission or both frammg modes that shall be supported, depend upon the ATU-R bemg configured for either STM or ATM transport If frammg mode k is supported, then modes k-1, , 0 shall also be supported
  • the ATU-C and ATU-R shall indicate a frammg mode number 0, 1, 2 or 3 which they mtend to use The lowest indicated frammg mode shall be used
  • An ATU-R may support reconstruction of a Network Tinung Reference (NTR) from the downstream mdicator bits 3 5 1 STM Transmission Protocol Specific functionalities 3 5 1 1 ATU-R input and output V interfaces for STM transport
  • the functional data interfaces at the ATU-R are shown m Figure 78
  • Output interfaces for the high-speed downstream sunplex b&arer channels are designated ASO through AS3
  • input-output interfaces for the duplex bearer channels are designated LSO through LS2
  • the sunplex channels are transported m the downstream dnection onlv, therefore their data interfaces at the ATU-R operate only as outputs 3 5 1 3 Duplex channels - Transceiver bit rates
  • duplex channels are transported in both directions, so the ATU-R shall provide both input and output data interfaces
  • An ATU-R configured for STM transport shall support the full overhead frammg structure 0
  • the support of full overhead frammg structure 1 and reduced overhead framing structures 2 and 3 is optional
  • the ATU-R mput and output T interfaces are identical to the ATU-C mput and output interfaces, as shown m Figure 79 3 5 2 2 ATM Cell specific functionalities
  • the ATM cell specific functionalities performed at the ATU-R shall be identical to the ATM cell specific functionalities performed at the ATU-C 3 5 2 3 Frammg Structure for ATM transport
  • An ATU-R configured for ATM transport shall support the full overhead framing structures 0 and 1
  • the ATU-R transmitter shall preserve T-R interface byte bounda ⁇ es (explicitly present or implied by ATM cell boundanes) at the U-R mterface, mdependent of the U-R mterface frammg structure
  • An ATU-R configured for ATM transport may support reconstruction of a Network Timmg Reference (NTR)
  • NTR Network Timmg Reference
  • NTR Network Timmg Reference
  • An STM ATU-C transporting ATM cells and not preserving V-C byte bounda ⁇ es at the U-C mterface shall indicate du ⁇ ng initialization that frame structure 0 is the highest frame structure supported
  • An STM ATU-C transporting ATM cells and preserving V-C byte bounda ⁇ es at the U-C mterface shall indicate dunng initialization that frame structure 0, 1, 2 or 3 is the highest frame structure supported, as applicable to the implementation, • An ATM ATU-R receiver operatmg m frammg structure 0 can not assume that the ATU-C transmitter will preserve
  • V-C mterface byte bounda ⁇ es at the U-C mterface and shall therefore perform the cell delineation bit-by-bit 3 5 3 Network timing reference
  • the ATU-R may deliver the 8 kHz signal to the T-R interface 3 5 4 Framing
  • ATU-R transmitter Frammg of the upstream signal (ATU-R transmitter) closelv follows the downstream framing (ATU-C transmitter), but with the following exceptions
  • frammg structures Two types of frammg are defined full overhead and reduced overhead Furthermore, two versions of full overhead and two versions of reduced overhead are defined
  • the four resultmg frammg structures are defined as for the ATU-C and are refened to as frammg structures 0, 1 , 2 and 3
  • the ATU-R transmitter is functionally similar to the ATU-C transmitter, except that up to three duplex data channels are synchronized to the 4 I Hz ADSL DMT symbol rate (uistead of up to four sunplex and three duplex channels as is the case for the ATU-C)
  • the ATU-R transmitter and its associated reference pomts for data fra mg are shown m Figure 55 and Figure 56
  • the superframe structure of the ATU-R transmitter is identical to that of the ATU-C transmitter, shown in Figure 61
  • the ATU-R shall support the mdicator bits
  • Each data frame shall be encoded mto a DMT symbol As specified for the ATU-C shown m Figure 61 , each frame is composed of a fast data buffer and an interleaved data buffer, and the frame structure has a different appearance at each of the reference points (A, B, and C)
  • the bytes of the fast data buffer shall be clocked into the constellation encoder first, followed by the bytes of the interleaved data buffer Bytes are clocked least sigmficant bit first
  • the assignment of bearer channels to the fast and interleaved buffers shall be configured dunng initialization with the exchange of a (B ⁇ i) pan for each data stream, where 5p designates the number of bytes of a given data stream to allocate to the fast buffer, and B j designates the nu ⁇ er of bytes allocated to the mterleaved data buffer
  • the frame structure of the fast data buffer is the same as that specified for the ATU-C with the following exceptions
  • ⁇ p FEC redundancv bvtes shall be added to the mux data frame (reference point A) to produce the FEC output data frame (reference point B) where R is given in the C-RATESl signal options received from the ATU-C dunng initialization Because the data from the fast data buffer is not mterleaved, the constellation encoder mput data frame (reference pomt C) is identical to the FEC output data frame (reference pomt B) 3 5 4 1 2 2 Interleaved data buffer
  • Each byte shall be clocked into the CRC least sigmficant bit first
  • the mput data streams shall be synchronized to the ADSL tinung base usmg the synchronization control mechamsm (consisting of synchronization control byte and the LEX byte) Forward-e ⁇ or-co ⁇ ection codmg shall always be applied to the synchronization control byte(s)
  • the synchronization control byte shall always indicate "no synchronization action" 3 5 4 2 1 Synchronization for the fast data buffer
  • Synchronization control for the fast data buffer can occur m frames 2 through 33 and 36 through 67 of an ADSL superframe, where the fast byte may be used as the synchronization control byte No synchronization action is to be taken for those frames in which the fast byte is used for CRC, fixed mdicator bits, or EOC
  • the format of the fast byte when used as synchronization control for the fast data buffer shall be as given m Table 21
  • bit timing base of the mput bearer channels (LSx) is synchronous with the ADSL modem tinung base then ADSL systems need not perform synchronization control by adding or deleting LEX bytes to/from the designated LSx channels
  • the synchronization control byte shall indicate "no synchronization action" (1 e , sc7-0 coded "00001 IXO 2 ", with X discretionary)
  • the LSO bearer channel shall be transported in the LEX byte, usmg the "add LEX bvte to designated LSx channel", with LSO as the designated channel, every other frame on average 3 5 4 2 2
  • Synchronization for the interleaved data buffer Synchronization control for the mterleaved data buffer can occur m frames 1 through 67 of an ADSL superframe, where the sync bvte mav be used as the synchronization control byte No synchronization action shall be taken du ⁇ ng frame 0, where the svnc bvte is used for CRC, and frames when the LEX bvte car ⁇ es the AOC
  • the format of the svnc byte when used as synchronization control for the interleaved data buffer shall be as given m Table 22 hi the case where no signals are allocated to the interleaved data buffer, the sync byte shall carry the AOC data directly, as shown in Figure 63 Table 22 - Svnc bvte format for synchronization
  • the LSO bearer channel shall be transported in the LEX bvte, usmg the "add LEX byte to designated LSx channel", with LSO as the designated channel, every other frame on average
  • the bit timmg base of the input bearer channels (LSx) is synchronous with the ADSL modem timing base then ADSL systems need not perform synchronization control by addmg or deleting LEX bytes to/from the designated LSx channels, and the synchronization control byte shall mdicate "no synchronization action"
  • the sc7-0 shall always be coded "00001 IXX 2 ", with X discretionary
  • the LEX byte shall carry AOC
  • the LEX byte shall be coded OO 1 6
  • the scO may be set to 0 only m between transmissions of 5 concatenated and identical AOC messages 3 5 4 3 Reduced overhead framing
  • the format desc ⁇ bed in 2 5 4 1 2 for full overhead frammg includes overhead to allow for the synchronization of three LSx bearer channels
  • the synchronization function descnbed m 2 5 4 2 is not requued
  • the ADSL equipment mav operate in a reduced overhead mode This mode retains all the full overhead mode functions except synchronization control
  • the frammg structure shall be as defined m 2 4 4 3 1 (when using separate fast and sync bytes) or2 4 4 3 2 (when using merged fast and sync bytes) 3 5 5 Scramblers
  • the data streams output from the fast and interleaved buffers shall be scrambled separately usmg the same algo ⁇ thm as for the downstream signal
  • the upstream data shall be Reed-Solomon coded and mterleaved using the same algo ⁇ thm as for the downstream data
  • the ATU-R shall support upstream transmission with at least anv combination of the FEC coding capabilities shown in Table 23 Table 23 - Mimmum FEC coding capabilities for ATU-R
  • the ATU-R shall also support upstream transmission with at least any combination of the FEC codmg capabilities shown m Table 14 3 5 7 Tone ordermg
  • the tone-ordering algo ⁇ thm shall be the same as for the downstream data 3 5 8 Constellation encoder - Trellis version
  • An algonth ⁇ uc constellation encoder shall be used to construct constellations with a maximum number of bits equal to ⁇ upm x, where 8 ⁇ jVupmax ⁇ 15
  • the encodmg algo ⁇ thm shall be the same as that used for downstream data (with the substitution of the constellation limit of Aiipmax r ⁇ downmax)
  • Frequency spacing, ⁇ / ⁇ , between sub-camers shall be 4 3125 kHz with a tolerance of +/- 50 ppm
  • the channel analysis signal allows for a maximum of 31 earners (at frequencies nAf) to be used
  • the range of n depends on the service option selected For example, for ADSL above POTS the lower limit is set bv the POTS/ADSL splitting filters, the upper limit is set bv the transmit and receive band-limiting filters, and shall be no greater than 31
  • the cut-off trequencies of these filters are at the discretion ot the manufacturer because the range ot usable n is determined dunng the channel estimation 3 5 11 1 2 Nvquist frequency
  • the sub-earner at the Nyquist frequency shall not be used for user data and shall be real valued 3 5 11 1 3 DC
  • the sub-earner at DC (#0) shall not be used, and shall contain no energy 3 5 11 2 Synchronization symbol
  • the cyclic prefix shall, however, be shortened to 4 samples, and a synchronization symbol (with a nominal length of 68 samples) inserted after every 68 data symbols That is,
  • the data modulated onto each sub-camer shall be as defined above, it shall not depend on which sub-earners are used 3 5 12 Transmitter dynamic range
  • the transmitter includes all analog transmitter functions the D/A converter, the anti-aliasing filter, the hyb ⁇ d circuitry, and the POTS splitter 3 5 12 1 Maximum clipping rate
  • the maximum output signal of the transmitter shall be such that the signal shall be clipped no more than 0 00001% of the time
  • the signal to noise plus distortion ratio of the transmitted signal m a given sub-camer ((S/N+D),) is specified as the ratio of the rms value of the full-amplitude tone m that sub-camer to the rms sum of all the non-tone signals in the 4 3125 kHz frequency band centered on the sub-camer frequency This ratio is measured for each sub-camer used for transmission usmg a Multi-Tone Power Ratio (MTPR) test as shown m Figure 77
  • the MTPR of the transmitter in any sub-camer shall be no less than (3 up ⁇ + 20) dB, where N U p ⁇ is defined as the size of the constellation (in bits) to be used on sub-camer /
  • the transmitter MTPR shall be +38dB (co ⁇ esponding to an ⁇ 7 U p 1 of 6) for any sub-camer
  • a PMCCC encoder is formed bv two (or more) constituent systematic encoders jomed through one or more interleavers
  • the mput mformation bits feed the first encoder and, after having been scrambled bv the mterleaver, enter the second encoder
  • a code word of a parallel concatenated code compnses of the mput bits to the first encoder followed by the pa ⁇ ty check bits of both encoders
  • the disadvantage of the PMCCC is that it has a floor-error around 10 " * This could be improved with a good mterleaver design, but usmg a large number of iterations 4 2 1- Parallel Multiple Convolutional Concatenated Codes Encoder
  • a PMCCC encoder compnses ot two parallel concatenated recursive systematic convolutional encoders separated by an mterleaver The encoders are arranged m a "parallel concatenation" In a prefe ⁇ ed embodiment, the concatenated recursive systematic convolutional encoders may be identical
  • Figure 82 represents the proposed encoder
  • the mput is a block of mformation bits
  • the two encoders generate pa ⁇ ty symbols (uo and u O) from two simple recursive convolutional codes
  • the key innovation of this techmque is an interleaver "r", which permutes the o ⁇ gmal information bits before mput to the second encoder
  • the permutation performed by the mterleaver allows those input sequences for which one encoder produces low-weight codewords to usually cause the other encoder to produce high-weight codewords
  • the combmation is surp ⁇ smgly powerful
  • the resultmg code has features similar to a "random" block code In this way, we have the information symbols ( «/ and u 2 ) and two redundant symbols (uo and u O) With this redundancy it is possible to reach longer loops and to reduce the PAR, at the cost of a slight mcrease of the constellation encoder
  • the first decoder should deliver a soft output to the second decoder
  • the loganthm of the Likelihood Ratio (LLR) of a bit decision is the soft decision mformation output by the MAP decoder
  • the optimum decision algonthm on the kth bit Uk is based on the conditional log-hkelihood ratio L k
  • L lk f(y,,Lo,L 2 ,k) (115)
  • the final decision is based on. which is passed through a hard h ⁇ uter with zero threshold
  • the recursion can be started with the initial condi ⁇ on
  • a PMCCC the terleaver establishes a relationship between portions of a codeword It is generally assumed that when a PMCCC decoder is operatmg at low bit e ⁇ or rates, e ⁇ or sequences have small Hamnung weights From this, and properties of PMCCC, a mathematical structure is possible to developed for interleaver design, pemuttmg the identification of quantitatively optimal mterleaver Simulations show the math captures some but not all the essential charactenstics of a successful interleaver Modifying a random mterleaver accordmg to some mathematical ideas gives excellent simulation results
  • the function of the interleaver in the PMCCC is to assure that at least one of the codeword components has high Hamming weight
  • An SMCCC Encoder compnses of two se ⁇ al concatenated recursive systematic convolutional encoders separated by an mterleaver
  • the encoders are a ⁇ anged in a "se ⁇ al concatenation"
  • the concatenated recursive systematic convolutional encoders are identical
  • Figure 87 represents the proposed encoder
  • a SMCCC encoder is a combmation of two simple encoders
  • the mput is a block of information bits
  • the two encoders generate pa ⁇ ty symbols (uo and u O) from two simple recursive convolutional codes
  • the key mnovation of this techmque is an mterleaver "r" , which permutes the o ⁇ gmal mformation bits before mput to the second encoder
  • the permutation allows those mput sequences for which one encoder produces low-weight codewords which will usually cause the other encoder to produce high-weight codewords
  • FIG 88 the block diagram of an iterative decoder is shown It is based on two modules denoted by "SISO" one for each encoder, an mterleaver, and a demterleaver
  • SISO single-port device, with two mputs and two outputs
  • the SISO module is a four-port device that accepts at the input the sequences of probability distnbutions and outputs the sequences of probability dist ⁇ butions based on its mputs and on its knowledge of the code
  • the output probability dist ⁇ butions represent a smoothed version of the mput dist ⁇ butions
  • the algo ⁇ thm is completely general and capable ot copmg with parallel edges and also with encoders with rates greater than one, like those encountered in some concatenated schemes
  • the SISO algo ⁇ thm requires that the whole sequence has been received before starting the smoothing process The reason is that backward recursion starts trom the final trellis state
  • a more flexible decoding strategy is offered bv modifvmg the algo ⁇ thm m such a way that the SISO module operates on a fixed memory span and outputs the smoothed probability distnbutions after a given delay, D
  • This new algonthm is called the shding-window soft-input soft-output (SW-SISO) algonthm
  • the SW-SISO algo ⁇ thm solves the problems of continuously updating the probability dist ⁇ butions, without requiring trellis temunations
  • Theu computaUonal complexity m some cases is around 5 tunes that of other suboptunal algonthms like SOVA This is due mainly to the fact that they are multiplicative algo ⁇ thms
  • we overcome this drawback by proposing the additive version of the SISO algonthm 4 3 3 Interleaver design
  • SMCCC does not have a problem with floor e ⁇ ors as does PMCCC
  • the floor e ⁇ or begins after 10" 7 that made it suitable for ADSL applications
  • the mterleaver establishes a relationship between portions of a codeword
  • p permutation length
  • the mterleaver establishes a relationship between portions of a code-word
  • the method proposed for the mterleaver is to disperse symbols as widely as possible in a "constellation way"
  • the number of iterations is a very important subject for the different applications of PMCCC and SMCCC For applications where the delay is not important, a large number is acceptable For real tune applications or for quasi-real tune applications it is important to use a number of iterations as low as possible maintaining the advantages of this techmque
  • the necessary number of iterations depends upon the Eb/N 0 ratio m the receiver In Figure 51, we present this relationship for the SMCCC case, we represent values of ⁇ V tone below 0 1 dB, for values around 2 dB it is sufficient to use a number below 10 iterations
  • the PMCCC has a floor-e ⁇ or around a BER ot 10 " °,
  • the reason for this is that the SMCCC functions m an mner and outer encoder structure, while the PMCCC functions as two parallel encoders
  • Figure 52 we present the floor e ⁇ or effect for PMCCC and that SMCCC does not show the floor e ⁇ or effect at least until BER of 10 '9 For simulation after 10 9 a lot of tune is required and it is not possible to give a simulation result
  • Figure 90 represents the proposed encoder
  • a PMCCC encoder is a combination ot two simple encoders
  • the mput is a block of information bits
  • the two encoders generate pa ⁇ ty symbols (uo and u'o) from two simple recursive convolutional codes
  • the kev innovauon of this techmque is an interleaver T", which permutes the ongmal information bits before mput to the second encoder
  • the permutation performed bv the mterleaver allows those input sequences for which one encoder produces low-weight codewords to usually cause the other encoder to produce high-weight codewords
  • the combination is surp ⁇ smgly powerful
  • the resulting code has features similar to a random ' block code
  • Low-density parity-check codes are codes specified by a matrix containing mostly 0's and only a small number of 1 's.
  • an (n, j, k) low-density code is a code of block length n with a matrix like that of Table 24 where each column contains a small fixed number, j, of l's and each row contains a small fixed number, k, of 1' s. Note that this type of matrix does not have the check digits appearing in diagonal form as in Table 25. However, for coding purposes, the equations represented by these matrices can always be solved to give the check digits as explicit sums of information digits.
  • the mmimum distance of a code is the number of positions m which the two nearest code words differ Over the ensemble, the mmimum distance of a member code is a random va ⁇ able, and it can be shown that the dist ⁇ bution function of this random va ⁇ able can be over bounded by a function As the block length increases, for fixed j ⁇ 3 and k > j, this funcUon approaches a unit step at a fixed fraction ⁇ , k of the block length Thus, for large n, practically all the codes m the ensemble have a minimum distance of at least n ⁇ ,k, In Table 26 this ratio of typical minimum distance to block length is compared to that for a pa ⁇ ty-check code chosen at random, l e , with a matnx filled in with equiprobable independent bmary digits It should be noted that for all the specific nonrandom procedures known for constructing codes, the ratio of minimum distance to block length appears to approach 0 with mcreasmg block length
  • the probability of e ⁇ or usmg maximum likelihood decodmg for low-density codes clearly depends upon the particular channel on which the code is bemg used The results are particularly simple for the case of the BSC, or bmary svmmetnc channel, which is a binary-input, binary-output, memoryless channel with a fixed probability of transition from either input to the opposite output
  • the low-density code has a probability of decodmg e ⁇ or that decreases exponentially with block length and that the exponent is the same as that for the optimum code of shghtlv higher rate as given m Table 27 Table 26.
  • Comparison of o) k the ratio of typical minimum distance to block len,gth for an (n. j. k) code, to ⁇ . the same ratio for an ordinary parity-check code of the same rate.
  • the BSC is an approximation to physical channels only when there is a receiver that makes decisions on the incoming signal on a bit-to-bit basis. Since the decoding procedure to be described later can actually use the channel a posteriori probabilities, and since a bit-by-bit decision throws away available information, we are actually interested in the probability of decoding e ⁇ or of a binary-input, continuous-output channel. If the noise affects the input symbols symmetrically, then this probability can again be bounded by an exponentially decreasing function of the block length, but the exponent is a rather complicated function of the channel and code.
  • This patent application includes a computer program listing containing 37 pages, and included as an appendix.
  • the program relates to a Reed-Solomon Encoder and Decoder and a PMCCC Encoder and Decoder for 2 parallel concatenated convolutional codes.

Abstract

Un procédé de correction aval des erreurs destiné à des systèmes de communication comprend les étapes suivantes: la production d'un train de symboles au moyen du codage aval des erreurs d'un train de données; la modulation du train de symboles pour produire un signal modulé; l'envoi du signal modulé sur une liaison de communication; la réception du signal modulé, le signal modulé comprenant des erreurs; la démodulation du signal reçu contenant des erreurs; le décodage du signal démodulé au moyen de plusieurs décodeurs classiques; et, la régénération du train de données et l'élimination des erreurs. Un procédé de réduction du niveau de puissance de crête destiné aux systèmes de communication comprend l'utilisation de plusieurs codeurs et les étapes suivantes: la production d'un signal de crête réduit au moyen du codage du train de données par les codeurs; la modulation du signal de crête réduit; et l'envoi du signal de crête réduit. Un appareil permettant de mettre en oeuvre le procédé de l'invention est décrit.
EP99938916A 1998-07-30 1999-07-30 Systeme de correction aval des erreurs comprenant des codeurs configures en parallele et/ou en serie Withdrawn EP1101313A1 (fr)

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