EP1090535A4 - Dispositifs a puces a protuberances comprenant une colle conductrice souple - Google Patents

Dispositifs a puces a protuberances comprenant une colle conductrice souple

Info

Publication number
EP1090535A4
EP1090535A4 EP99921432A EP99921432A EP1090535A4 EP 1090535 A4 EP1090535 A4 EP 1090535A4 EP 99921432 A EP99921432 A EP 99921432A EP 99921432 A EP99921432 A EP 99921432A EP 1090535 A4 EP1090535 A4 EP 1090535A4
Authority
EP
European Patent Office
Prior art keywords
substrate
contact pads
conductive adhesive
flexible conductive
flexible
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP99921432A
Other languages
German (de)
English (en)
Other versions
EP1090535A1 (fr
Inventor
Kevin Kwong-Tai Chung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Amerasia International Technology Inc
Original Assignee
Amerasia International Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/166,633 external-priority patent/US6108210A/en
Priority claimed from US09/276,259 external-priority patent/US6297564B1/en
Application filed by Amerasia International Technology Inc filed Critical Amerasia International Technology Inc
Publication of EP1090535A1 publication Critical patent/EP1090535A1/fr
Publication of EP1090535A4 publication Critical patent/EP1090535A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10977—Encapsulated connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10984—Component carrying a connection agent, e.g. solder, adhesive
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to electronic devices and, in particular, to electronic devices including semiconductor chips adhesively bonded thereon.
  • connections to semiconductors are made with fine gold or aluminum bond wires that loop from contact pads arranged around the periphery of the top surface of the semiconductor chip (i.e. the side of the chip on which the electronic circuit has been formed) to a lead-frame, header or other package or substrate to which the bottom surface of the semiconductor chip is attached.
  • the technology of bond wire interconnection has been perfected to such a degree that the cost of each bond wire connection is less than one cent ($0.01 US).
  • the electrical characteristics of thin bond wires looping even over a relatively short distance necessarily introduce unwanted inductance and capacitance into the interconnection and thus reduce the bandwidth and operating rate of the electronic devices.
  • the distance between the flip chip and the substrate has been reduced to about 50-100 micrometers (a micrometer is also known as a micron) and thereby to enable operation at dramatically higher frequencies.
  • the interconnection of semiconductor devices in flip chip configuration has evolved from the use of very elaborate metallization and metallurgy to form a conductive bump of suitable height to which connection may be made, to the use of a less demanding and inexpensive solder bump. Soldering and solder-bump technology and metallurgy may be changed in known manner to accommodate changes in composition and methods of depositions suitable for lower and higher temperature reflow soldering of such interconnections.
  • solder bump technology has become apparent when semiconductor devices are sought to be directly attached to an organic substrate due to the differences in the coefficient of thermal expansion (CTE) of the materials.
  • CTE coefficient of thermal expansion
  • FR-4 fiberglass substrates have a CTE of 17 ppm/°C whereas the semiconductor chip has a CTE of 3 ppm/°C.
  • U.S. Patent 4,113,981 entitled “Electrically Conductive Adhesive Connecting Arrays of Conductors” issued to Fujita et al. describes a non-conductive adhesive base that is filled with too few conductive particles to render it conductive, except where it may be compressed. Fujita et al. describes using such adhesive to attach raised contacts where normally non-contacting conductive particles in the non-conductive adhesive are pressed against raised contacts of a device so that the raised contacts of the device are in electrical contact with the raised contact pads of the substrate and where isolation between laterally adjacent contacts is maintained by the insulating resin.
  • the contact pads normally formed of aluminum, are recessed below the final insulating inorganic passivation layer.
  • the contact pads must extend above the top of the insulating passivation layer or substrate. This additional preparation, either as part of the semiconductor wafer fabrication or as a separate process, tends to increase the cost of the semiconductor device and, therefore, the interconnection.
  • Another limitation of the Fujita interconnection is that only a limited number of conductive paths may be formed within each conductive contact, so that electrical isolation between only a few of the conductor particles can render the interconnection non- conductive, and, therefore, useless.
  • Isotopically conductive adhesives have long been used for bonding the backside of the semiconductor die to a package before the contact pads of the die are wire-bonded to the package leads and have also found extensive use to attach semiconductor components, chip resistors and chip capacitors in hybrid circuit assemblies and in printed wiring board assemblies.
  • the adhesive joints in the reported applications employ rigid adhesives having a modulus of elasticity of 70,000 kg/cm 2 (1,000,000) psi or higher and, as a result, have very little compliance and are subject to delamination or fracture failures over repeated temperature excursions.
  • the major problem facing chip to component or chip to board interconnection is the internal stresses arising from the difference between the coefficient of thermal expansion of the silicon of the semiconductor chip and that of the next level board, i.e. the substrate to which the semiconductor chip is attached.
  • Both conventional conductive adhesives and solder-bump technologies are hampered by these high-stress-related failures which are exacerbated by extreme temperature differences and larger chips, as is the trend for modern electronics.
  • the conventional solution to the stress problem is to seek to spread out the stress using an epoxy underfill in the areas not containing conductive adhesive connections. While proper underfill does in many cases help to increase the number of thermal cycles that such interconnections can survive by a factor of 6-8, depending on semiconductor die size and the temperature excursions, the inherent problem of balancing the beneficial compressive stress of the high-strength underfill that limits the cycling strain achieved against the devastating shear stress that will delaminate or break the joints or parts remains. Every increase in the dimension of the semiconductor die increases the shear stress, and thus the reliability of the assembled flip chip under thermal cycling must be re-evaluated for each particular range of temperatures.
  • next level board i.e. the substrate
  • the substrate i.e. the substrate
  • the same coefficient of thermal expansion as that of the semiconductor chip e.g., about 3 ppm/°C.
  • this technical approach has been successfully utilized by some, it is not used extensively because of the undesirable higher cost to both develop and manufacture such a substrate and to create the infrastructure necessary to support such new technology.
  • Even more vexing is the fact that the lowest cost common electronic substrate is a fiberglass laminate with epoxy resin, such as FR-4, which is commonly used in printed wiring circuit boards and which has a CTE of 17 ppm/°C.
  • Conventional commercial electronic equipment almost universally employs FR-4 printed circuit boards.
  • the present invention comprises a semiconductor chip having contact pads thereon passivated by a precious metal, wherein the semiconductor chip is connected in a flip chip manner to a substrate having corresponding contact pads thereon passivated by a precious metal. Connections between corresponding contact pads on the semiconductor chip and on the substrate are made with a flexible conductive adhesive having a low modulus of elasticity.
  • FIGURE 1 is a cross-sectional diagram of an embodiment of an electronic device including a flip chip semiconductor device according to the present invention
  • FIGURE 2 is a graphical representation of the modulus of elasticity of various adhesives as a function of temperature
  • FIGURE 3 is a plan view of the semiconductor device employed in the embodiment of FIGURE 1 ;
  • FIGURES 4 and 5 are cross-sectional views of the semiconductor device of FIGURE 3 before and after the application of flexible conductive adhesive, respectively;
  • FIGURE 6 is a cross-sectional diagram of an alternative embodiment of an electronic device including a flip chip semiconductor device according to the present invention.
  • FIGURE 7 is a plan view of the semiconductor device employed in the embodiment of FIGURE 6;
  • FIGURES 8 is a cross-sectional view of the semiconductor device of FIGURE 7 after the application of flexible conductive adhesive, and flexible underfill;
  • FIGURES 9 and 10 are cross-sectional views of alternative embodiments of the semiconductor device shown in FIGURES 4 and 7 after application of flexible conductive adhesive.
  • the present invention relates to electronic devices wherein the interconnections between a substrate and electronic components mounted thereon, such as flip chip devices including semiconductor devices, resistors, capacitors and other components, a formed of a flexible conductive adhesive that has a low modulus of elasticity so as to exhibit substantial compliance to accommodate differences between the coefficients of thermal expansion (CTE) of the electronic components and the substrate of up to 60 ppm/°C without the need of high modulus underfills to prevent fatigue and delamination failures.
  • CTE coefficients of thermal expansion
  • underfill is to be employed, as may be desirable to enhance the electrical isolation and to reduce migration of certain metals employed as conductors, such underfill must also be flexible having a low modulus of elasticity, preferably one the same as or lower than that of the flexible conductive adhesive interconnections.
  • Electronic device 10 of FIGURE 1 includes an insulating substrate 20 on which are aligned and mounted a plurality of electronic devices, such as semiconductor chip 30, chip resistor 44 and chip capacitor 46. There is no insulating underfill between the devices 30, 44, 46 and substrate 20 in this embodiment.
  • Semiconductor chip 30 includes on a first surface of substrate die 32 a plurality of contact pads 34 for making electrical connections between the electronic circuit contained in the semiconductor chip 30 and external electronic elements.
  • resistor 44 and capacitor 46 each include on a respective first surface a plurality of contact pads for making electrical connections between the resistive and capacitive circuit elements respectively contained in chip resistor 44 and in chip capacitor 46 and external electronic elements via substrate 20.
  • Substrate 20 includes on a first surface thereof printed wiring conductors 22 that form the conductors of an electronic circuit in conventional manner.
  • a plurality of contact pads 24 are formed on the conductors 22 of substrate 20 at locations that correspond to the locations of corresponding bonding pads 34, 45, 47 of the electronic devices 30, 44, 46, respectively, to be mounted thereon.
  • the arrangement, size and spacing of the contact pads 24 of substrate 20 match the arrangement, size and spacing of the contact pads 34 of semiconductor device 30.
  • Substrate 20 may be fabricated of laminates such as FR-4 fiberglass or BT material, of coated aluminum, or of alumina, ceramic or other suitable insulating material and the conductors 22 thereon may be formed of metals, such as copper, aluminum, gold or silver, or by conductive inks formed by known technologies, such as by thin-film or thick-film deposition. If the contact pads thereon are not of a non-oxidizing material, such as a precious metal, then the contacts should be passivated with a precious metal coating or alloy for consistent long-term stability and integrity of electrical contact, as is also the case for the device attached to the substrate.
  • a non-oxidizing material such as a precious metal
  • Electronic devices 30, 44, 46 are positioned with their respective first surfaces proximate the first surface of substrate 20 so that the respective contact pads of electronic devices 30, 44, 46 are adjacent the respective corresponding contact pads 24 on substrate 20, i.e. in a flip chip manner.
  • Electronic devices 30, 44, 46 are attached to substrate 20 by a plurality of flexible conductive adhesive bumps 40 that provide the mechanical attachment of the respective device 30, 44, 46 to substrate 20 as well as provide a low impedance electrical connection between each respective contact pad 34, 45, 46 and its counterpart correspondingly located on substrate 20, typically
  • the conductive adhesive 40 be "flexible” by which is meant that it has a low modulus of elasticity. Conductive adhesives having a modulus of elasticity of less than about 35,000 kg/cm 2 (about 500,000 psi) as a filled composite are necessary.
  • the adhesive which may include a thermoplastic or a thermosetting resin, or a blend or copolymer thereof, is rendered conductive by the inclusion of small particles of conductive material therein, which also increase its modulus of elasticity over that as a neat resin.
  • Suitable flexible conductive adhesives include type LTP8150 liquid flexible-thermoplastic conductive adhesive, types ESS8450 (silver filler), ESS8456 (silver-palladium alloy filler), ESS8457 (gold-plated copper filler), ESS8458 (gold powder filler) and ESS8459 (gold-plated nickel filler) flexible epoxy- based adhesive pastes and types PSS8156 (silver-palladium alloy filler), PSS8157 (gold-plated copper filler), PSS8158 (gold powder filler) and PSS8159 (gold-plated nickel filler) flexible paste adhesives, all of which are commercially available from Al Technology, Inc. of Princeton, New Jersey.
  • Type PSS8150 flexible conductive adhesive includes thermoplastic resins having a glass transition temperature below -20°C and having more than 30% elongation of dimension before fracture.
  • Type ESS8450 flexible conductive adhesive includes modified thermosetting epoxy resins having a glass transition temperature below 0°C and having more than 30% elongation of linear dimension before fracture. Thermoplastic resins having a melt flowable temperature below 300°C are preferred.
  • FIGURE 2 are shown graphical representations of the modulus of elasticity (in psi) as a function of temperature (in °C) for various conductive adhesives.
  • Conventional adhesives such as solder and epoxy exhibit modulii of elasticity exceeding about 70,000 kg/cm 2 (about 1,000,000 psi) over most of the temperature range over which semiconductor devices are typically operated.
  • a typical operating temperature range specified for semiconductor devices is -55 to +150 °C for devices intended for demanding applications such as automotive, aerospace and military applications, and devices intended for less demanding applications such as in home entertainment and appliance applications, may have a lesser temperature range specified.
  • Flexible conductive adhesives to be employed in the present invention exhibit modulii of elasticity of about 35,000 kg/cm 2 (about 500,000 psi) or less over at least about 50% of the operating temperature range over which semiconductor devices are specified to operate.
  • Preferred adhesives exhibit modulii of elasticity of less than about 7,000 kg/cm 2 (about 100,000 psi) over such temperature range, as is exhibited by type ESS8459, and even less than about 3,500 kg/cm 2 (about 50,000 psi), as is exhibited by type PSS8159, both of which conductive adhesives have glass transition temperatures of about -55 to -60°C.
  • Suitable conductive fillers for the flexible conductive adhesive include silver, gold, palladium, or platinum particles (flakes, spheres or powder) silver-palladium alloy particles, and gold-plated copper or nickel particles, as are included in various ones of the aforementioned flexible conductive adhesives available from Al
  • the silver-palladium alloy powder fillers were most resistant to silver migration when the proportion of palladium is at least in the range of about 10- 30%; although higher percentages of palladium provide greater resistance to silver migration, the fillers may become too costly for many applications. Other alloys of precious metals are also suitable. Flexible conductive adhesive connections according to the present invention can exhibit contact resistance of 0.1 ohm or less.
  • one preferred flexible conductive adhesive includes a conductive filler including gold-plated and palladium-plated copper flakes.
  • Another preferred flexible conductive adhesive includes a conductive filler including gold-plated and palladium- plated nickel flakes.
  • Other non-precious metals such as aluminum, and other non- precious metal alloy cores may also be used effectively with precious metal plating. The choice of core material and plating material may be made based on cost and ease of plating.
  • Another flexible conductive adhesive is made with specifically prepared silver particulate to exhibit a volume electrical resistivity of less than 0.00009 ohm- cm thereby to allow a higher current to flow through a particular interconnection, or, in other words, to allow higher current densities in the interconnections.
  • the conductive fillers are not limited to those specifically mentioned above, but the filler particles must be at least passivated to resist oxidation by a coating or plating of precious metal where the core of the particle is not made of a precious metal.
  • the precious metal coating should be more than about 5% by weight to provide stability against long term high temperature oxidation, such as can occur when the precious metal coating is excessively thin, that will slowly cause degradation of the bulk electrical resistivity characteristic of the filler.
  • the precious metal coating exceeds about 50% of the total weight of the filler, the cost effectiveness of using coated metals is lost.
  • a gold content in the range from about 5% to 30% by weight is effective for satisfactory electrical performance and cost effectiveness.
  • the foregoing is a low-cost flexible conductive adhesive interconnection that because it has a low modulus of elasticity will flex and not be vulnerable to the stresses induced by the inherent CTE difference between substrate
  • semiconductor substrate 32 in plan view includes a plurality of contact pads or bonding pads 34 on the top surface thereof.
  • Contact pads 34 may be around the periphery of substrate 32, or in the interior of substrate 32, or both as illustrated, as may be convenient to the designers of the semiconductor device 30.
  • Areas of substrate 32 that do not contain contact pads 34 are passivated with inorganic nitride, such as silicon nitride, or other insulating coating, and will not receive flexible conductive adhesive. Bumps of flexible conductive adhesive 40 will be applied over each of the plurality of contact pads 34 as described below.
  • FIGURE 4 is a cross-sectional view of the semiconductor device of FIGURE 3 taken at the section line 3-3 therein.
  • Contact pads 34 comprise aluminum pads 37 deposited on the semiconductor substrate 32 at the locations to which electrical contact is to be made for electrical function of the circuit (not shown) formed thereon, and aluminum pads 37 are passivated by a deposited metal layer 38 of a non-oxidizing metal, preferably a sequence of nickel and gold or other precious metal, such as gold, silver, platinum, palladium, or an alloy thereof.
  • Nickel and chromium may also be employed as a non-oxidizing passivation.
  • the contact pads 24 of substrate 20 are also passivated with a non-oxidizing metal. As is normal in semiconductor fabrication, but is not necessary, the thickness of the layer 36 of inorganic passivation is greater than the thickness of the contact pads 34.
  • a plurality of flexible conductive adhesive bumps 40 are deposited on the plurality of contact pads 34.
  • Flexible conductive adhesive bumps 40 are deposited and built up of a flexible thermoplastic conductive adhesive, such as liquid thermoplastic conductive adhesive LTP8150, sold commercially by Al Technology, Inc., on the nickel-gold passivation layer 38 of contact pads 34.
  • the ratio of resin to silver filler is preferably between approximately 100:100 and 100:600 to produce a volume resistivity as deposited of about 0.00015 ohm-cm.
  • the viscosity of the admixture of liquid thermoplastic adhesive with silver flakes is adjusted with an ester alcohol solvent, such as is sold commercially by Eastman Kodak Chemicals under the trade name Texanol, to approximately 200,000 cp as measured at 0.5 rpm of cone-and-plate using viscosity measurement apparatus available commercially from Brookfield Company of Stoughton, Massachusetts.
  • an ester alcohol solvent such as is sold commercially by Eastman Kodak Chemicals under the trade name Texanol
  • Flexible conductive adhesive to form bumps 40 may be deposited using a standard stainless-steel stencil or screen where the bump dimension is 75 micrometers or larger, or by ink-jet printing, contact deposition, preform lamination, or other suitable means of deposition.
  • the bump may be circular or rectangular in shape. While the size and shape of the bump are not critical for most applications, it is preferred that the dimension (diameter) of bump 40 be at least as large as the dimension (diameter) of contact pad 34 so as to exhibit the lowest possible contact resistance when assembled into the final device 10.
  • the liquid thermoplastic paste is allowed to dry at 60-80°C for 30 to 60 minutes for deposits having a wet thickness of 75 to 125 micrometers.
  • the resulting height of the adhesive bump 40 when dry is typically 50-60% of the wet thickness and the bumps will typically be uniform in diameter to a precision approaching 98% and in bump height to a precision approaching 90%.
  • the height of the dried bumps is typically 50-100 micrometers.
  • the flexible conductive adhesive bumps 40 are preferably deposited when the semiconductor chip 30 is in wafer form after the aluminum bond pads 37 have been passivated with nickel-gold layer 38 to prevent oxidation.
  • the wafer with the dry conductive bumps 40 thereon can be further exposed to 200°C for 1-5 seconds to improve the adhesion of the adhesive bumps 40 to the contact pads 34.
  • the prepared wafer may then be diced into individual substrate dies which may be stored at ambient temperature before subsequent assembly into an electronic device.
  • the prepared semiconductor device 30 with bumps of flexible conductive adhesive thereon as shown in FIGURE 5 is assembled onto the next level board, i.e. substrate 20, to form the electronic device 10 as shown in FIGURE 1 as follows.
  • Semiconductor device 30 is aligned over substrate 20 so that the respective contact pads 24, 34 of substrate 20 and semiconductor device 30 are aligned.
  • Device 30 and substrate 20 are pressed together and flexible adhesive bumps 40 bond the respective contact pads together instantly if the temperature is in the range of 195-215°C and the placement pressure is about 0.7 kg/cm 2 (about 10 psi).
  • the substrate 20 is preheated to a temperature of about 150-200°C while the chuck picking up semiconductor chip 30 is preheated to about 220-280°C.
  • the tools and temperatures employed in the method of assembly described above are compatible with those used for traditional placement and attachment of flip-chip devices having solder bumps by reflow soldering.
  • the contact pads of the flip-chip device are aligned with the corresponding contact pads of the substrate and are then pressed together at a temperature of less than 300°C and pressure of less than 0.7 kg/cm 2 (10 psi), and the bonding is achieved within about 10 seconds.
  • an underfill is an insulative adhesive material placed in the spaces between the conductive interconnections between the mounted device, such as a flip-chip device, and a substrate.
  • suitable underfill materials are non-conductive flexible adhesives that have substantially the same or lower modulus of elasticity as that of the flexible conductive adhesive employed for the conductive interconnections between the semiconductor device and the substrate, i.e. less than about 35,000 kg/cm 2 (about 500,000 psi).
  • Electronic device 100 of FIGURE 6 includes an insulating substrate 120 on which are aligned and mounted a plurality of electronic devices, such as semiconductor chip 130, chip resistor 144 and chip capacitor 146.
  • Semiconductor chip 130 includes on a first surface of substrate 132 a plurality of contact pads 134 for making electrical connections between the electronic circuit contained in the semiconductor chip 130 and external electronic elements.
  • resistor 144 and capacitor 146 each include on a respective first surface a plurality of contact pads for making electrical connections between the resistive and capacitive circuit elements respectively contained in chip resistor 144 and in chip capacitor 146 and external electronic elements via substrate 120.
  • Substrate 120 includes on a first surface thereof printed wiring conductors 122 that form the conductors of an electronic circuit in conventional manner.
  • a plurality of contact pads 124 are formed on the conductors 122 of substrate 120 at locations that correspond to the locations of corresponding bonding pads 134, 145, 147 of the electronic devices 130, 144, 146, respectively, to be mounted thereon.
  • the arrangement, size and spacing of the contact pads 124 of substrate 120 match the arrangement, size and spacing of the contact pads 134 of semiconductor device 130.
  • Substrate 120 may be fabricated of laminates such as FR-4 fiberglass or BT material, or of alumina, ceramic or other suitable insulating material and the conductors 122 thereon may be formed of metals, such as copper, aluminum, gold or silver, or by conductive inks formed by known technologies, such as by thin-film or thick-film deposition.
  • the contacts should be passivated with a precious metal coating or alloy for consistent long-term stability and integrity of electrical contact, as is also the case for the device attached to the substrate.
  • Electronic devices 130, 144, 146 are positioned with their respective first surfaces proximate the first surface of substrate 120 so that the respective contact pads of electronic devices 130, 144, 146 are adjacent the respective corresponding contact pads 124 on substrate 120.
  • Electronic devices 130, 144, 146 are attached to substrate 120 by a plurality of flexible conductive adhesive bumps 140 that provide the mechanical attachment of the respective device 130, 144, 146 to substrate 120 as well as provide a low impedance electrical connection between each respective contact pad 134, 145, 146 and its counterpart correspondingly located on substrate 120.
  • Insulating flexible underfill 150 substantially fills the interstices or spaces between the devices 130, 144, 146 and substrate 120 not occupied by flexible conductive adhesive 140 in the embodiment of FIGURE 5.
  • the conductive adhesive 140 as well as the insulating adhesive 150 both be "flexible” by which is meant that each has a modulus of elasticity of less than about 35,000 kg/cm 2 (about 500,000 psi).
  • Suitable flexible conductive adhesives which are commercially available from Al Technology, Inc. of Princeton, New Jersey, are identified above in relation to the embodiment of FIGURE
  • the non-conductive or insulating resin which may be a thermoplastic or a thermosetting resin, may be selected from flexible underfill or encapsulant materials, such as the MEE7650-5 epoxy-based encapsulant material also available from Al Technology, Inc., which material has a modulus of elasticity of less than 1050 kg/cm 2 (15,000 psi) and a glass transition temperature of less than -20°C.
  • this flexible insulting underfill also helps to prevent silver migration between the contact pads of components 130, 144, 146 or of substrate 120, as might occur under a high humidity condition.
  • semiconductor substrate 132 in plan view includes a plurality of contact pads or bonding pads 134 on the top surface thereof. Areas of substrate 132 that do not contain contact pads 134 are passivated with inorganic nitride, such as silicon nitride, or other insulating coating, and will receive the flexible non-conductive adhesive 150. Bumps of flexible conductive adhesive 140 are applied over each of the plurality of contact pads 134 and a pattern of insulating flexible adhesive 150 is applied in the spaces between the flexible conductive adhesive bumps as described below.
  • inorganic nitride such as silicon nitride, or other insulating coating
  • the bumps of flexible conductive adhesive 140 and the pattern of non-conductive flexible adhesive 150 be applied at the wafer level to all of the substratedies 132 formed thereon before the wafer is scored and the individual substrate dies separated, although the adhesive could be applied to individual substrates 132, if desired. It is further preferred that insulating flexible adhesive 150 not completely fill the spaces between contact pads 34 to allow for the flexible adhesives 140, 150 to flow and fill voids during bonding of semiconductor device 130 to substrate 120.
  • FIGURE 8 is a cross-sectional view of the semiconductor device 130 of FIGURE 7 taken at the section line 7-7 therein.
  • Contact pads 134 comprise aluminum pads 137 deposited on the semiconductor substrate 132 at the locations to which electrical contact is to be made for electrical function of the circuit (not shown) formed thereon.
  • Aluminum pads 137 are passivated by a deposited metal layer 138 of a non-oxidizing metal, preferably a sequence of nickel and gold or nickel and palladium layers, or another precious metal, such as gold, silver, platinum, palladium, or an alloy thereof.
  • the thickness of the layer 136 of inorganic passivation is substantially the same as the thickness of the contact pads 134.
  • a plurality of flexible conductive adhesive bumps 140 are deposited on the plurality of contact pads 134.
  • Flexible conductive adhesive bumps 140 are deposited and built up of a flexible thermoplastic conductive adhesive, such as liquid thermoplastic conductive adhesive LTP8150, sold commercially by Al Technology,
  • the size of bump 140 be at least as large as the contact pad 134 so as to exhibit the lowest possible contact resistance when assembled into the final device 100.
  • the insulating flexible adhesive 150 may be patterned to fill the spaces between bumps 140 or may preferably be patterned to not completely fill such spaces so as to allow for flow of both flexible conductive adhesive 140 and flexible insulating adhesive 150 when semiconductor device 130 is assembled with substrate 120.
  • the flexible conductive adhesive bumps 140 and the patterns of flexible insulating adhesive 150 are preferably deposited when the semiconductor chip 30 is in wafer form after the aluminum bond pads 137 have been passivated with nickel and gold layers 38 or other precious metal to prevent oxidation.
  • the prepared wafer may then be diced into individual substrate dies which may be stored at ambient temperature before subsequent assembly into an electronic device.
  • the deposition of flexible conductive adhesive to form bumps 140, as well as the deposition of a pattern of flexible insulating adhesive 150, may be performed using a standard stainless-steel stencil or screen, or by ink-jet printing, contact deposition, preform lamination or other suitable means of deposition.
  • the flexible insulating adhesive employed as the underfill are those that, like the preferred flexible conductive adhesives, may be stored at ambient temperature for extended periods of time after deposition and drying and before final assembly bonding. Examples of suitable materials are liquid thermoplastic paste type LTP7150 and liquid epoxy type LESP7450 available from Al Technology, Inc. LTP7150 is a thermoplastic paste that can be deposited and B-staged to form a solid film by curing at 60-80°C for 30-60 minutes.
  • LESP7450 is an epoxy paste that can be deposited and B-staged to form a solid film by curing at 60-80°C for 30-60 minutes.
  • These modified B-stageable flexible adhesives has in its neat resin form a molecular structure such that the overall glass transition temperature is below -55°C.
  • Both of the B-staged flexible insulating adhesives have a higher flow index and a lower modulus of elasticity than those of the flexible conductive adhesive bumps. This furthers protection at the edges of a device when the insulating adhesive flows and fills the spaces near the edge of the device. Mechanical testing under highly-accelerated moisture and temperature exposure showed less than 20% change in bond strength and no delamination of the bonds.
  • the prepared semiconductor device 130 with bumps of flexible conductive adhesive 140 and a pattern of insulating flexible adhesive 150 thereon as shown in FIGURE 8 is assembled onto the next level board, i.e. substrate 120, to form the electronic device 100 as shown in FIGURE 6 as follows.
  • Semiconductor device 130 is aligned over substrate 120 so that the respective contact pads 124, 134 of substrate 120 and semiconductor device 130 are aligned.
  • Device 130 and substrate 120 are pressed together and flexible adhesive bumps 140 bond the respective contact pads 124, 134 together instantly if the temperature is in the range of 195-215°C and the placement pressure is about 10 psi.
  • the insulating flexible adhesive 150 bonds the areas between contact pads 124 of substrate 120 to the corresponding areas between contact pads 134 of semiconductive device 130.
  • the substrate 120 is preheated to a temperature of about 150-200°C while the chuck picking up semiconductor chip 130 is preheated to about 220-280°C.
  • the assembly process is similar where a flexible epoxy adhesive is employed.
  • the placement chuck is maintained at a lower temperature of 150-175 °C and the die to be placed onto the next level board substrate is allowed to cure for an additional five minutes at 150-175°C without pressure or other tooling before it is assembled.
  • the temperature of the placement chuck (and of the die it holds) and of the substrate must be maintained a few degrees above the temperature at which the flexible adhesive conductive bumps and insulating adhesive underfill, if any, are rendered fiowable.
  • the contact pads 34 and the adhesive bumps 40 may be of the same size. In some cases, however, because of the relatively small number of contact pads, the overall area of bonding may be relatively small and so it may be advantageous to have the conductive bumps substantially enlarged in relation to the area of the contact pads while maintaining the pitch (i.e. the center-to-center spacing between adjacent contact pads ) of the contact pads.
  • Such increase in the area of the flexible conductive bumps will increase the mechanical strength of the bond between semiconductor device 30 and substrate 20, as well as lowering the overall electrical resistance and increasing the current carrying capability of the flexible conductive interconnections.
  • the aggregate area of the contact pads 34 is substantially less than about
  • the bonding area may be insufficient to provide adequate bond strength without reinforcement.
  • the flexible conductive adhesive bumps 240 on semiconductor device 30 are intentionally enlarged so as to cover substantially more than the areas of the individual bond pads 34. Where enlarged conductive adhesive bumps 240 can be employed while maintaining the recommended minimum spacing between closest pads of more than 50 micrometers, the "overhang" of the conductive bumps 240 may increase the aggregate bonding area to more than about 50% and thus increase the bonding integrity using only the flexible conductive adhesive without need for an underfill layer.
  • the number of contact pads 34 is large and the pitch of the contact pads is small, it may be desirable to substantially reduce the area of the flexible conductive bumps while maintaining the pitch.
  • This reduction of the area of the conductive bumps helps to reduce the likelihood of bridging between adjacent interconnections during the bonding process.
  • the reduction of the area of the flexible interconnections is particularly useful where an insulating underfill is not employed.
  • conductive bumps 340 when contact pads 34 are closer together than about 100 micrometers, conductive bumps 340 with areas less than that of the contact pads 34 may be employed. In FIGURE 10, conductive bumps 340 are substantially smaller in area than are the bond pads 34 of semiconductor device 30. This approach is more suitable for low-current-density interconnections and where higher interconnection resistance can be tolerated by the electronic circuits of which substrate 20 and semiconductor device 30 form a part.
  • the substrate 20 circuit board material may be different from ceramic alumina which has a CTE of 7 ppm/°C.
  • the substrate 20 circuit board material may be different from ceramic alumina which has a CTE of 7 ppm/°C.
  • FR-4, BT and other organic substrate materials that have a much higher CTE so that the degree of CTE mismatch between silicon flip chips which have a CTE of 3ppm/°C and the substrate increases from the 7 ppm/°C CTE of alumina to the 17 ppm °C CTE of FR-4.
  • higher CTE mismatches e.g.
  • thermal cycling and shock are more likely to cause failures due to delamination or fracture of the interconnections.
  • electronic devices 10 according to the present invention assembled using flexible conductive adhesives types LTP8150 and ESS 8450 available from Al Technology, Inc. including silicon devices having an edge dimension as large as 16 mm bonded to aluminum substrates so as to have 3 vs 25 ppm °C CTE mismatches, thermal cycling from -65°C to 150°C for over 2000 cycles produced no detectable delamination or change in bond strength. Similar testing was performed on electronic devices employing a FR-4 substrate and no delamination or change in bond strength was found.
  • Suitable alternative deposition means such as stenciling, screening, masking, ink-jet printing, contact deposition, preform laminating, needle dispensing and others, may be used to deposit conductive adhesive bumps 40, 140, 240 onto the contact pads of the semiconductor device 30 or other electronic component 44, 46, or alternatively, to deposit conductive adhesive bumps 40, 140, 240 onto the contact pads of the substrate 20.
  • the flexible conductive adhesive bumps and the flexible insulating adhesive pattern may be deposited on the substrate.
  • the pattern of flexible insulating adhesive may be deposited on one of the semiconductor device or the substrate, and the flexible conductive adhesive bumps may be deposited upon the other one thereof.
  • the flexible insulating adhesive may be loaded with thermally conductive but insulating fillers.
  • suitable such adhesives include types LESP7455, LESP7555, LTP7555 and LTP7095 which are available from Al Technology, Inc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

L'invention concerne un dispositif électronique (10, 100) qui inclut une ou plusieurs microplaquettes de semi-conducteur (30, 130) interconnectées à un substrat d'une couche adjacente (20, 120) suivant la technique des puces à protubérances, au moyen d'une colle conductrice souple (40, 140) présentant module d'élasticité faible. La colle conductrice souple (40, 140) est appliquée sous forme de protubérances conductrices (40, 140) sur les pastilles de contact (24, 124) du substrat (20, 120) ou sur les pastilles de contact (34, 134) des microplaquettes de semi-conducteur (30, 130) et constituée d'une résine souple thermoplastique ou thermodurcissable remplie de particules conductrices. D'autres dispositifs électroniques (44, 46, 144, 146), tels que des composants encapsulés incluant des résistances, des condensateurs, etc., sont fixés au moyen de pastilles adhésives conductrices souples (24, 124, 34, 134), selon la même approche adoptée pour les microplaquettes de semi-conducteur (30, 130). Les pastilles de contact de la microplaquette (30, 130) et du substrat de la couche adjacente (20, 120) sont, de préférence, passivées par un revêtement métallique (38), de préférence un métal précieux, préalablement à leur interconnexion, afin d'inhiber l'oxydation des pastilles (37). A cette fin, on peut utiliser une matière de remplissage organique isolante souple (150) présentant, de préférence, sensiblement le même module d'élasticité faible que la colle conductrice souple (40, 140).
EP99921432A 1998-04-24 1999-04-22 Dispositifs a puces a protuberances comprenant une colle conductrice souple Withdrawn EP1090535A4 (fr)

Applications Claiming Priority (11)

Application Number Priority Date Filing Date Title
US276259 1988-11-25
US8288598P 1998-04-24 1998-04-24
US82885P 1998-04-24
US8332698P 1998-04-28 1998-04-28
US83326P 1998-04-28
US9214798P 1998-07-09 1998-07-09
US92147P 1998-07-09
US09/166,633 US6108210A (en) 1998-04-24 1998-10-05 Flip chip devices with flexible conductive adhesive
US166633 1998-10-05
US09/276,259 US6297564B1 (en) 1998-04-24 1999-03-25 Electronic devices employing adhesive interconnections including plated particles
PCT/US1999/008787 WO1999056509A1 (fr) 1998-04-24 1999-04-22 Dispositifs a puces a protuberances comprenant une colle conductrice souple

Publications (2)

Publication Number Publication Date
EP1090535A1 EP1090535A1 (fr) 2001-04-11
EP1090535A4 true EP1090535A4 (fr) 2003-09-24

Family

ID=27536312

Family Applications (1)

Application Number Title Priority Date Filing Date
EP99921432A Withdrawn EP1090535A4 (fr) 1998-04-24 1999-04-22 Dispositifs a puces a protuberances comprenant une colle conductrice souple

Country Status (5)

Country Link
EP (1) EP1090535A4 (fr)
JP (1) JP2003527736A (fr)
KR (1) KR20010088292A (fr)
CN (1) CN1298626A (fr)
WO (1) WO1999056509A1 (fr)

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US7067916B2 (en) * 2001-06-20 2006-06-27 International Business Machines Corporation Extension of fatigue life for C4 solder ball to chip connection
EP1328015A3 (fr) * 2002-01-11 2003-12-03 Hesse & Knipps GmbH Méthode de montage d'un flip chip
CN1853113B (zh) * 2003-09-16 2010-10-06 皇家飞利浦电子股份有限公司 制造电子器件的方法
DE102005027652A1 (de) * 2005-06-15 2006-12-21 Robert Bosch Gmbh Elektrisch leitfähige, mechanisch flexible Verbindung zwischen elektrischen bzw. elektronischen Bauteilen
JP4654865B2 (ja) 2005-09-30 2011-03-23 パナソニック株式会社 電子部品実装方法
JP4939861B2 (ja) * 2006-07-14 2012-05-30 パナソニック株式会社 回路基板および携帯端末
JP2009290124A (ja) 2008-05-30 2009-12-10 Fujitsu Ltd プリント配線板
JP5217639B2 (ja) 2008-05-30 2013-06-19 富士通株式会社 コア基板およびプリント配線板
JP5217640B2 (ja) 2008-05-30 2013-06-19 富士通株式会社 プリント配線板の製造方法およびプリント基板ユニットの製造方法
DE102017001097A1 (de) * 2017-02-07 2018-08-09 Gentherm Gmbh Elektrisch leitfähige Folie
DE112018004669T5 (de) * 2017-10-23 2020-06-04 Illinois Tool Works Inc. Lötfreier flexibler verbinder mit hoher leistung für gedruckte leiterbahnen
CN109788643B (zh) * 2017-11-10 2024-07-30 泰连公司 铝基可焊接的触头
CN110534540B (zh) * 2018-05-25 2021-12-10 群创光电股份有限公司 电子装置及其制造方法
CN110071050B (zh) * 2019-04-24 2021-09-24 深圳第三代半导体研究院 一种芯片互连结构及其制备方法
EP3882721B1 (fr) 2020-03-18 2024-06-05 Casio Computer Co., Ltd. Dispositif d'affichage et horloge
JP7226415B2 (ja) * 2020-03-18 2023-02-21 カシオ計算機株式会社 表示装置及び時計
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Also Published As

Publication number Publication date
JP2003527736A (ja) 2003-09-16
EP1090535A1 (fr) 2001-04-11
WO1999056509A9 (fr) 2000-03-16
CN1298626A (zh) 2001-06-06
WO1999056509A1 (fr) 1999-11-04
KR20010088292A (ko) 2001-09-26

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