EP0973084A2 - Integrated circuit with a voltage regulator - Google Patents
Integrated circuit with a voltage regulator Download PDFInfo
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- EP0973084A2 EP0973084A2 EP99113089A EP99113089A EP0973084A2 EP 0973084 A2 EP0973084 A2 EP 0973084A2 EP 99113089 A EP99113089 A EP 99113089A EP 99113089 A EP99113089 A EP 99113089A EP 0973084 A2 EP0973084 A2 EP 0973084A2
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- voltage
- voltage divider
- voltage regulator
- integrated circuit
- divider
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/468—Regulating voltage or current wherein the variable actually regulated by the final control device is dc characterised by reference voltage circuitry, e.g. soft start, remote shutdown
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
Definitions
- the invention relates to an integrated circuit with a Voltage regulator for generating an internal supply voltage, one input for supplying an actual value and one Input for supplying a reference voltage as a setpoint has, the actual value by means of a first voltage divider is generated from the internal supply voltage and where the sensitivity of the voltage regulator from the resistance value at least one resistance element of the first Voltage divider depends.
- a corresponding voltage regulator is from U. Tietze, Ch. Schenk: Semiconductor circuit technology, 10th edition, Berlin 1993 described in section 18.3.3.
- the operational amplifier is a Switching transistor connected downstream of the output of the controller provides the voltage to be regulated, which comes from a higher Voltage is derived.
- the voltage divider ratio of the determine the first voltage divider and the value of the reference voltage the value of the regulated output voltage. On the arranged between the regulated output voltage and ground first voltage divider flows a leakage current, the more so is greater, the smaller the total resistance of the voltage divider is.
- the sensitivity of the voltage regulator is reduced. This sensitivity depends on the RC constant, which is determined by the Voltage divider and the associated input capacitance of the operational amplifier is determined.
- the invention has for its object an integrated Specify circuit of the type described at the beginning sufficient sensitivity of the voltage regulator is guaranteed and on the other hand, the leakage current that occurs is reduced.
- the first voltage divider is a second one Voltage divider connected in parallel, the same voltage divider ratio as the first voltage divider has and which can be activated by at least one switching element and can be deactivated.
- both voltage dividers have the same voltage divider ratio have, results both with activated and If the second voltage divider is deactivated, the same value as output voltage of the voltage regulator to be regulated, because that resulting voltage divider ratio is always constant. However, the resistance value is different in both cases, so that with the unchanged input capacity of the voltage regulator each have different RC constants result and thus the sensitivity (control speed) of the voltage regulator is changed. Is the second Voltage divider deactivated and only the first voltage divider effective, results from the relatively higher resistance value both a lower sensitivity of the voltage regulator as well as a lower leakage current that over the voltage divider flows.
- the second voltage divider activated, the total resistance results from the Parallel connection of the respective resistance elements and will therefore in any case less than in the previously described case, so that the sensitivity of the voltage regulator due to the reduced RC constant is increased, but at the same time the leakage current increases across the resulting voltage divider.
- At least one switching element that is used for activation or deactivation the second voltage divider is used via an operating mode signal to control that in a normal mode the integrated circuit turns the switching element on and the switching element in an energy-saving mode locks.
- an energy saving mode one integrated circuit an operating mode in which Current consumption significantly reduced compared to a normal operating mode is. This is achieved, for example, in that only certain basic functions are maintained while other functions can be switched off. Because of the low Current consumption in the energy saving mode is the one to be regulated Output voltage of the voltage regulator, which is used for supply the integrated circuit or parts thereof, exposed to a much lower load than in the Normal operating mode. Therefore, changes in load are also in the energy saving mode is extremely low. For this reason the voltage regulator does not have to be in the energy saving mode have the same sensitivity as in normal mode. Therefore, it is unproblematic in the energy saving mode higher resistance values of the first voltage divider to accept.
- the advantage to be achieved by the invention is the greater, the greater the difference between the resistance values of the first and second voltage dividers. Then results namely the biggest difference in the amount of each leakage current flowing through the resulting voltage divider.
- the voltage regulator can be an operational amplifier, for example his.
- the invention is applicable to all others Voltage regulators applicable where the control sensitivity depends on a voltage divider ratio.
- FIG. 1 shows an embodiment.
- the integrated circuit shown in FIG. 1 has an operational amplifier OP, which is fed by an external voltage V Ext .
- a reference voltage V Ref is supplied as a setpoint to a solitary input of the operational amplifier OP.
- the output of the operational amplifier is connected to the control terminal of a switching transistor T in the form of a p-channel transistor.
- the switching transistor T connects the external supply voltage V Ext via its main current path to the first electrode of a buffer capacitor C, the second electrode of which is connected to ground.
- An internal supply voltage V Int to be regulated is generated at the first electrode of the capacitor C by switching the switching transistor T. In order to close the control loop, the internal supply voltage V Int is fed back to an actual value input of the operational amplifier OP.
- a circuit node A which is arranged between the third R3 and the fourth R4 resistance element, is connected to the actual value input of the operational amplifier OP.
- the circuit shown in FIG. 1 has a second voltage divider, which is connected in parallel with the first voltage divider and has a first resistance element R1 and a second resistance element R2.
- the second voltage divider has a first switching element S1 in the form of a p-channel transistor between the internal supply voltage V Int and the first resistance element R1 and a second switching element S2 in the form of an n-channel transistor between the second resistance element R2 and ground.
- the control connections of these two switching elements S1, S2 are connected directly or via an inverter I to an operating mode signal EN.
- the operating mode signal EN it is possible to switch the two switching elements S1, S2 on simultaneously or to block them. In this way, the second voltage divider is activated in a normal operating mode of the integrated circuit or the second voltage divider is deactivated in an energy-saving mode.
- the voltage divider ratio of the first voltage divider R3, R4 matches the voltage divider ratio of the second voltage divider R1, R2. Therefore, in the normal operating mode in which the second voltage divider R1, R2 is activated, the same resulting voltage divider ratio results as in the energy-saving operating mode in which only the first voltage divider is effective. Thus, the internal supply voltage V Int to be regulated is regulated to the same value in both cases. However, the resistance values of the resistance elements of the first voltage divider R3, R4 are much larger than those of the second voltage divider R1, R2. This results in a much lower leakage current through the first voltage divider in the energy-saving mode than in the normal mode through the resulting voltage divider, which is formed by the parallel connection of the first and the second voltage divider.
- the sensitivity of the voltage regulator in the energy-saving mode is lower than in the normal mode, since the sensitivity and thus the control speed of the voltage regulator largely depends on the RC constant, which is formed by the resistance value of the respective voltage divider and the input capacitance of the actual value input of the operational amplifier OP.
- the input capacitance C P of the operational amplifier OP is shown in FIG. 1 for the sake of illustration.
- the RC constant is formed by the product of the resistance value of the parallel connection of the third resistance element R3 and the fourth resistance element R4 and the input capacitance CP.
- the normal operating mode it is formed by the product of the parallel connection of the resistance values of the first R1, the second R2, the third R3 and the fourth R4 resistance element and the input capacitance CP.
- the resistance elements R1, R2, R3, R4 can be formed, for example, by field effect transistors.
- the buffer capacitance C which serves to buffer the internal supply voltage V Int , can be formed, for example, by the input capacitances of circuit units supplied by the internal supply voltage. If these values are too low, an additional buffer capacity can be provided.
Abstract
Die integrierte Schaltung weist einen Spannungsregler (OP) zum Erzeugen einer internen Versorgungsspannung (VInt) auf, der einen Eingang zum Zuführen eines Istwertes und einen Eingang zum Zuführen einer Referenzspannung (VRef) als Sollwert aufweist. Der Istwert wird mittels eines ersten Spannungsteilers (R3, R4) aus der internen Versorgungsspannung (VInt) erzeugt. Die Empfindlichkeit des Spannungsreglers (OP) hängt vom Widerstandswert wenigstens eines Widerstandselementes (R3) des ersten Spannungsteilers ab. Dem ersten Spannungsteiler (R3, R4) ist ein zweiter Spannungsteiler (R1, R2) parallel geschaltet, der das gleiche Spannungsteilerverhältnis wie der erste Spannungsteiler aufweist und der durch wenigstens ein Schaltelement (S1, S2) aktivierbar und deaktivierbar ist. <IMAGE>The integrated circuit has a voltage regulator (OP) for generating an internal supply voltage (VInt), which has an input for supplying an actual value and an input for supplying a reference voltage (VRef) as a setpoint. The actual value is generated from the internal supply voltage (VInt) by means of a first voltage divider (R3, R4). The sensitivity of the voltage regulator (OP) depends on the resistance value of at least one resistance element (R3) of the first voltage divider. A second voltage divider (R1, R2) is connected in parallel to the first voltage divider (R3, R4) and has the same voltage divider ratio as the first voltage divider and which can be activated and deactivated by at least one switching element (S1, S2). <IMAGE>
Description
Die Erfindung betrifft eine integrierte Schaltung mit einem Spannungsregler zum Erzeugen einer internen Versorgungsspannung, der einen Eingang zum Zuführen eines Istwertes und einen Eingang zum Zuführen einer Referenzspannung als Sollwert aufweist, wobei der Istwert mittels eines ersten Spannungsteilers aus der internen Versorgungsspannung erzeugt wird und wobei die Empfindlichkeit des Spannungsreglers vom Widerstandswert wenigstens eines Widerstandselementes des ersten Spannungsteilers abhängt.The invention relates to an integrated circuit with a Voltage regulator for generating an internal supply voltage, one input for supplying an actual value and one Input for supplying a reference voltage as a setpoint has, the actual value by means of a first voltage divider is generated from the internal supply voltage and where the sensitivity of the voltage regulator from the resistance value at least one resistance element of the first Voltage divider depends.
Ein entsprechender Spannungsregler ist aus U. Tietze, Ch. Schenk: Halbleiterschaltungstechnik, 10. Auflage, Berlin 1993 in Kapitel 18.3.3 beschrieben. Als Spannungsregler, dem der Ist- und der Sollwert zugeführt werden, kommt ein Operationsverstärker zum Einsatz. Dem Operationsverstärker ist ein Schalttransistor nachgeschaltet, der am Ausgang des Reglers die zu regelnde Spannung bereitstellt, die aus einer höheren Spannung abgeleitet wird. Das Spannungsteilerverhältnis des ersten Spannungsteilers und der Wert der Referenzspannung bestimmen den Wert der geregelten Ausgangsspannung. Über den zwischen der geregelten Ausgangsspannung und Masse angeordneten ersten Spannungsteiler fließt ein Verluststrom, der um so größer ist, je kleiner der Gesamtwiderstand des Spannungsteilers ist. Vergrößert man jedoch den ohmschen Widerstand der Widerstandselemente des Spannungsteilers, wird die Empfindlichkeit des Spannungsreglers vermindert. Diese Empfindlichkeit hängt nämlich von der RC-Konstante ab, die durch den Spannungsteiler und die damit verbundene Eingangskapazität des Operationsverstärkers bestimmt wird.A corresponding voltage regulator is from U. Tietze, Ch. Schenk: Semiconductor circuit technology, 10th edition, Berlin 1993 described in section 18.3.3. As a voltage regulator to which the An operational amplifier comes as the actual value and the setpoint are supplied for use. The operational amplifier is a Switching transistor connected downstream of the output of the controller provides the voltage to be regulated, which comes from a higher Voltage is derived. The voltage divider ratio of the determine the first voltage divider and the value of the reference voltage the value of the regulated output voltage. On the arranged between the regulated output voltage and ground first voltage divider flows a leakage current, the more so is greater, the smaller the total resistance of the voltage divider is. However, if one increases the ohmic resistance of the Resistance elements of the voltage divider, the sensitivity of the voltage regulator is reduced. This sensitivity depends on the RC constant, which is determined by the Voltage divider and the associated input capacitance of the operational amplifier is determined.
Der Erfindung liegt die Aufgabe zugrunde, eine integrierte Schaltung der eingangs geschilderten Art anzugeben, bei der eine ausreichende Empfindlichkeit des Spannungsreglers gewährleistet ist und bei der andererseits der auftretende Verluststrom reduziert ist.The invention has for its object an integrated Specify circuit of the type described at the beginning sufficient sensitivity of the voltage regulator is guaranteed and on the other hand, the leakage current that occurs is reduced.
Diese Aufgabe wird mit einer integrierten Schaltung gemäß Anspruch 1 gelöst. Vorteilhafte Aus- und Weiterbildungen der Erfindung sind Gegenstand abhängiger Ansprüche.This object is achieved with an integrated circuit 1 solved. Advantageous training and further education of Invention are the subject of dependent claims.
Erfindungsgemäß ist dem ersten Spannungsteiler ein zweiter Spannungsteiler parallel geschaltet, der das gleiche Spannungsteilerverhältnis wie der erste Spannungsteiler aufweist und der durch wenigstens ein Schaltelement aktivierbar und deaktivierbar ist.According to the invention, the first voltage divider is a second one Voltage divider connected in parallel, the same voltage divider ratio as the first voltage divider has and which can be activated by at least one switching element and can be deactivated.
Da beide Spannungsteiler das gleiche Spannungsteilerverhältnis aufweisen, ergibt sich sowohl bei aktiviertem als auch bei deaktiviertem zweiten Spannungsteiler derselbe Wert der zu regelnden Ausgangsspannung des Spannungsreglers, denn das resultierende Spannungsteilerverhältnis ist immer konstant. Allerdings ist der Widerstandswert in beiden Fällen unterschiedlich, so daß sich mit der unveränderten Eingangskapazität des Spannungsreglers jeweils unterschiedliche RC-Konstanten ergeben und somit die Empfindlichkeit (Regelgeschwindigkeit) des Spannungsreglers verändert wird. Ist der zweite Spannungsteiler deaktiviert und nur der erste Spannungsteiler wirksam, ergibt sich aufgrund des relativ höheren Widerstandswertes sowohl eine geringere Empfindlichkeit des Spannungsreglers als auch ein geringerer Verluststrom, der über den Spannungsteiler fließt. Ist dagegen der zweite Spannungsteiler aktiviert, ergibt sich der Gesamtwiderstand aus der Parallelschaltung der jeweiligen Widerstandselemente und wird daher in jedem Fall geringer als im zuvor geschilderten Fall, so daß die Empfindlichkeit des Spannungsreglers aufgrund der verminderten RC-Konstante erhöht wird, gleichzeitig aber auch der Verluststrom über den resultierenden Spannungsteiler zunimmt. Somit ergibt sich vorteilhafterweise die Möglichkeit, durch Aktivierung bzw. Deaktivierung des zweiten Spannungsteilers die integrierte Schaltung in zwei verschiedenen Betriebsarten mit unterschiedlichen Empfindlichkeiten des Spannungsreglers und unterschiedlich hohen Verlustströmen zu betreiben.Because both voltage dividers have the same voltage divider ratio have, results both with activated and If the second voltage divider is deactivated, the same value as output voltage of the voltage regulator to be regulated, because that resulting voltage divider ratio is always constant. However, the resistance value is different in both cases, so that with the unchanged input capacity of the voltage regulator each have different RC constants result and thus the sensitivity (control speed) of the voltage regulator is changed. Is the second Voltage divider deactivated and only the first voltage divider effective, results from the relatively higher resistance value both a lower sensitivity of the voltage regulator as well as a lower leakage current that over the voltage divider flows. In contrast, is the second voltage divider activated, the total resistance results from the Parallel connection of the respective resistance elements and will therefore in any case less than in the previously described case, so that the sensitivity of the voltage regulator due to the reduced RC constant is increased, but at the same time the leakage current increases across the resulting voltage divider. This advantageously results in the possibility of by activating or deactivating the second voltage divider the integrated circuit in two different operating modes with different sensitivities of the voltage regulator and operate different leakage currents.
Nach einer Weiterbildung der Erfindung ist es vorgesehen, das wenigstens eine Schaltelement, das zur Aktivierung bzw. Deaktivierung des zweiten Spannungsteilers dient, über ein Betriebsartsignal zu steuern, das in einer Normalbetriebsart der integrierten Schaltung das Schaltelement leitend schaltet und das in einer Energiesparbetriebsart das Schaltelement sperrt.According to a development of the invention, it is provided that at least one switching element that is used for activation or deactivation the second voltage divider is used via an operating mode signal to control that in a normal mode the integrated circuit turns the switching element on and the switching element in an energy-saving mode locks.
Generell versteht man unter einer Energiesparbetriebsart einer integrierten Schaltung eine Betriebsart, in der deren Stromaufnahme deutlich gegenüber einer Normalbetriebsart reduziert ist. Dies wird beispielsweise dadurch erreicht, daß nur bestimmt Grundfunktionen aufrechterhalten werden, während andere Funktionen abgeschaltet werden. Durch die geringe Stromaufnahme in der Energiesparbetriebsart wird die zu regelnde Ausgangsspannung des Spannungsreglers, die zur Versorgung der integrierten Schaltung bzw. Teile derselben dient, einer wesentlich geringeren Belastung ausgesetzt als in der Normalbetriebsart. Daher sind auch Belastungsänderungen in der Energiesparbetriebsart äußerst gering. Aus diesem Grund muß der Spannungsregler in der Energiesparbetriebsart nicht dieselbe Empfindlichkeit aufweisen wie in der Normalbetriebsart. Daher ist es unproblematisch, in der Energiesparbetriebsart höhere Widerstandswerte des ersten Spannungsteilers in Kauf zu nehmen. Diese höheren Widerstandswerte bewirken, daß in der Energiesparbetriebsart auch der durch den Spannungsregler verursachte Verluststrom bedeutend geringer ist als in der Normalbetriebsart. Umgekehrt weist der Spannungsregler in der Normalbetriebsart durch Aktivierung des zweiten Spannungsteilers die für die dort auftretenden höheren Strombelastungen der geregelten internen Versorgungsspannung undden stärkeren Belastungswechseln notwendige höhere Empfindlichkeit auf, die sich in einer höheren Regelgeschwindigkeit äußert.Generally one understands an energy saving mode one integrated circuit an operating mode in which Current consumption significantly reduced compared to a normal operating mode is. This is achieved, for example, in that only certain basic functions are maintained while other functions can be switched off. Because of the low Current consumption in the energy saving mode is the one to be regulated Output voltage of the voltage regulator, which is used for supply the integrated circuit or parts thereof, exposed to a much lower load than in the Normal operating mode. Therefore, changes in load are also in the energy saving mode is extremely low. For this reason the voltage regulator does not have to be in the energy saving mode have the same sensitivity as in normal mode. Therefore, it is unproblematic in the energy saving mode higher resistance values of the first voltage divider to accept. These higher resistance values cause that in the energy saving mode also by the voltage regulator leakage current caused is significantly lower than in normal mode. Conversely, the voltage regulator in normal mode by activating the second one Voltage divider for the higher current loads occurring there the regulated internal supply voltage and stronger changes in stress necessitate higher sensitivity on that in a higher control speed expresses.
Der durch die Erfindung zu erzielende Vorteil ist um so größer, je größer der Unterschied zwischen den Widerstandswerten des ersten und des zweiten Spannungsteilers ist. Dann ergibt sich nämlich der größte Unterschied in der Höhe des jeweils durch den resultierenden Spannungsteiler fließenden Verluststroms.The advantage to be achieved by the invention is the greater, the greater the difference between the resistance values of the first and second voltage dividers. Then results namely the biggest difference in the amount of each leakage current flowing through the resulting voltage divider.
Der Spannungsregler kann beispielsweise ein Operationsverstärker sein. Die Erfindung ist jedoch auch auf alle anderen Spannungsregler anwendbar, bei denen die Regelempfindlichkeit von einem Spannungsteilerverhältnis abhängt.The voltage regulator can be an operational amplifier, for example his. However, the invention is applicable to all others Voltage regulators applicable where the control sensitivity depends on a voltage divider ratio.
Die Erfindung wird im folgenden anhand der einzigen Figur 1 näher erläutert, die ein Ausführungsbeispiel zeigt.The invention is illustrated below with reference to the single FIG. 1 explained in more detail, which shows an embodiment.
Die in Figur 1 dargestellte integrierte Schaltung weist einen Operationsverstärker OP auf, der von einer externen Spannung VExt gespeist wird. Einem Soliwerteingang des Operationsverstärkers OP wird eine Referenzspannung VRef als Sollwert zugeführt. Der Ausgang des Operationsverstärkers ist mit dem Steueranschluß eines Schalttransistors T in Form eines p-Kanal-Transistors verbunden. Der Schalttransistor T verbindet über seinen Hauptstrompfad die externe Versorgungsspannung VExt mit der ersten Elektrode eines Pufferkondensators C, dessen zweite Elektrode mit Masse verbunden ist. An der ersten Elektrode des Kondensators C wird durch Schalten des Schalttransistors T eine zu regelnde interne Versorgungsspannung VInt erzeugt. Um den Regelkreis zu schließen, ist die interne Versorgungsspannung VInt auf einen Istwerteingang des Operarionsverstärkers OP rückgekoppelt. Dies geschieht mittels eines zwischen der internen Versorgungsspannung VInt und Masse angeordneten ersten Spannungsteilers aus einem dritten Widerstandselement R3 und einem vierten Widerstandselement R4. Ein Schaltungsknoten A, der zwischen dem dritten R3 und dem vierten R4 Widerstandselement angeordnet ist, ist mit dem Istwerteingang des Operationsverstärkers OP verbunden.The integrated circuit shown in FIG. 1 has an operational amplifier OP, which is fed by an external voltage V Ext . A reference voltage V Ref is supplied as a setpoint to a solitary input of the operational amplifier OP. The output of the operational amplifier is connected to the control terminal of a switching transistor T in the form of a p-channel transistor. The switching transistor T connects the external supply voltage V Ext via its main current path to the first electrode of a buffer capacitor C, the second electrode of which is connected to ground. An internal supply voltage V Int to be regulated is generated at the first electrode of the capacitor C by switching the switching transistor T. In order to close the control loop, the internal supply voltage V Int is fed back to an actual value input of the operational amplifier OP. This is done by means of a first voltage divider, arranged between the internal supply voltage V Int and ground, comprising a third resistance element R3 and a fourth resistance element R4. A circuit node A, which is arranged between the third R3 and the fourth R4 resistance element, is connected to the actual value input of the operational amplifier OP.
Weiterhin weist die in Figur 1 gezeigte Schaltung einen zweiten Spannungsteiler auf, der dem ersten Spannungsteiler parallel geschaltet ist und ein erstes Widerstandselement R1 und ein zweites Widerstandselement R2 aufweist. Der zweite Spannungsteiler weist zwischen der internen Versorgungsspannung VInt und dem ersten Widerstandselement R1 ein erstes Schaltelement S1 in Form eines p-Kanal-Transistors und zwischen dem zweiten Widerstandselement R2 und Masse ein zweites Schaltelement S2 in Form eines n-Kanal-Transistors auf. Die Steueranschlüsse dieser beiden Schaltelemente S1, S2 sind direkt bzw. über einen Inverter I mit einem Betriebsartsignal EN verbunden. Mittels des Betriebsartsignals EN ist es möglich, die beiden Schaltelemente S1, S2 gleichzeitig leitend zu schalten oder zu sperren. Auf diese Weise erfolgt eine Aktivierung des zweiten Spannungsteilers in einer Normalbetriebsart der integrierten Schaltung bzw. eine Deaktivierung des zweiten Spannungsteilers in einer Energiesparbetriebsart.Furthermore, the circuit shown in FIG. 1 has a second voltage divider, which is connected in parallel with the first voltage divider and has a first resistance element R1 and a second resistance element R2. The second voltage divider has a first switching element S1 in the form of a p-channel transistor between the internal supply voltage V Int and the first resistance element R1 and a second switching element S2 in the form of an n-channel transistor between the second resistance element R2 and ground. The control connections of these two switching elements S1, S2 are connected directly or via an inverter I to an operating mode signal EN. By means of the operating mode signal EN it is possible to switch the two switching elements S1, S2 on simultaneously or to block them. In this way, the second voltage divider is activated in a normal operating mode of the integrated circuit or the second voltage divider is deactivated in an energy-saving mode.
Das Spannungsteilerverhältnis des ersten Spannungsteilers R3, R4 stimmt mit dem Spannungsteilerverhältnis des zweiten Spannungsteilers R1, R2 überein. Daher ergibt sich in der Normalbetriebsart, in der der zweite Spannungsteiler R1, R2 aktiviert ist, dasselbe resultierende Spannungsteilerverhältnis wie in der Energiesparbetriebsart, in der nur der erste Spannungsteiler wirksam ist. Somit wird in beiden Fällen die zu regelnde interne Versorgungsspannung VInt auf denselben Wert geregelt. Allerdings sind die Widerstandswerte der Widerstandselemente des ersten Spannungsteilers R3, R4 sehr viel größer als diejenigen des zweiten Spannungsteilers R1, R2. Somit ergibt sich in der Energiesparbetriebsart ein wesentlich geringerer Verluststrom durch den ersten Spannungsteiler als in der Normalbetriebsart durch den resultierenden Spannungsteiler, der durch die Parallelschaltung des ersten und des zweiten Spannungsteilers gebildet wird. The voltage divider ratio of the first voltage divider R3, R4 matches the voltage divider ratio of the second voltage divider R1, R2. Therefore, in the normal operating mode in which the second voltage divider R1, R2 is activated, the same resulting voltage divider ratio results as in the energy-saving operating mode in which only the first voltage divider is effective. Thus, the internal supply voltage V Int to be regulated is regulated to the same value in both cases. However, the resistance values of the resistance elements of the first voltage divider R3, R4 are much larger than those of the second voltage divider R1, R2. This results in a much lower leakage current through the first voltage divider in the energy-saving mode than in the normal mode through the resulting voltage divider, which is formed by the parallel connection of the first and the second voltage divider.
Gleichzeitig ist die Empfindlichkeit des Spannungsreglers in der Energiesparbetriebsart geringer als in der Normalbetriebsart, da die Empfindlichkeit und damit die Regelgeschwindigkeit des Spannungsreglers maßgeblich von der RC-Konstanten abhängt, die durch den Widerstandswert des jeweiligen Spannungsteilers und die Eingangskapazität des Istwerteingangs des Operationsverstärkers OP gebildet wird. Die Eingangskapazität CP des Operationsverstärkers OP ist in Figur 1 aus Gründen der Illustration eingezeichnet. In der Energiesparbetriebsart wird die RC-Konstante durch das Produkt des Widerstandswertes der Parallelschaltung des dritten Widerstandselementes R3 und des vierten Widerstandselementes R4 und der Eingangskapazität CP gebildet. In der Normalbetriebsart wird sie durch das Produkt aus der Parallelschaltung der Widerstandswerte des ersten R1, des zweiten R2, des dritten R3 und des vierten R4 Widerstandselementes und der Eingangskapazität CP gebildet.At the same time, the sensitivity of the voltage regulator in the energy-saving mode is lower than in the normal mode, since the sensitivity and thus the control speed of the voltage regulator largely depends on the RC constant, which is formed by the resistance value of the respective voltage divider and the input capacitance of the actual value input of the operational amplifier OP. The input capacitance C P of the operational amplifier OP is shown in FIG. 1 for the sake of illustration. In the energy-saving mode, the RC constant is formed by the product of the resistance value of the parallel connection of the third resistance element R3 and the fourth resistance element R4 and the input capacitance CP. In the normal operating mode, it is formed by the product of the parallel connection of the resistance values of the first R1, the second R2, the third R3 and the fourth R4 resistance element and the input capacitance CP.
Die Widerstandselemente R1, R2, R3, R4 können beispielsweise durch Feldeffekttransistoren gebildet sein. Die Pufferkapazität C, die zur Pufferung der internen Versorgungsspannung VInt dient, kann beispielsweise durch die Eingangskapazitäten von durch die interne Versorgungsspannung versorgten Schaltungseinheiten gebildet sein. Sollten diese zu geringe Werte aufweisen, kann eine zusätzliche Pufferkapazität vorgesehen sein.The resistance elements R1, R2, R3, R4 can be formed, for example, by field effect transistors. The buffer capacitance C, which serves to buffer the internal supply voltage V Int , can be formed, for example, by the input capacitances of circuit units supplied by the internal supply voltage. If these values are too low, an additional buffer capacity can be provided.
Claims (4)
bei der das wenigstens eine Schaltelement (S1, S2) über ein Betriebsartsignal (EN) gesteuert ist, das in einer Normalbetriebsart der integrierten Schaltung das wenigstens eine Schaltelement leitend schaltet und das in einer Energiesparbetriebsart das Schaltelement sperrt.Circuit according to claim 1,
in which the at least one switching element (S1, S2) is controlled via an operating mode signal (EN) which switches the at least one switching element to conductive in a normal operating mode of the integrated circuit and which blocks the switching element in an energy-saving operating mode.
deren erster Spannungsteiler (R3, R4) wesentlich hochohmiger ist als der zweite Spannungsteiler (R1, R2).Circuit according to one of the preceding claims,
whose first voltage divider (R3, R4) is significantly higher impedance than the second voltage divider (R1, R2).
deren Spannungsregler (OP) einen Operationsverstärker enthält, dem der Istwert und der Sollwert zugeführt werden.Circuit according to one of the preceding claims,
whose voltage regulator (OP) contains an operational amplifier to which the actual value and the setpoint are fed.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19832309 | 1998-07-17 | ||
| DE19832309A DE19832309C1 (en) | 1998-07-17 | 1998-07-17 | Integrated circuit with voltage regulator |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| EP0973084A2 true EP0973084A2 (en) | 2000-01-19 |
| EP0973084A3 EP0973084A3 (en) | 2000-04-05 |
| EP0973084B1 EP0973084B1 (en) | 2009-06-24 |
Family
ID=7874492
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP99113089A Expired - Lifetime EP0973084B1 (en) | 1998-07-17 | 1999-07-06 | Integrated circuit with a voltage regulator |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6133779A (en) |
| EP (1) | EP0973084B1 (en) |
| DE (2) | DE19832309C1 (en) |
| TW (1) | TWM251161U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100429724C (en) * | 2004-01-10 | 2008-10-29 | 因芬尼昂技术股份公司 | Semiconductor memory circuit and method for operating the same in a standby mode |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2789190B1 (en) * | 1999-01-28 | 2001-06-01 | St Microelectronics Sa | POWER SUPPLY REGULATED AT A HIGH RATE OF NOISE REJECTION OF A SUPPLY VOLTAGE |
| US6300810B1 (en) * | 1999-02-05 | 2001-10-09 | United Microelectronics, Corp. | Voltage down converter with switched hysteresis |
| KR100351931B1 (en) * | 2000-05-30 | 2002-09-12 | 삼성전자 주식회사 | Voltage Detecting Circuit For Semiconductor Memory Device |
| US6351137B1 (en) * | 2000-08-15 | 2002-02-26 | Pulsecore, Inc. | Impedance emulator |
| US6479974B2 (en) | 2000-12-28 | 2002-11-12 | International Business Machines Corporation | Stacked voltage rails for low-voltage DC distribution |
| DE10354534A1 (en) * | 2003-11-12 | 2005-07-14 | Atmel Germany Gmbh | Circuit arrangement for voltage detection |
| DE10360030A1 (en) * | 2003-12-19 | 2005-07-21 | Infineon Technologies Ag | Semiconductor memory with numerous memory cells addressable by word and bit lines, with at least two current generators, first generating preset current ono selected bit lines and/or preset word line with memory in active working mode |
| KR100586545B1 (en) * | 2004-02-04 | 2006-06-07 | 주식회사 하이닉스반도체 | Power Supply Circuit for Oscilator of Semi-conductor Memory Device and Voltage Pumping Device by that |
| US6956429B1 (en) * | 2004-02-09 | 2005-10-18 | Fairchild Semiconductor Corporation | Low dropout regulator using gate modulated diode |
| KR100596977B1 (en) * | 2004-08-20 | 2006-07-05 | 삼성전자주식회사 | Reference voltage circuit using both external reference voltage source and internal refrence voltage source and reference voltage generating method using the same |
| US9256239B2 (en) | 2011-03-17 | 2016-02-09 | Watlow Electric Manufacturing Company | Voltage controlling circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3105198A1 (en) * | 1981-02-13 | 1982-09-09 | Philips Patentverwaltung Gmbh, 2000 Hamburg | Circuit arrangement for accurate setting of an electrical voltage |
| JPS60238915A (en) * | 1984-05-11 | 1985-11-27 | Ikegami Tsushinki Co Ltd | Constant-current generating circuit |
| JPH0659413A (en) * | 1992-06-29 | 1994-03-04 | Eastman Kodak Co | Formation of color photograph element and picture |
| US5467009A (en) * | 1994-05-16 | 1995-11-14 | Analog Devices, Inc. | Voltage regulator with multiple fixed plus user-selected outputs |
| EP0846996A1 (en) * | 1996-12-05 | 1998-06-10 | STMicroelectronics S.r.l. | Power transistor control circuit for a voltage regulator |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3516556B2 (en) * | 1996-08-02 | 2004-04-05 | 沖電気工業株式会社 | Internal power supply circuit |
| US6066979A (en) * | 1996-09-23 | 2000-05-23 | Eldec Corporation | Solid-state high voltage linear regulator circuit |
-
1998
- 1998-07-17 DE DE19832309A patent/DE19832309C1/en not_active Expired - Fee Related
-
1999
- 1999-06-30 TW TW092217352U patent/TWM251161U/en not_active IP Right Cessation
- 1999-07-06 DE DE59915043T patent/DE59915043D1/en not_active Expired - Lifetime
- 1999-07-06 EP EP99113089A patent/EP0973084B1/en not_active Expired - Lifetime
- 1999-07-19 US US09/356,811 patent/US6133779A/en not_active Expired - Lifetime
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3105198A1 (en) * | 1981-02-13 | 1982-09-09 | Philips Patentverwaltung Gmbh, 2000 Hamburg | Circuit arrangement for accurate setting of an electrical voltage |
| JPS60238915A (en) * | 1984-05-11 | 1985-11-27 | Ikegami Tsushinki Co Ltd | Constant-current generating circuit |
| JPH0659413A (en) * | 1992-06-29 | 1994-03-04 | Eastman Kodak Co | Formation of color photograph element and picture |
| US5467009A (en) * | 1994-05-16 | 1995-11-14 | Analog Devices, Inc. | Voltage regulator with multiple fixed plus user-selected outputs |
| EP0846996A1 (en) * | 1996-12-05 | 1998-06-10 | STMicroelectronics S.r.l. | Power transistor control circuit for a voltage regulator |
Non-Patent Citations (2)
| Title |
|---|
| PATENT ABSTRACTS OF JAPAN vol. 010, no. 106 (P-449), 22. April 1986 (1986-04-22) & JP 60 238915 A (IKEGAMI TSUUSHINKI KK), 27. November 1985 (1985-11-27) * |
| PATENT ABSTRACTS OF JAPAN vol. 1998, no. 07, 31. März 1998 (1998-03-31) & JP 06 059413 A (EASTMAN KODAK CO), 4. März 1994 (1994-03-04) * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100429724C (en) * | 2004-01-10 | 2008-10-29 | 因芬尼昂技术股份公司 | Semiconductor memory circuit and method for operating the same in a standby mode |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0973084A3 (en) | 2000-04-05 |
| US6133779A (en) | 2000-10-17 |
| TWM251161U (en) | 2004-11-21 |
| EP0973084B1 (en) | 2009-06-24 |
| DE59915043D1 (en) | 2009-08-06 |
| DE19832309C1 (en) | 1999-10-14 |
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