EP0945012A1 - Emission et reception de signaux video - Google Patents

Emission et reception de signaux video

Info

Publication number
EP0945012A1
EP0945012A1 EP97949041A EP97949041A EP0945012A1 EP 0945012 A1 EP0945012 A1 EP 0945012A1 EP 97949041 A EP97949041 A EP 97949041A EP 97949041 A EP97949041 A EP 97949041A EP 0945012 A1 EP0945012 A1 EP 0945012A1
Authority
EP
European Patent Office
Prior art keywords
signal
clock signal
video signal
colour
vga
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP97949041A
Other languages
German (de)
English (en)
Inventor
James Matthew Peschke
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Domino Corp
Original Assignee
Domino Printing Sciences PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Domino Printing Sciences PLC filed Critical Domino Printing Sciences PLC
Publication of EP0945012A1 publication Critical patent/EP0945012A1/fr
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

Definitions

  • This invention relates to video signal generation and capture and, in particular, to the generation of video image signals for capture by an image capturing device.
  • the signal consists of three colour signals, red, green and blue, which contain the video image, and two synchronisation signals, HSync and VSync.
  • the colour signals are analog and time continuous and represent the intensity of each colour at every instant of display time.
  • the synchronisation signals synchronise the display on which the signal is to be reproduced so that the vertical and horizontal alignment of the image is correct for the data provided. With such signals, it is relatively simple to detect the VSync and HSync signals to determine when each frame or each row of a frame begins.
  • the present invention is directed toward providing an apparatus for generation of a video image signal which can be readily captured by an image capturing device without the image capturing device requiring high speed clocking and processing circuitry.
  • an apparatus for outputting a VGA video signal comprising: means for providing a clock signal on at least one of the three VGA analog colour signals.
  • the clock signal may switch at a rate representing every pixel or every alternate pixel and the clock signal may have a delay which may be fixed or which may vary dependent upon the rate of change of the level of one or both of the colour signals.
  • the clock signal may use the whole voltage range of the colour signal on which it is imposed or may, alternatively, use only a proportion of the voltage range, allowing the remainder to continue to be used to convey colour data. The proportion may be in the range of 25 to 75%.
  • a clocking signal may be provided on two of the colour signals to improve clocking accuracy.
  • the present invention also provides a video signal conforming to a VGA standard, in which at least one of the three VGA analog colour signals has a clocking signal provided on it.
  • the present invention further provides a method of generating a VGA video signal, the method including the step of: receiving a video signal conforming to a VGA standard; providing a clock signal on at least one of these three VGA analog colour signals; and outputting the video signal with the clock signal provided.
  • the present invention generates a video signal in which a clock signal is present in the portion of the signal representing image data, there is no need for image capturing circuitry to generate its own clock signal in order to calculate where data relating to a pixel to be captured is located. This reduces the cost of the image monitoring circuitry and improves the accuracy of image capture .
  • the present invention further provides an image capturing apparatus for capturing an image from a video signal of the type described above.
  • the image capturing apparatus comprises a comparator for comparing a clocking signal within a video signal with a threshold value; a counter for counting the number of clock transitions on a signal from a received HSync signal; and means for capturing a value for at least one pixel of at least one colour signal within the video signal.
  • the image capturing device may compare the clocking signal within the video signal with plural threshold values.
  • the image capturing device may include means for determining the one or more threshold values by employment of a reference colour signal.
  • the image capturing device may have means for comparing the colour signal pixel values with a further threshold value.
  • the image capturing device may be employed in combination with a device for printing captured images.
  • Figure 1 is a switching diagram for explaining a first example of the present invention
  • Figure 2 is a switching diagram showing a second example of the present invention
  • Figure 3 is a switching diagram showing a third example of the present invention
  • Figure 4 is a block diagram of an image capturing apparatus according to the invention.
  • Figure 5 is a block diagram of a second image capturing apparatus according to the invention.
  • Figure 6 is a switching diagram showing the operation of the example of figure 5.
  • Figures 7a and 7b are diagrams showing a threshold determination which can be employed in the examples of figures 5 and 6.
  • the colour and HSync components of a first example video signal generated according to the present invention are shown.
  • the green (G) and blue (B) colour signals are of the standard VGA type, namely analog and time continuous, as is the HSync signal which represents the start of a row.
  • a clocking signal has been provided on the red signal. The clocking signal switches state between high and low at a rate such that each transition represents the location of a pixel in a row.
  • An image capture circuit wishing to detect either one or both of the values of the blue and green colour signals can do so by using a comparator and counter to locate the exact location that it wishes to sample for the pixel of interest.
  • the clocking signal may switch at every other pixel (figure 2) . This may mean that only half as much image data for a given width can be provided within the video signal, but provides a longer period between clock transitions in which data can be captured and allows clock transitions to occur at the centre of an image pulse by placing the clock signal 90° out of phase to the image data signals.
  • An analog to digital convertor can be employed by an image capture circuit to separate the clock from the signal during capture.
  • the display will display an image which looks essentially correct, except that there will be an increase in brightness on adjacent lines.
  • Such an arrangement could be used in combination with the arrangement of figure 2 to reduce the requirements on any image capture circuit. It could also use one of the delay arrangements discussed above. Whilst half the allowable voltage range has been used in the example of figure 3, higher clock stability can be gained by using a different portion of the range (for example 25%) this will harm the signal to noise ratio, but provides two legal ranges, 0 to 25% and 75 to 100% thus increasing the abruptness of the clock signal transition and easing capture device requirements further.
  • Figure 4 shows an image capture apparatus for capturing image data from a signal according to the invention.
  • the clock signal is passed through a comparator
  • the threshold setting device 2 is a digital-to-analog converter which receives a threshold valve in digital form from a control means (not shown) and outputs an analog equivalent. The comparison removes noise and/or any image data on the signal.
  • the output of the comparator 1 is then fed to the clock input of a data retrieved device 4, in this example an analog-to-digital convertor.
  • the data retrieval device 4 receives one or more of the colour signals and, using the clock input as a reference, outputs data corresponding to each pixel. It will be appreciated that this image capture apparatus can be easily adapted to process all the signal formats discussed above.
  • FIG 5 shows a second example second image capture apparatus for capturing image data from a signal according to the invention.
  • This example again employs a latch 4 coupled to an image signal input G.
  • two comparators 1,5 are employed to control the latch output and a further comparator is provided on the image signal input line.
  • Each comparator has in this example, a different comparator threshold.
  • Such an arrangement is beneficial in that, for poor quality received signals, such as the type that are extremely noisy or affected by line impedances, can still be received.
  • Figure 6 shows the manner in which the employment of two thresholds, P and M, generates two clock signals which, in turn, can be employed to provide a signal clock output signal from the latch 4.
  • this particular scheme uses one pixel per data point, but this is not essential. It will be appreciated that such an arrangement relies on the assumption that the image signal data to be captured undergoes similar effects to the clocking signal R, but this will usually be the case.
  • Figure 7 shows how any of the thresholds employed in the above examples can be calculated prior to their employment.
  • a known test pattern is provided on the image signal G and an initial threshold set. Looking at either odd or even pixels only, the threshold is raised until a minimal capture error is recorded and the set point determined as the threshold point. If a second threshold is to be determined, such as the threshold M in the example of figure 5, such a threshold is then varied until, again, minimum capture errors are recorded.
  • the image signal data threshold is adjusted and the process repeated for the other thresholds.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Processing Of Color Television Signals (AREA)
  • Facsimile Image Signal Circuits (AREA)
  • Color Image Communication Systems (AREA)

Abstract

Un appareil pour émettre un signal vidéo conforme au standard VGA comprend un moyen pour intégrer un signal d'horloge dans au moins un des trois signaux des couleurs conformes au standard VGA. On décrit, également, un procédé pour générer un signal vidéo conforme au standard VGA, le procédé comprenant les étapes consistant à recevoir un signal vidéo conforme au standard VGA, intégrer un signal d'horloge dans au moins un des trois signaux analogiques des couleurs conformes au standard VGA et émettre le signal vidéo comprenant le signal d'horloge. Un appareil de réception d'images est également décrit.
EP97949041A 1996-12-12 1997-12-12 Emission et reception de signaux video Ceased EP0945012A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US3255996P 1996-12-12 1996-12-12
US3255P 1996-12-12
PCT/GB1997/003427 WO1998026590A1 (fr) 1996-12-12 1997-12-12 Emission et reception de signaux video

Publications (1)

Publication Number Publication Date
EP0945012A1 true EP0945012A1 (fr) 1999-09-29

Family

ID=21865578

Family Applications (1)

Application Number Title Priority Date Filing Date
EP97949041A Ceased EP0945012A1 (fr) 1996-12-12 1997-12-12 Emission et reception de signaux video

Country Status (4)

Country Link
EP (1) EP0945012A1 (fr)
JP (1) JP2001516521A (fr)
CN (1) CN1240089A (fr)
WO (1) WO1998026590A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9157727B2 (en) * 2013-01-18 2015-10-13 Kabushiki Kaisha Topcon Image measuring method and image measuring apparatus

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991015841A1 (fr) * 1990-03-30 1991-10-17 Tower Tech S.R.L. Affichage video pour images numeriques a haute frequence de regeneration des images
US5229853A (en) * 1991-08-19 1993-07-20 Hewlett-Packard Company System for converting a video signal from a first format to a second format

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9826590A1 *

Also Published As

Publication number Publication date
WO1998026590A1 (fr) 1998-06-18
JP2001516521A (ja) 2001-09-25
CN1240089A (zh) 1999-12-29

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