EP0819064B1 - Thermal dye transfer printing method with electrical loss compensation - Google Patents

Thermal dye transfer printing method with electrical loss compensation Download PDF

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Publication number
EP0819064B1
EP0819064B1 EP96910996A EP96910996A EP0819064B1 EP 0819064 B1 EP0819064 B1 EP 0819064B1 EP 96910996 A EP96910996 A EP 96910996A EP 96910996 A EP96910996 A EP 96910996A EP 0819064 B1 EP0819064 B1 EP 0819064B1
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European Patent Office
Prior art keywords
stra
pulse
duration
supply voltage
resistive
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German (de)
French (fr)
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EP0819064A1 (en
Inventor
Paul Morgavi
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Gemplus SA
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Gemplus Card International SA
Gemplus SA
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/315—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
    • B41J2/32—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
    • B41J2/35—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads providing current or voltage to the thermal head
    • B41J2/355—Control circuits for heating-element selection
    • B41J2/36—Print density control
    • B41J2/37—Print density control by compensation for variation in current

Definitions

  • the present invention relates to a method thermal printing by depositing dyestuffs.
  • the present invention relates more particularly a continuous tone printing process by diffusion of coloring matter, of the type described in the articles ⁇ Measurement of thermal transients in a thermal print head used for dye diffusion color printing ⁇ , by P.W. Webb and R.A. Hann, IEE Proceedings-A Vol 138, N ° 1 January 1991, and ⁇ A simple simulation for simultaneous diffusion of dye and heat in dye thermal diffusion transfer printing ⁇ by A. Kaneko, Journal of Imaging Science, volume 35, N ° 4, July / August 1991.
  • Such a method which makes it possible to carry out a high quality printing, is particularly applicable to the personalization of plastic cards, such as smart cards, magnetic cards, badges, etc.
  • Figure 1 shows a printing device 1 according to this process, intended for the personalization of plastic cards, of a known type and already described in French patent applications N ° 90 14329 or N ° 94 02116 in the name of the plaintiff and respectively published in WO-A-92/09052 and EP-A-0 669 589.
  • the printing device 1 includes two pairs 2, 3 of secondary rollers of conveying of a plastic card 4 to be printed, a roll main 5 conveying and printing, one head printing 6 of which only the useful end in the form of bar is shown, an ink ribbon 7 having three sequences of colorants primary, usually Yellow (J), Magenta (M) and Cyan (VS).
  • Card 4 is sandwiched between the head 6 and the main roll 5 with interposition of the ink ribbon 7.
  • the card 4 moves step by step according to a direction of printing S marked on the figure 1 and for each movement of the card corresponds equivalent displacement of the ink ribbon 7 and printing a line.
  • printing a pattern takes place line by line for a first sequence of primary color until the entire length of the card is scanned, then the card returns to position initial for printing a second sequence of primary color, etc. After three printing sequences we obtain by combination of the three primary colors a whole palette of colors.
  • Figure 2 shows the underside of the print head 6 in contact with the ribbon 7, and the Figure 3 shows schematically the structure print head electric 6. Together, these two figures provide a better understanding of the mechanism printing.
  • the print head 6 comprises a row of n resistive heating points P i (P 1 , P 2 , ... P n ), i being an index ranging from 1 to n.
  • each resistive point P i is activated by a train of voltage pulses of the same duration, and is thus brought to a temperature of diffusion of the coloring matter with which the ribbon 7 is covered. 'order of 200 to 300 ° C.
  • Each resistive point P i thus ensures the printing of an elementary image point (Pixel), the set of image points constituting a line.
  • the corresponding resistive point P i is not activated.
  • FIG. 3 it can be seen schematically that the voltage pulses of constant duration ensuring the activation of the resistive points P i are applied by means of a plurality of switches I i (I 1 , I 2 , ... I n ) connected to a voltage source 8 Va via an electric cable 9.
  • the switches I i are controlled by an electronic circuit 11 which opens and closes them alternately.
  • the electronic circuit 11 determines, as a function of the image to be printed, the number of pulses of voltage Va which should be applied to each resistive point P i .
  • the quantity of primary color deposited for each elementary image point is thus modulated, which makes it possible to obtain, after combination of the three primary colors, a wide variety of color shades.
  • Such variations in color intensity originate from an electrical problem. More precisely, when the printing of a line requires that a large number of resistive dots P i be activated at the same time (large pattern), there is a significant current draw in the voltage source 8 and the voltage Va supplied to the print head 6 decreases appreciably. Such a voltage drop is due to various electrical losses by the Joule effect between the source 8 and the print head 6, in particular in the cable 9 which has a non-negligible length due to practical requirements. Conversely, when the printing of a line only requires the activation of a small number of resistive dots (small pattern), the current is low and the voltage drop negligible.
  • the present invention provides a method of the type mentioned above, in which: the control signal comprises a first pulse of fixed and predetermined duration followed by a second pulse of variable duration, and the duration of the second impulse is determined for the duration of the first impulse based on the actual value that presents the supply voltage. Thanks to splitting the control signal into two pulses successive of which the first is of constant duration, it becomes possible to realize a simple, precise system, reliable and cost effective.
  • the duration of the second pulse can be selected in an electronic memory in which are stored several possible values of the duration of the second pulse.
  • the second pulse is added to the first pulse using a OR type logic gate.
  • Figure 5 shows the electrical diagram of a print head 20 according to the present invention, usable especially for printing a card plastic.
  • the print head 20 comprises a plurality of resistive heating points P 1 , P 2 , ... P n , each resistive point P i being electrically connected to a supply voltage source Va via a switch T i of a plurality of switches, here bipolar transistors T 1 , T 2 , ... T n .
  • Each transistor T i is controlled by a logic gate E i of a plurality of logic gates E 1 , E 2 , ... E n of the ET type, and each AND gate receives on a first input a signal STRB for controlling the duration of a voltage pulse, common to all the other AND gates.
  • the signal STRB is delivered by a circuit 23 for compensating for electrical losses according to the invention, which will be described in detail below.
  • each AND gate receives the output of a memory point M i from a plurality of memory points M 1 , M 2 , ... M n of a shift register 21, by means of a buffer memory 22 controlled by a validation signal LT. All of these elements are controlled by a central unit 24 with a microprocessor, which has in electronic memories a model of the pattern to be printed.
  • a phase of printing a line comprises a predetermined number N of cycles of activation of the resistive points P i , for example 255 cycles.
  • the central unit 24 configures the shift register 21, validates at the output of the buffer memory 22 the binary values contained in the memory points M i of the register 21 by activating the signal LT, then sends a signal STRA in input of circuit 23 according to the invention, which on reception of STRA applies for a determined time the signal STRB to the AND gates.
  • the maximum energy Emax which can be applied to a resistive point P i is equal to 255 times the value of the quantity of elementary energy e
  • the minimum energy Emin is zero if the memory point M i correspondent is never set to 1 during the 255 cycles.
  • the temperature to which a resistive point P i is brought during a printing phase, and consequently the intensity of the color of the printed image point depends on the number of voltage pulses received. This process is controlled by the central unit 24 from the programming sequences of the memory points M i of the register 21.
  • the duration T of the voltage pulses is calculated by the circuit 23 so that the quantity of elementary energy e transmitted by each pulse is constant in the presence of fluctuations in the supply voltage Va.
  • the real value V that the supply voltage Va presents when the resistive points P i are activated is likely to decrease in proportion to the number of resistive points P i activated simultaneously, due to various electrical losses by Joule effect.
  • T To (Vo / V) 2
  • the relation (7) can make it possible to calculate, from the voltage difference ⁇ V which the supply voltage Va undergoes, the duration T which a voltage pulse must have to confer on the resistive points P i a constant amount of energy.
  • the present invention provides an embodiment of the circuit 23 illustrated in FIG. 6.
  • the circuit 23 comprises a circuit 50 which receives in input a reference voltage Vref equal to Vo, as well as the actual value V of the supply voltage Va, taken for example from the terminals of all the resistive points P i .
  • the circuit 50 delivers on reception of a falling edge of the signal STRA a signal STRA + of duration t, t being the compensation duration determined according to relation (12).
  • the duration of STRA is the fixed nominal duration To of a pulse according to the prior art which does not take account of fluctuations in the supply voltage.
  • the signal STRA + is added to the signal STRA by any means useful for forming the signal STRB, for example by means of a logic gate 51 of the OR type.
  • the signal STRA + is not emitted and the duration of STRB is equal to that of STRA, that is to say To.
  • ⁇ V is not zero, the signal STRA + transmitted on the falling edge of STRA is added to the signal STRA, so that the total duration of STRB is equal to To + t.
  • FIG. 7 represents an exemplary embodiment of the circuit 50 by means of digital circuits.
  • Circuit 50 includes a differential amplifier 52 receiving Vref on its positive input and V on its negative input.
  • Amplifier 52 drives the analog input of a analog / digital converter 53, here a 8-bit resolution converter, synchronized by the STRA signal.
  • the output of converter 53 is applied to the address entries of a memory 54 of EPROM type, whose digital output is applied in input of a logic monostable circuit 55, for example a down-counter circuit, controlled by a reverse signal / STRA from STRA.
  • the memory 54 is used as a correspondence table in which we have stored, for various values of fluctuations ⁇ V, corresponding values of the duration t of the signal STRA +, calculated according to the relation (12).
  • the internal organization of the memory 54 can therefore be represented by the following table 1. address entry ⁇ Vo ⁇ V1 ⁇ V2 ⁇ V3 ⁇ V4 ⁇ V5 ; ⁇ V256 duration t (STRA +) to t1 t2 t3 t4 t5 ;
  • the memory 54 is controlled by 8 address input bits (resolution of the converter 53), we have stored in its memory areas 256 different durations to, t1, t2, ... t256 of the signal STRA +, corresponding to a decomposition of the ⁇ V fluctuations in 256 values, ⁇ Vo, ⁇ V1, ⁇ V2, ... ⁇ V256.
  • ⁇ Vo ⁇ V1
  • ⁇ V2 ... ⁇ V256.
  • the converter 53 on reception of a rising edge of STRA transforms ⁇ V into digital data which corresponds to an address of an area of the memory 54 and to a selection of a duration t of the signal STRA +. This value t is found in digital form at the input of circuit 55.
  • circuit 55 On reception of / STRA, circuit 55 sets its output STRA + to 1 during a countdown time which depends on the value t selected. We therefore see that the choice of the duration t of STRA + is made between the instant when STRA goes to 1 and the instant when STRA goes back to 0. Indeed, as we have already said, it is necessary that the determination of the duration T of STRB is carried out while the resistive points P i are activated, otherwise V would always be equal to Vo.
  • circuit 50 of this invention can also be implemented using analog components, as shown in figure 8.
  • FIG. 8 there is a differential amplifier 56 which calculates ⁇ V from the actual voltage V and the voltage Vref (Vo).
  • the output ⁇ V of the amplifier 56 is applied to a capacitor 57 connected to the input of a operational amplifier 58 via a switch 59.
  • Switch 59 controlled by the signal / STRA inverse of STRA, is closed when STRA is at 0.
  • the capacitor 57 charges when STRA is at 1 (duration To) and discharges when STRA goes to 0, the time of discharge being proportional to ⁇ V.
  • circuit 23 according to the present invention can still do the subject of numerous variants and improvements.
  • circuit 23 was separate from the central unit 24. However, in the practical, there is nothing to prevent circuit 23 from being integrated in the central unit 24. None stands in the way also that the process of the invention is implemented work by means of calculation algorithms executed by central unit and implementing one of the relationships previously described.

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Description

La présente invention concerne un procédé d'impression thermique par dépôt de matières colorantes.The present invention relates to a method thermal printing by depositing dyestuffs.

La présente invention concerne plus particulièrement un procédé d'impression en ton continu par diffusion de matières colorantes, du type décrit dans les articles 〈〈 Measurement of thermal transients in a thermal print head used for dye diffusion colour printing 〉〉, de P.W. Webb et R.A. Hann, IEE Proceedings-A Vol 138, N° 1 January 1991, et 〈〈 A simple simulation for simultaneous diffusion of dye and heat in dye diffusion thermal transfer printing 〉〉 de A. Kaneko, Journal of Imaging Science, volume 35, N° 4, July/August 1991.The present invention relates more particularly a continuous tone printing process by diffusion of coloring matter, of the type described in the articles 〈〈 Measurement of thermal transients in a thermal print head used for dye diffusion color printing 〉〉, by P.W. Webb and R.A. Hann, IEE Proceedings-A Vol 138, N ° 1 January 1991, and 〈〈 A simple simulation for simultaneous diffusion of dye and heat in dye thermal diffusion transfer printing 〉〉 by A. Kaneko, Journal of Imaging Science, volume 35, N ° 4, July / August 1991.

Un tel procédé, qui permet de réaliser une impression de grande qualité, est applicable notamment à la personnalisation de cartes plastiques, comme des cartes à puces, des cartes magnétiques, des badges, etc.Such a method, which makes it possible to carry out a high quality printing, is particularly applicable to the personalization of plastic cards, such as smart cards, magnetic cards, badges, etc.

La figure 1 représente un dispositif d'impression 1 selon ce procédé, prévu pour la personnalisation de cartes plastiques, d'un genre connu et déjà décrit dans les demandes de brevet français N° 90 14329 ou N° 94 02116 au nom de la demanderesse et respectivement publiées dans WO-A-92/09052 et EP-A-0 669 589.Figure 1 shows a printing device 1 according to this process, intended for the personalization of plastic cards, of a known type and already described in French patent applications N ° 90 14329 or N ° 94 02116 in the name of the plaintiff and respectively published in WO-A-92/09052 and EP-A-0 669 589.

Très schématiquement, le dispositif d'impression 1 comprend deux paires 2, 3 de rouleaux secondaires de convoyage d'une carte plastique 4 à imprimer, un rouleau principal 5 de convoyage et d'impression, une tête d'impression 6 dont seule l'extrémité utile en forme de barrette est représentée, un ruban encreur 7 présentant trois séquences de matières colorantes de couleurs primaires, généralement Jaune (J), Magenta (M) et Cyan (C). La carte 4 est prise en sandwich entre la tête d'impression 6 et le rouleau principal 5 avec interposition du ruban encreur 7. La carte 4 se déplace pas à pas selon un sens d'impression S repéré sur la figure 1 et à chaque déplacement de la carte correspond un déplacement équivalent du ruban encreur 7 et l'impression d'une ligne. Ainsi, l'impression d'un motif se déroule ligne par ligne pour une première séquence de couleur primaire jusqu'à ce que toute la longueur de la carte soit parcourue, puis la carte revient en position initiale pour l'impression d'une deuxième séquence de couleur primaire, etc. Après trois séquences d'impression on obtient par combinaison des trois couleurs primaires toute une palette de couleurs.Very schematically, the printing device 1 includes two pairs 2, 3 of secondary rollers of conveying of a plastic card 4 to be printed, a roll main 5 conveying and printing, one head printing 6 of which only the useful end in the form of bar is shown, an ink ribbon 7 having three sequences of colorants primary, usually Yellow (J), Magenta (M) and Cyan (VS). Card 4 is sandwiched between the head 6 and the main roll 5 with interposition of the ink ribbon 7. The card 4 moves step by step according to a direction of printing S marked on the figure 1 and for each movement of the card corresponds equivalent displacement of the ink ribbon 7 and printing a line. So, printing a pattern takes place line by line for a first sequence of primary color until the entire length of the card is scanned, then the card returns to position initial for printing a second sequence of primary color, etc. After three printing sequences we obtain by combination of the three primary colors a whole palette of colors.

La figure 2 représente la face inférieure de la tête d'impression 6 en contact avec le ruban 7, et la figure 3 représente de façon schématique la structure électrique de la tête d'impression 6. Ensemble, ces deux figures permettent de mieux comprendre le mécanisme d'impression.Figure 2 shows the underside of the print head 6 in contact with the ribbon 7, and the Figure 3 shows schematically the structure print head electric 6. Together, these two figures provide a better understanding of the mechanism printing.

Comme cela apparaít en figure 2, la tête d'impression 6 comprend une rangée de n points résistifs chauffants Pi (P1, P2,...Pn), i étant un indice allant de 1 à n. Pour l'impression d'une ligne, chaque point résistif Pi est activé par un train d'impulsions de tension de même durée, et est ainsi porté à une température de diffusion de la matière colorante dont est recouvert le ruban 7, de l'ordre de 200 à 300° C. Chaque point résistif Pi assure ainsi l'impression d'un point image élémentaire (Pixel), l'ensemble des points image constituant une ligne. Bien entendu, quand un point image élémentaire ne doit pas être imprimé, le point résistif Pi correspondant n'est pas activé.As shown in Figure 2, the print head 6 comprises a row of n resistive heating points P i (P 1 , P 2 , ... P n ), i being an index ranging from 1 to n. For the printing of a line, each resistive point P i is activated by a train of voltage pulses of the same duration, and is thus brought to a temperature of diffusion of the coloring matter with which the ribbon 7 is covered. 'order of 200 to 300 ° C. Each resistive point P i thus ensures the printing of an elementary image point (Pixel), the set of image points constituting a line. Of course, when an elementary image point is not to be printed, the corresponding resistive point P i is not activated.

Sur la figure 3, on voit de façon schématique que les impulsions de tension de durée constante assurant l'activation des points résistifs Pi sont appliquées au moyen d'une pluralité d'interrupteurs Ii (I1, I2,...In) reliés à une source 8 de tension Va par l'intermédiaire d'un câble électrique 9. Les interrupteurs Ii sont commandés par un circuit électronique 11 qui les ouvre et les ferme alternativement. Comme la quantité de matière colorante déposée sur la carte par diffusion (on dit aussi par migration) est fonction de la température des points résistifs Pi, le circuit électronique 11 détermine, en fonction de l'image à imprimer, le nombre d'impulsions de tension Va qu'il convient d'appliquer à chaque point résistif Pi. La quantité de couleur primaire déposée pour chaque point image élémentaire est ainsi modulée, ce qui permet d'obtenir après combinaison des trois couleurs primaires une grande variété de nuances de couleurs.In FIG. 3, it can be seen schematically that the voltage pulses of constant duration ensuring the activation of the resistive points P i are applied by means of a plurality of switches I i (I 1 , I 2 , ... I n ) connected to a voltage source 8 Va via an electric cable 9. The switches I i are controlled by an electronic circuit 11 which opens and closes them alternately. As the quantity of coloring matter deposited on the card by diffusion (we also say by migration) is a function of the temperature of the resistive points P i , the electronic circuit 11 determines, as a function of the image to be printed, the number of pulses of voltage Va which should be applied to each resistive point P i . The quantity of primary color deposited for each elementary image point is thus modulated, which makes it possible to obtain, after combination of the three primary colors, a wide variety of color shades.

Compte tenu de ce qui précède, on comprend que pour imprimer un motif présentant une intensité de couleur constante, il suffit en principe d'appliquer aux points résistifs Pi concernés, à chaque impression d'une ligne, le même nombre d'impulsions électriques. Pourtant, dans la pratique, ce résultat n'est pas atteint et des variations d'intensité de couleur se produisent en fonction de la forme du motif imprime. Par exemple, comme représenté en figure 4, si l'on imprime sur une carte 4 une bande 10 allant en s'élargissant, on constate que plus la bande s'élargit plus la couleur déposée s'éclaircit. De façon générale, il apparaít que l'intensité de la couleur devient plus faible quand la largeur du motif imprimé augmente.In view of the above, it is understood that to print a pattern having a constant intensity of color, it suffices in principle to apply to the resistive dots P i concerned, each time a line is printed, the same number of electrical pulses . However, in practice, this result is not achieved and variations in color intensity occur depending on the shape of the printed pattern. For example, as shown in FIG. 4, if a strip 10 which is widening is printed on a card 4, it can be seen that the more the strip widens the more the deposited color becomes lighter. In general, it appears that the intensity of the color becomes lower when the width of the printed pattern increases.

De telles variations d'intensité de couleur ont pour origine un problème de nature électrique. Plus précisément, lorsque l'impression d'une ligne requiert qu'un grand nombre de points résistifs Pi soient activés en même temps (motif de grande taille), il se produit un appel de courant important dans la source de tension 8 et la tension Va fournie à la tête d'impression 6 diminue sensiblement. Une telle chute de tension est due à diverses pertes électriques par effet Joule entre la source 8 et la tête d'impression 6, notamment dans le câble 9 qui présente une longueur non négligeable en raison d'impératifs pratiques. Inversement, quand l'impression d'une ligne nécessite seulement l'activation d'un petit nombre de points résistifs (motif de petite taille), le courant est faible et la chute de tension négligeable.Such variations in color intensity originate from an electrical problem. More precisely, when the printing of a line requires that a large number of resistive dots P i be activated at the same time (large pattern), there is a significant current draw in the voltage source 8 and the voltage Va supplied to the print head 6 decreases appreciably. Such a voltage drop is due to various electrical losses by the Joule effect between the source 8 and the print head 6, in particular in the cable 9 which has a non-negligible length due to practical requirements. Conversely, when the printing of a line only requires the activation of a small number of resistive dots (small pattern), the current is low and the voltage drop negligible.

Pour pallier cet inconvénient, on a déjà proposé un procédé d'impression thermique utilisant une tête d'impression comportant une pluralité de points résistifs activés par des impulsions d'une tension d'alimentation susceptible de fluctuer en fonction du nombre de points résistifs simultanément activés, dans lequel l'activation des points résistifs est contrôlée par un signal de commande dont la durée est déterminée de manière que l'énergie apportée aux points résistifs par chacune des impulsions de tension soit sensiblement constante et indépendante des fluctuations de la tension d'alimentation. Un tel procédé est décrit par le brevet US 4 434 354.To overcome this drawback, we have already proposed a thermal printing process using a head with a plurality of resistive dots activated by pulses of a supply voltage likely to fluctuate depending on the number of points resistives simultaneously activated, in which activation resistive points is controlled by a signal from order whose duration is determined so that the energy brought to the resistive points by each of the voltage pulses be substantially constant and independent of voltage fluctuations feed. Such a process is described by the patent US 4,434,354.

Toutefois, ce procédé de l'art antérieur nécessite pour sa mise en oeuvre la prévision d'un circuit de commutation relativement complexe, sensible à la tension d'alimentation et déterminant l'instant ou l'impulsion d'activation doit être arrêtée. Ce circuit de commutation réalisé à partir de composants analogiques est délicat à mettre en oeuvre, se révèle peu précis à l'usage et d'un coût de revient non négligeable.However, this prior art method requires for its implementation the forecast of a circuit of relatively complex switching, sensitive to voltage supply and determining the moment or the impulse activation must be stopped. This switching circuit made from analog components is tricky to implement, proves imprecise in use and a significant cost price.

Egalement, le document PATENT ABSTRACT OF JAPAN, vol.9 no.322 (M-440) [2045] 18/12/85 & JP-A-60 155 475 15/08/85 décrit un procédé de contrôle de la durée d'un signal d'activation de points résistifs d'une tête d'impression dans lequel :

  • 1) le signal d'activation est délivré par une minuterie,
  • 2) la tension d'alimentation est échantillonnée à un instant prédéterminé après que le signal d'activation ait été émis,
  • 3) la durée souhaitée du signal d'activation est ensuite calculée,
  • 4) la durée souhaitée du signal d'activation, une fois calculée, est envoyée à la minuterie qui s'arrête de fonctionner lorsque cette durée est atteinte.
    • Also, the document PATENT ABSTRACT OF JAPAN, vol.9 no.322 (M-440) [2045] 18/12/85 & JP-A-60 155 475 15/08/85 describes a process for controlling the duration of a signal for activating resistive points of a print head in which:
  • 1) the activation signal is delivered by a timer,
  • 2) the supply voltage is sampled at a predetermined instant after the activation signal has been sent,
  • 3) the desired duration of the activation signal is then calculated,
  • 4) the desired duration of the activation signal, once calculated, is sent to the timer which stops working when this duration is reached.

    • Ainsi, un inconvénient des procédés de l'art antérieur est qu'ils sont complexes à mettre en oeuvre.Thus, a disadvantage of the methods of the art previous is that they are complex to implement.

    Pour pallier cet inconvénient, la présente invention prévoit un procédé du type cité ci-dessus, dans lequel : le signal de commande comprend une première impulsion de durée fixe et prédéterminée suivie d'une deuxième impulsion de durée variable, et la durée de la deuxième impulsion est déterminée pendant la durée de la première impulsion en fonction de la valeur réelle que présente la tension d'alimentation. Grâce au fractionnement du signal de commande en deux impulsions successives dont la première est de durée constante, il devient possible de réaliser un système simple, précis, fiable et d'un coût avantageux.To overcome this drawback, the present invention provides a method of the type mentioned above, in which: the control signal comprises a first pulse of fixed and predetermined duration followed by a second pulse of variable duration, and the duration of the second impulse is determined for the duration of the first impulse based on the actual value that presents the supply voltage. Thanks to splitting the control signal into two pulses successive of which the first is of constant duration, it becomes possible to realize a simple, precise system, reliable and cost effective.

    Par exemple, la durée de la deuxième impulsion peut être sélectionnée dans une mémoire électronique dans laquelle sont enregistrées plusieurs valeurs possibles de la durée de la deuxième impulsion.For example, the duration of the second pulse can be selected in an electronic memory in which are stored several possible values of the duration of the second pulse.

    Selon un mode de réalisation, la deuxième impulsion est additionnée à la première impulsion au moyen d'une porte logique de type OU.According to one embodiment, the second pulse is added to the first pulse using a OR type logic gate.

    Les caractéristiques et avantages de la présente invention apparaítront plus clairement à la lecture de la description suivante du procédé de l'invention et de plusieurs exemples de mise en oeuvre, faite à titre non limitatif en relation avec les figures jointes parmi lesquelles :

    • la figure 1 représente schématiquement un dispositif d'impression par transfert thermique de colorants, et a été décrite précédemment,
    • la figure 2 représente vue de dessous une tête d'impression du dispositif de la figure 1, et a été décrite précédemment,
    • la figure 3 représente schématiquement la structure électrique de la tête d'impression de la figure 2, et a été décrite précédemment,
    • la figure 4 représente un motif imprimé sur une carte plastique et illustre un problème que résout la présente invention,
    • la figure 5 représente sous forme de blocs le schéma électrique d'une tête d'impression selon la présente invention,
    • la figure 6 représente de façon plus détaillée un bloc de la figure 5,
    • la figure 7 représente un mode de réalisation d'un élément du schéma de la figure 6, et
    • la figure 8 représente un autre mode de réalisation d'un élément du schéma de la figure 6.
    The characteristics and advantages of the present invention will appear more clearly on reading the following description of the process of the invention and several examples of implementation, given without limitation in relation to the attached figures among which:
    • FIG. 1 schematically represents a printing device by thermal transfer of dyes, and has been described previously,
    • FIG. 2 represents a view from below of a print head of the device of FIG. 1, and has been described previously,
    • FIG. 3 schematically represents the electrical structure of the print head of FIG. 2, and has been described previously,
    • FIG. 4 represents a pattern printed on a plastic card and illustrates a problem which the present invention solves,
    • FIG. 5 represents in block form the electrical diagram of a printhead according to the present invention,
    • FIG. 6 shows a block of FIG. 5 in more detail,
    • FIG. 7 represents an embodiment of an element of the diagram of FIG. 6, and
    • FIG. 8 represents another embodiment of an element of the diagram in FIG. 6.

    La figure 5 représente le schéma électrique d'une tête d'impression 20 selon la présente invention, utilisable notamment pour l'impression d'une carte plastique.Figure 5 shows the electrical diagram of a print head 20 according to the present invention, usable especially for printing a card plastic.

    Dans la description qui suit, lorsque l'on désignera un ou plusieurs éléments d'une pluralité d'éléments identiques, on utilisera dans un souci de simplification du texte la lettre 〈〈 i 〉〉 comme un indice rattaché à la désignation générale de la pluralité d'éléments, 〈〈 i 〉〉 étant un indice allant de 1 à n, et n le nombre d'éléments que comprend la pluralité d'éléments.In the following description, when we will designate one or more of a plurality identical elements, we will use for the sake of simplification of the text the letter 〈〈 i 〉〉 as a clue attached to the general designation of plurality of elements, 〈〈 i 〉〉 being an index ranging from 1 to n, and n the number of elements that the plurality includes elements.

    La tête d'impression 20 comprend une pluralité de points résistifs chauffants P1, P2,...Pn, chaque point résistif Pi étant relié électriquement à une source de tension d'alimentation Va par l'intermédiaire d'un interrupteur Ti d'une pluralité d'interrupteurs, ici des transistors bipolaires T1, T2,...Tn. Chaque transistor Ti est commandé par une porte logique Ei d'une pluralité de portes logiques E1, E2,...En de type ET, et chaque porte ET reçoit sur une première entrée un signal STRB de contrôle de la durée d'une impulsion de tension, commun à toutes les autres portes ET. Le signal STRB est délivré par un circuit 23 de compensation de pertes électriques selon l'invention, qui sera décrit en détail plus loin. L'autre entrée de chaque porte ET reçoit la sortie d'un point mémoire Mi d'une pluralité de points mémoire M1, M2,...Mn d'un registre à décalage 21, par l'intermédiaire d'une mémoire tampon 22 commandée par un signal de validation LT. L'ensemble de ces éléments est commandé par une unité centrale 24 à microprocesseur, qui possède dans des mémoires électroniques un modèle du motif à imprimer.The print head 20 comprises a plurality of resistive heating points P 1 , P 2 , ... P n , each resistive point P i being electrically connected to a supply voltage source Va via a switch T i of a plurality of switches, here bipolar transistors T 1 , T 2 , ... T n . Each transistor T i is controlled by a logic gate E i of a plurality of logic gates E 1 , E 2 , ... E n of the ET type, and each AND gate receives on a first input a signal STRB for controlling the duration of a voltage pulse, common to all the other AND gates. The signal STRB is delivered by a circuit 23 for compensating for electrical losses according to the invention, which will be described in detail below. The other input of each AND gate receives the output of a memory point M i from a plurality of memory points M 1 , M 2 , ... M n of a shift register 21, by means of a buffer memory 22 controlled by a validation signal LT. All of these elements are controlled by a central unit 24 with a microprocessor, which has in electronic memories a model of the pattern to be printed.

    Une phase d'impression d'une ligne comprend un nombre N prédéterminé de cycles d'activation des points résistifs Pi, par exemple 255 cycles. A chaque cycle, l'unité centrale 24 configure le registre à décalage 21, valide à la sortie de la mémoire tampon 22 les valeurs binaires contenues dans les points mémoire Mi du registre 21 en activant le signal LT, puis envoie un signal STRA en entrée du circuit 23 selon l'invention, qui sur réception de STRA applique pendant un temps déterminé le signal STRB aux portes ET.A phase of printing a line comprises a predetermined number N of cycles of activation of the resistive points P i , for example 255 cycles. At each cycle, the central unit 24 configures the shift register 21, validates at the output of the buffer memory 22 the binary values contained in the memory points M i of the register 21 by activating the signal LT, then sends a signal STRA in input of circuit 23 according to the invention, which on reception of STRA applies for a determined time the signal STRB to the AND gates.

    Au cours d'un cycle d'activation, quand un point mémoire Mi a été mis à 1 par l'unité centrale, et lorsque le signal STRB est émis, la porte ET correspondante passe à 1, le transistor Ti correspondant est passant et le point résistif Pi correspondant est alimenté par la tension Va pendant la durée où le signal STRB est à 1. Le point résistif Pi reçoit ainsi une impulsion de tension Va qui correspond à une quantité d'énergie élémentaire e, cette opération pouvant être renouvelée autant de fois qu'on le souhaite pendant les 255 cycles d'une phase d'impression d'une ligne. Ainsi, l'énergie totale E que reçoit un point résistif Pi pour une impression d'un point d'image, est égale à la somme des quantités d'énergie élémentaires e apportées par les commutations du signal STRB.During an activation cycle, when a memory point M i has been set to 1 by the central unit, and when the signal STRB is emitted, the corresponding AND gate goes to 1, the corresponding transistor Ti is on and the corresponding resistive point Pi is supplied by the voltage Va during the time when the signal STRB is at 1. The resistive point Pi thus receives a pulse of voltage Va which corresponds to an amount of elementary energy e, this operation being able to be repeated as much as many times as desired during the 255 cycles of a line printing phase. Thus, the total energy E that a resistive point P i receives for printing an image point is equal to the sum of the quantities of elementary energy e provided by the switching of the signal STRB.

    N étant ici égal à 255, l'énergie maximum Emax qui peut être appliquée à un point résistif Pi est égale à 255 fois la valeur de la quantité d'énergie élémentaire e, et l'énergie minimum Emin est nulle si le point mémoire Mi correspondant n'est jamais mis à 1 au cours des 255 cycles. En définitive, la température à laquelle est portée un point résistif Pi au cours d'une phase d'impression, et par conséquent l'intensité de la couleur du point image imprimé, dépend du nombre d'impulsions de tension reçues. Ce processus est contrôlé par l'unité centrale 24 à partir des séquences de programmation des points mémoire Mi du registre 21.N being here equal to 255, the maximum energy Emax which can be applied to a resistive point P i is equal to 255 times the value of the quantity of elementary energy e , and the minimum energy Emin is zero if the memory point M i correspondent is never set to 1 during the 255 cycles. Ultimately, the temperature to which a resistive point P i is brought during a printing phase, and consequently the intensity of the color of the printed image point, depends on the number of voltage pulses received. This process is controlled by the central unit 24 from the programming sequences of the memory points M i of the register 21.

    Par ailleurs, la quantité d'énergie élémentaire e transmise par une impulsion de tension peut s'écrire de la façon suivante : e = V2 T/R, T étant la durée de l'impulsion de tension, c'est-à-dire la durée pendant laquelle STRB est à 1, R la résistance électrique d'un point résistif Pi, tous les points résistifs présentant la même résistance électrique R, et V la valeur réelle de la tension d'alimentation Va pendant l'activation des points résistifs Pi.Furthermore, the quantity of elementary energy e transmitted by a voltage pulse can be written as follows: e = V 2 T / R, T being the duration of the voltage pulse, that is to say the duration during which STRB is at 1, R the electrical resistance of a resistive point P i , all the resistive points having the same electrical resistance R, and V the actual value of the supply voltage Va during the activation of the resistive points P i .

    Selon la présente invention, la durée T des impulsions de tension est calculée par le circuit 23 de manière que la quantité d'énergie élémentaire e transmise par chaque impulsion soit constante en présence de fluctuations de la tension d'alimentation Va. En effet, comme on l'a expliqué au préambule, la valeur réelle V que présente la tension d'alimentation Va lorsque les points résistifs Pi sont activés est susceptible de baisser proportionnellement au nombre de points résistifs Pi activés simultanément, en raison de diverses pertes électriques par effet Joule.According to the present invention, the duration T of the voltage pulses is calculated by the circuit 23 so that the quantity of elementary energy e transmitted by each pulse is constant in the presence of fluctuations in the supply voltage Va. In fact, as explained in the preamble, the real value V that the supply voltage Va presents when the resistive points P i are activated is likely to decrease in proportion to the number of resistive points P i activated simultaneously, due to various electrical losses by Joule effect.

    On décrira maintenant des étapes du procédé de l'invention qui visent à déterminer des relations mathématiques qui seront mises en oeuvre par le circuit 23.We will now describe steps of the the invention which aim to determine relationships mathematics which will be implemented by the circuit 23.

    Selon l'invention, on peut écrire la relation (1) de la manière suivante : e = V2 T(V)/R = constante, où T(V) signifie que la durée T d'une impulsion n'est pas une constante mais une durée choisie en fonction de la valeur réelle V de la tension d'alimentation Va pour que e soit une constante indépendante des fluctuations de la tension Va.According to the invention, we can write relation (1) as follows: e = V 2 T (V) / R = constant, where T (V) means that the duration T of a pulse is not a constant but a duration chosen as a function of the actual value V of the supply voltage Va so that e is a constant independent of fluctuations in the voltage Goes.

    En désignant par Vo la valeur nominale de la tension d'alimentation Va quand aucun point Pi n'est activé, Vo étant une constante, la relation (2) peut aussi s'écrire : e = Vo2 To/R = V2 T/R où To désigne la durée d'une impulsion de tension quand la tension d'alimentation Va est égale à Vo (aucun point Pi activé), To étant une constante, et T la durée d'une impulsion de tension quand Va est égale à V (un certain nombre de points Pi activés).By designating by Vo the nominal value of the supply voltage Va when no point P i is activated, Vo being a constant, the relation (2) can also be written: e = Vo 2 To / R = V 2 T / R where To designates the duration of a voltage pulse when the supply voltage Va is equal to Vo (no point P i activated), To being a constant, and T the duration of a voltage pulse when Va is equal to V (a certain number of points Pi activated).

    Pour que la relation (3) soit vérifiée, il faut que le rapport T/To obéisse à la relation suivante : T/To = (Vo/V)2 En d'autres termes, il faut que T soit égal à : T = To (Vo/V)2 En écrivant V sous la forme : V = Vo - ΔV ΔV représentant la chute de tension (Vo - V) que subit la tension d'alimentation Va par rapport à sa valeur nominale Vo, la relation (5) peut maintenant s'écrire ainsi : T = To (Vo/(Vo - ΔV)2) For the relation (3) to be verified, the T / To ratio must obey the following relation: T / To = (Vo / V) 2 In other words, T must be equal to: T = To (Vo / V) 2 By writing V in the form: V = Vo - ΔV ΔV representing the voltage drop (Vo - V) undergone by the supply voltage Va with respect to its nominal value Vo, the relation (5) can now be written as: T = To (Vo / (Vo - ΔV) 2 )

    To et Vo étant des constantes, la relation (7) peut permettre de calculer, à partir de l'écart de tension ΔV que subit la tension d'alimentation Va, la durée T que doit avoir un impulsion de tension pour conférer aux points résistifs Pi une quantité d'énergie constante.To and Vo being constants, the relation (7) can make it possible to calculate, from the voltage difference ΔV which the supply voltage Va undergoes, the duration T which a voltage pulse must have to confer on the resistive points P i a constant amount of energy.

    Toutefois, d'un point de vue pratique, la relation (7) n'est pas directement exploitable avant le déclenchement d'une impulsion (STRB = 1) puisque l'écart de tension ΔV ne va apparaítre qu'après le déclenchement de l'impulsion, c'est-à-dire pendant l'activation des points résistifs Pi. Selon l'invention, on exprime la durée T d'une impulsion de tension sous la forme : T = To + t et l'on définit To comme une durée de base invariable du signal STRB, par exemple la durée du signal STRA délivré par l'unité centrale 24, et t comme une durée variable ajoutée à To pour compenser les pertes électriques et la diminution de la tension d'alimentation Va, t étant donc égal à 0 quand Va est à sa valeur nominale Vo.However, from a practical point of view, the relation (7) is not directly exploitable before the triggering of a pulse (STRB = 1) since the voltage difference ΔV will only appear after the triggering of the pulse, that is to say during the activation of the resistive points Pi. According to the invention, the duration T of a voltage pulse is expressed in the form: T = To + t and we define To as an invariable basic duration of the signal STRB, for example the duration of the signal STRA delivered by the central unit 24, and t as a variable duration added to To to compensate for the electrical losses and the reduction in the supply voltage Va, t therefore being equal to 0 when Va is at its nominal value Vo.

    En combinant les relations (5) et (10), on peut ensuite écrire : t = To((Vo/V)2 - 1) By combining relations (5) and (10), we can then write: t = To ((Vo / V) 2 - 1)

    En combinant les relations (6) et (11), et après simplification et suppression des termes de second ordre, on arrive à une expression simplifiée de la forme : t = 2To ΔV/Vo qui se révèle suffisamment exacte quand les fluctuations ΔV sont petites devant Vo, ce qui est généralement le cas. Par exemple, dans la pratique, avec une tête d'impression comportant 448 points résistifs alimentés par une tension Va de valeur nominale de 12 Volt (Vo), il se produit une chute de tension maximale de 300 mV pour un courant de 6A lorsque les 448 points résistifs sont activés simultanément.By combining relations (6) and (11), and after simplification and removal of second order terms, we arrive at a simplified expression of the form: t = 2To ΔV / Vo which is sufficiently accurate when the fluctuations ΔV are small in front of Vo, which is generally the case. For example, in practice, with a print head comprising 448 resistive dots supplied by a voltage Va with a nominal value of 12 Volt (Vo), there is a maximum voltage drop of 300 mV for a current of 6A when the 448 resistive points are activated simultaneously.

    A partir de l'enseignement qui résulte des relations (10) et (12), la présente invention prévoit un mode de réalisation du circuit 23 illustré en figure 6. Selon ce mode de réalisation, le circuit 23 comprend un circuit 50 qui reçoit en entrée une tension de référence Vref égale à Vo, ainsi que la valeur réelle V de la tension d'alimentation Va, prélevée par exemple aux bornes de l'ensemble des points résistifs Pi. Le circuit 50 délivre sur réception d'un front descendant du signal STRA un signal STRA+ de durée t, t étant la durée de compensation déterminée selon la relation (12). La durée de STRA est la durée nominale fixe To d'une impulsion selon l'art antérieur ne prenant pas en compte les fluctuations de la tension d'alimentation. Le signal STRA+ est ajouté au signal STRA par tout moyen utile pour former le signal STRB, par exemple au moyen d'une porte logique 51 de type OU. Quand la chute de tension ΔV de la tension d'alimentation Va est nulle, c'est-à-dire lorsque Va est égale à Vo, le signal STRA+ n'est pas émis et la durée de STRB est égale à celle de STRA, c'est-à-dire To. Quand ΔV n'est pas nulle, le signal STRA+ émis sur front descendant de STRA s'ajoute au signal STRA, de sorte que la durée totale de STRB est égale à To + t.From the teaching which results from relations (10) and (12), the present invention provides an embodiment of the circuit 23 illustrated in FIG. 6. According to this embodiment, the circuit 23 comprises a circuit 50 which receives in input a reference voltage Vref equal to Vo, as well as the actual value V of the supply voltage Va, taken for example from the terminals of all the resistive points P i . The circuit 50 delivers on reception of a falling edge of the signal STRA a signal STRA + of duration t, t being the compensation duration determined according to relation (12). The duration of STRA is the fixed nominal duration To of a pulse according to the prior art which does not take account of fluctuations in the supply voltage. The signal STRA + is added to the signal STRA by any means useful for forming the signal STRB, for example by means of a logic gate 51 of the OR type. When the voltage drop ΔV of the supply voltage Va is zero, that is to say when Va is equal to Vo, the signal STRA + is not emitted and the duration of STRB is equal to that of STRA, that is to say To. When ΔV is not zero, the signal STRA + transmitted on the falling edge of STRA is added to the signal STRA, so that the total duration of STRB is equal to To + t.

    La figure 7 représente un exemple de réalisation du circuit 50 au moyen de circuits numériques. Le circuit 50 comprend un amplificateur différentiel 52 recevant Vref sur son entrée positive et V sur son entrée négative. L'amplificateur 52 attaque l'entrée analogique d'un convertisseur analogique/numérique 53, ici un convertisseur d'une résolution de 8 bits, synchronisé par le signal STRA. La sortie du convertisseur 53 est appliquée sur les entrées d'adresse d'une mémoire 54 de type EPROM, dont la sortie numérique est appliquée en entrée d'un circuit monostable logique 55, par exemple un circuit décompteur, commandé par un signal /STRA inverse de STRA.FIG. 7 represents an exemplary embodiment of the circuit 50 by means of digital circuits. Circuit 50 includes a differential amplifier 52 receiving Vref on its positive input and V on its negative input. Amplifier 52 drives the analog input of a analog / digital converter 53, here a 8-bit resolution converter, synchronized by the STRA signal. The output of converter 53 is applied to the address entries of a memory 54 of EPROM type, whose digital output is applied in input of a logic monostable circuit 55, for example a down-counter circuit, controlled by a reverse signal / STRA from STRA.

    La mémoire 54 est utilisée comme une table de correspondance dans laquelle on a stocké, pour diverses valeurs de fluctuations ΔV, des valeurs correspondantes de la durée t du signal STRA+, calculées selon la relation (12). L'organisation interne de la mémoire 54 peut donc être représentée par le tableau 1 suivant. entrée adresse ΔVo ΔV1 ΔV2 ΔV3 ΔV4 ΔV5 ..... ΔV256 durée t (STRA+) to t1 t2 t3 t4 t5 ..... t256 The memory 54 is used as a correspondence table in which we have stored, for various values of fluctuations ΔV, corresponding values of the duration t of the signal STRA +, calculated according to the relation (12). The internal organization of the memory 54 can therefore be represented by the following table 1. address entry ΔVo ΔV1 ΔV2 ΔV3 ΔV4 ΔV5 ..... ΔV256 duration t (STRA +) to t1 t2 t3 t4 t5 ..... t256

    Comme ici la mémoire 54 est commandée par 8 bits d'entrée adresse (résolution du convertisseur 53), on a stocké dans ses zones mémoires 256 durées différentes to, t1, t2,...t256 du signal STRA+, correspondant à une décomposition des fluctuations ΔV en 256 valeurs, ΔVo, ΔV1, ΔV2,...ΔV256. Ainsi, pour une valeur de V on trouve à la sortie de l'amplificateur 52 une valeur particulière de ΔV. Le convertisseur 53 sur réception d'un front montant de STRA transforme ΔV en une donnée numérique qui correspond à une adresse d'une zone de la mémoire 54 et à une sélection d'une durée t du signal STRA+. On retrouve cette valeur t sous forme numérique en entrée du circuit 55. Sur réception de /STRA, le circuit 55 met sa sortie STRA+ à 1 pendant un temps de décomptage qui dépend de la valeur t sélectionnée. On voit donc que le choix de la durée t de STRA+ se fait entre l'instant où STRA passe à 1 et l'instant où STRA repasse à 0. En effet, comme on l'a déjà dit, il est nécessaire que la détermination de la durée T de STRB soit effectuée pendant que les points résistifs Pi sont activés, sinon V serait toujours égal à Vo.As here the memory 54 is controlled by 8 address input bits (resolution of the converter 53), we have stored in its memory areas 256 different durations to, t1, t2, ... t256 of the signal STRA +, corresponding to a decomposition of the ΔV fluctuations in 256 values, ΔVo, ΔV1, ΔV2, ... ΔV256. Thus, for a value of V there is at the output of the amplifier 52 a particular value of ΔV. The converter 53 on reception of a rising edge of STRA transforms ΔV into digital data which corresponds to an address of an area of the memory 54 and to a selection of a duration t of the signal STRA +. This value t is found in digital form at the input of circuit 55. On reception of / STRA, circuit 55 sets its output STRA + to 1 during a countdown time which depends on the value t selected. We therefore see that the choice of the duration t of STRA + is made between the instant when STRA goes to 1 and the instant when STRA goes back to 0. Indeed, as we have already said, it is necessary that the determination of the duration T of STRB is carried out while the resistive points P i are activated, otherwise V would always be equal to Vo.

    Bien entendu, le circuit 50 de la présente invention peut également être mis en oeuvre au moyen de composants analogiques, comme représenté en figure 8. Sur la figure 8, on retrouve un amplificateur différentiel 56 qui calcule ΔV à partir de la tension réelle V et la tension Vref (Vo). La sortie ΔV de l'amplificateur 56 est appliquée à un condensateur 57 relié à l'entrée d'un amplificateur opérationnel 58 par l'intermédiaire d'un interrupteur 59. L'interrupteur 59, commandé par le signal /STRA inverse de STRA, est fermé quand STRA est à 0. Le condensateur 57 se charge quand STRA est à 1 (durée To) et se décharge quand STRA passe à 0, le temps de décharge étant proportionnel à ΔV.Of course, circuit 50 of this invention can also be implemented using analog components, as shown in figure 8. On FIG. 8, there is a differential amplifier 56 which calculates ΔV from the actual voltage V and the voltage Vref (Vo). The output ΔV of the amplifier 56 is applied to a capacitor 57 connected to the input of a operational amplifier 58 via a switch 59. Switch 59, controlled by the signal / STRA inverse of STRA, is closed when STRA is at 0. The capacitor 57 charges when STRA is at 1 (duration To) and discharges when STRA goes to 0, the time of discharge being proportional to ΔV.

    Il apparaítra clairement à l'homme de l'art que le circuit 23 selon la présente invention peut encore faire l'objet de nombreuses variantes de réalisation et perfectionnements. Par exemple, on pourrait stocker dans la mémoire 54 de la figure 7 des valeurs t obéissant à la relation (11) au lieu d'obéir à la relation (12), et attaquer directement le convertisseur 53 avec la tension V. Ces valeurs peuvent bien entendu être calculées à partir de la relation (11) ou déterminées expérimentalement.It will be clear to those skilled in the art that the circuit 23 according to the present invention can still do the subject of numerous variants and improvements. For example, we could store in the memory 54 of FIG. 7 of the values t obeying the relation (11) instead of obeying relation (12), and directly drive converter 53 with voltage V. These values can of course be calculated at from relation (11) or determined experimentally.

    De plus, on a considéré jusqu'à présent dans un souci de clarté de la description que le circuit 23 était distinct de l'unité centrale 24. Toutefois, dans la pratique, rien ne s'oppose à ce que le circuit 23 soit intégré dans l'unité centrale 24. Rien ne s'oppose également à ce que le procédé de l'invention soit mis en oeuvre au moyen d'algorithmes de calcul exécutés par l'unité centrale et mettant en oeuvre l'une des relations précédemment décrites.In addition, we have so far considered in a for clarity of description the circuit 23 was separate from the central unit 24. However, in the practical, there is nothing to prevent circuit 23 from being integrated in the central unit 24. Nothing stands in the way also that the process of the invention is implemented work by means of calculation algorithms executed by central unit and implementing one of the relationships previously described.

    Claims (7)

    1. Method for thermal printing by means of a print head (6, 20), comprising a plurality of resistive points (Pi) which are activated by pulses of a supply voltage (Va) which can fluctuate (ΔV) according to the number (N) of resistive points (Pi) activated simultaneously, the activation of the resistive points (Pi) being controlled by a command signal (STRB) applied to the print head (6, 20), the duration of which is determined such that the energy (e) supplied to the resistive points (Pi) by each of the said voltage pulses (Va) is substantially constant and independent of the fluctuations (ΔV) of the supply voltage (Va), which method is characterised in that application of the command signal (STRB) comprises the steps consisting of:
      applying to the print head a first command pulse (STRA) with a fixed and pre-determined duration (To);
      during the duration (To) of the first pulse (STRA), determining the duration (t) of a second command pulse (STRA+);
      when the first pulse (STRA) is completed, applying to the print head (6, 20) the said second pulse (STRA+),
      the duration of the second pulse (STRA+) being determined in accordance with the actual value (V) of the supply voltage (Va) during application of the first pulse (STRA+), such that the energy (e) supplied to the resistive points (Pi) by successive application of the first pulse (STRA) and the second pulse (STRA+) is substantially constant and independent of the fluctuations (ΔV) of the supply voltage (Va).
    2. Method according to claim 1, characterised in that the duration (t) of the second pulse (STRA+) is determined in accordance with the difference (ΔV) between a nominal value (Vo, Vref) of the supply voltage (Va) and the real value (V) of the supply voltage (Va).
    3. Method according to claim 1 or claim 2, characterised in that the duration (t) of the second pulse (STRA+) is selected in an electronic memory (54), in which there are recorded several possible values (t1 to t256) of the said duration.
    4. Method according to claim 1 or claim 2, characterised in that the duration (t) of the second pulse (STRA+) is determined by the discharge of a capacitor (57).
    5. Method according to any one of claims 1 to 4, characterised in that the second pulse (STRA+) is added to the first pulse (STRA) by means of a logic gate (51) of the OU type.
    6. Thermal print head (20) comprising a plurality of resistive points (Pi) which are activated by pulses of a supply voltage (Va) of energy (e) which is substantially constant and independent of fluctuatons (ΔV) of the supply voltage (Va) which can occur according to the number (N) of resistive points (Pi) which are activated simultaneously, and comprising first means (24) for supplying a first pulse (STRA) to command activation of the resistive points (Pi), with a fixed duration (TO), characterised in that it additionally comprises second means (23, 50) for supplying a second pulse (STRA+) to command activation of the resistive points (Pi), with a variable duration (t) determined during the duration (To) of the said first pulse (STRA), according to the real value (V) of the supply voltage (Va).
    7. Print head according to claim 6, characterised in that the said second means (23, 50) comprise a memory circuit (54) in which there is stored a plurality of possible values of the second command pulse (STRA+).
    EP96910996A 1995-04-04 1996-03-28 Thermal dye transfer printing method with electrical loss compensation Expired - Lifetime EP0819064B1 (en)

    Applications Claiming Priority (3)

    Application Number Priority Date Filing Date Title
    FR9504286A FR2732644B1 (en) 1995-04-04 1995-04-04 DYE TRANSFER PRINTING METHOD WITH ELECTRICAL LOSS COMPENSATION
    FR9504286 1995-04-04
    PCT/FR1996/000473 WO1996031352A1 (en) 1995-04-04 1996-03-28 Thermal dye transfer printing method with electrical loss compensation

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    Publication Number Publication Date
    EP0819064A1 EP0819064A1 (en) 1998-01-21
    EP0819064B1 true EP0819064B1 (en) 1999-02-10

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    EP (1) EP0819064B1 (en)
    JP (1) JPH11503081A (en)
    DE (1) DE69601532T2 (en)
    FR (1) FR2732644B1 (en)
    WO (1) WO1996031352A1 (en)

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    GB2356375B (en) * 1999-11-22 2003-04-09 Esselte Nv A method of controlling a print head
    US6784908B2 (en) 2000-11-16 2004-08-31 Olympus Corporation Printer

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    JPS5353223A (en) * 1976-10-25 1978-05-15 Epson Corp Circuit for compensating voltage of thermal printer
    JPS57128570A (en) * 1981-02-03 1982-08-10 Canon Inc Printer
    JPS57146677A (en) * 1981-03-05 1982-09-10 Canon Inc Thermal printer
    JPS60155475A (en) * 1984-01-26 1985-08-15 Matsushita Graphic Commun Syst Inc Controlling system for driving recording element
    JPS6259053A (en) * 1985-09-09 1987-03-14 Alps Electric Co Ltd Method of driving thermal head
    JPH05301370A (en) * 1992-04-24 1993-11-16 Oki Electric Ind Co Ltd Thermal head
    JPH0761021A (en) * 1993-06-30 1995-03-07 Casio Comput Co Ltd Printer
    JPH0768825A (en) * 1993-09-01 1995-03-14 Casio Comput Co Ltd Electrification control device of thermal head
    FR2718680B1 (en) * 1994-04-15 1996-07-05 Gemplus Card Int Device for modifying the tension of a ribbon wound on a take-up spool if the ribbon is stuck on a printing medium.
    FR2718679B1 (en) * 1994-04-15 1996-05-24 Gemplus Card Int Cleaning card for printing machine and electric card personalization station.
    WO1997001444A1 (en) * 1995-06-27 1997-01-16 Datacard Corporation Thermal ink transfer printer using a multistandard ribbon
    FR2735994B1 (en) * 1995-06-27 1997-08-29 Gemplus Card Int PRINTHEAD FOR THERMAL TRANSFER OF THICK VARNISH

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    US5978006A (en) 1999-11-02
    DE69601532D1 (en) 1999-03-25
    WO1996031352A1 (en) 1996-10-10
    FR2732644B1 (en) 1997-04-30
    JPH11503081A (en) 1999-03-23
    EP0819064A1 (en) 1998-01-21
    DE69601532T2 (en) 1999-09-02
    FR2732644A1 (en) 1996-10-11

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