EP0757812A1 - Procede permettant de preparer et d'effectuer la mise en logique floue d'un signal d'entree numerique se trouvant a l'entree d'un processeur a logique floue - Google Patents

Procede permettant de preparer et d'effectuer la mise en logique floue d'un signal d'entree numerique se trouvant a l'entree d'un processeur a logique floue

Info

Publication number
EP0757812A1
EP0757812A1 EP95915138A EP95915138A EP0757812A1 EP 0757812 A1 EP0757812 A1 EP 0757812A1 EP 95915138 A EP95915138 A EP 95915138A EP 95915138 A EP95915138 A EP 95915138A EP 0757812 A1 EP0757812 A1 EP 0757812A1
Authority
EP
European Patent Office
Prior art keywords
segment
membership
input signal
value
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP95915138A
Other languages
German (de)
English (en)
Inventor
Herbert Eichfeld
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0757812A1 publication Critical patent/EP0757812A1/fr
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N7/00—Computing arrangements based on specific mathematical models
    • G06N7/02—Computing arrangements based on specific mathematical models using fuzzy logic
    • G06N7/04—Physical realisation

Definitions

  • fuzzy processors The structure and mode of operation of fuzzy processors are known (see, for example, H.Eichfeld, T.kunemund, M.Klimke “An 8b Fuzzy Coprocessor For Fuzzy Control", ISSCC 93, San Francisco, February 24-26, 1993, pages 180, 181, 286).
  • a fuzzy processor also contains a fuzzy circuit, also called a fuzzifier, the task of which is to create a digital input signal that is to be fuzzified by means of input membership functions stored in a memory — also known as knowledge base memory to determine the membership values. To do this, it must first be determined which input membership functions (hereinafter referred to as membership functions) are affected by the input signal. The membership values to be assigned to the input signal can then be retrieved from the memory.
  • membership functions input membership functions
  • the method according to the invention is based on the idea of dividing the definition range or value range of the digital input signals into segments, preferably segments of the same size. Fuzzification only considers the segment in which the input signal to be fuzzified lies. This reduces the number of membership functions to be considered, which shortens the computing time. Any form of membership function is allowed, but the memory requirement is significantly reduced compared to the scanning method.
  • the memory requirement for the storage of the membership functions can be reduced by storing a shape information that includes the shape of the membership function.
  • This form information contains features that define the form of the membership function, such as Support points at which the slopes change and the slopes between the support points.
  • the start value and the end value of the membership function can be included in the form information as a support point.
  • the determination of the membership functions taken per segment then requires determining whether membership functions pass through the segment without a start value and end value or whether the input signal is smaller than the end value of the membership function with a small number and is greater than the start values of the hit Membership functions with the following number. For this purpose, it is expedient to number the membership functions in ascending order.
  • an end value memory and a start value memory can also be introduced in the memory. Then the memory receives a number memory, a start value memory and an end value memory for each input. In addition, an end value address memory and a start value address memory can be provided, for each input.
  • the membership values must be calculated in a further step.
  • the shape information which is also stored in the memory must be used.
  • This form information relates to the form of the membership functions per segment. It is useful to define the typical forms of the membership functions that occur with the help of support points and slopes and to save them in a space-saving manner.
  • the form address memory and segment address memory can then Form information of the membership functions taken are determined and the membership values are calculated therefrom.
  • FIG. 1 shows a possible division of membership functions in the definition range of the digital input signal
  • FIG. 2 shows a section of a segment
  • FIG. 3 curves in a segment that require special coding
  • FIG. 4 shows the organization of the memory with four inputs
  • 5 to 7 show a flow chart for determining the numbers of the membership functions taken
  • FIG. 8 shows the memory organization for calculating the membership values for four inputs
  • FIG. 9 to FIG. 14 flow diagrams for calculating the membership values
  • FIG. 18 an example to explain the method according to the invention.
  • the value range of a digital input signal E which is divided here into 16 segments, results from FIG.
  • the m 4 upper bits (eo) can be used to address the 16 segments and the (n-m) lower bits (eu) can be used to address the points within the segment.
  • Membership functions le are now distributed over the entire value range, as is the case e.g. can be seen from Figure 1.
  • the possible degree of overlap is 2 here.
  • 15 membership functions le are arranged in a distributed manner. To differentiate between the functions, these can be numbered.
  • FIG. 2 shows, for the membership functions present in a segment, the membership function with the smallest number is referred to as nrel, and the membership function with the largest number as nrei. In between are the other membership functions with the corresponding number.
  • the designation of start values and end values per membership function results from FIG.
  • the end value of each membership function is denoted by io, the start value by iu.
  • FIG. 2 shows some examples of membership functions, all membership functions ending, starting or starting and ending in the SG segment.
  • courses of membership functions are also conceivable (see FIG. 1) which run through a segment SG without starting or ending there.
  • case a) two membership functions run nreil and nrei through the segment SG.
  • case b) the one membership function runs neil through the segment SG, while a second membership function nrei starts in the segment and in case c) a membership function runs nrei through the segment SG, a membership function nreil ends in the segment SG and a third Membership function nre2 can possibly start in segment SG.
  • a number memory SP-N is provided for each input in a memory KBM, which is shown in FIG. 4, and contains a memory word for each segment SG
  • the smallest number nreil and the largest number nrei of the membership functions per segment and the final value iol are stored in this memory word.
  • KBM Knowledge Base Memory
  • Additional memory areas are required to determine the membership functions that have been made. If several membership functions are contained in a segment, either the start value and / or the end value of such a membership function must be known during the check.
  • the final values per input and per segment are in the final value memory SP-E, the initial values in the initial value memory SP-S.
  • the end value memory or start value memory must be addressable, this is done via an end value address memory SP-AS per input and a start value address memory SP-AA per input.
  • FIG. 4 The other use of the memory KBM for the descriptors KBD is known from the literature and is assumed.
  • the organization of the end value memory presupposes that the end value (iol) of the membership function with the smallest number (nrel) is contained in the number memory. Then the end values of the membership functions are specified in the end value memory, which additionally end per segment.
  • io and iu refers to the segment.
  • the addresses of the end value memory are designated by EWA, the addresses of the start value memory by SWA.
  • the determination of the membership functions taken by an input signal is explained with the aid of FIGS. 5 to 7. Only the processes that are to be carried out to determine the membership functions that have been taken are shown without the address calculation being explained, which can be done in the usual way.
  • the input counter is set to the value ni of the input under consideration.
  • Running variables j, k are set to 0.
  • the number memory SP-N assigned to the input and the memory word assigned to the segment are then addressed.
  • the number nrel of the membership function with the smallest number contained in the memory word is entered into a number counter nrz. It is then checked whether one of the cases a and b given in FIG. 3 is present. If this is the case, the number nrz is stored in a latch and a further check is carried out to determine whether case a or case b exists. If case a is present, then a hit signal IKF is set which indicates that more than one membership function has been hit.
  • the shape of the membership functions that occur is determined with the help of support points and slopes. Individual cases are shown in FIGS. 15 to 17, specifically as a curve and as shape information.
  • the shape information is also stored in the memory KBM, namely a shape address memory SP-FA per input of the fuzzy processor, and a segment address memory SP-SG and a shape information memory SP-FO per segment. This structure is shown in Figure 8.
  • the individual shape information and the associated function profiles result from FIGS. 15 to 17.
  • the individual curve profiles can always be seen per segment. A distinction is made between different types of shape information in order to be able to distinguish between the individual curve profiles.
  • the form information Fl consists only of the type specification (000) and the value y.
  • the shape consists of a straight line with a positive slope
  • the corresponding shape information F2 specifies the initial value iu and the slope St in addition to the type (001).
  • 15c) shows a variation, namely a positive one
  • the form information F3 contains, in addition to the type specification (010), the slope St and the section y.
  • the case of the negative slope shows figure
  • the form information F4 contains the end value io and the slope St. in addition to the type specification (011).
  • the slope with the y section results from FIG. 16a, which contains the shape information F5, in addition to the type specification (100), the slope St and the section y.
  • the shape information F6 contains, in addition to the type specification (101) and a distinction (SyB) of the triangle, an specification for the section y, the specification of the reference point x and the slopes Stl and St2 on both sides of the support point x.
  • the slope Stl is equal to St2.
  • the trapezoid can be seen from FIG. 16c.
  • the shape information F7 contains, in addition to the value for y, the support points xl, x2 and the slopes Stl and St2.
  • the shape information is simplified if the trapezoid is symmetrical, because then the slope Stl is equal to St2.
  • Figure 17 shows the most general case of a polygon as a membership function.
  • the support points x, y and the slopes between the support points must be included in the form information.
  • Figure 17 then shows the structure of the shape information F8.
  • the membership values for an input signal can be calculated.
  • a flowchart showing this is shown in FIG. 9.
  • the form address memory SP-FA of the corresponding input is addressed.
  • this form address memory there is a segment address SGA for each segment of each input.
  • the segment address memory SP-SG is addressed with this address SGA and the number nrf of the membership function taken.
  • It contains a form address FA for all nrel to nrei, with which the form information memory SP-F0 is finally addressed.
  • the shape information store contains the shape information already described.
  • the shape information is read from the memory and its type is queried. Ent- According to the type found, the membership value ⁇ can then be calculated and saved using the shape information.
  • the membership value ⁇ has the value y, as can readily be seen from FIG. 15a.
  • the run through the flowchart in FIG. 9 is repeated until all the membership functions that have been met have been processed.
  • the hit signal IKF is used for this. If, for example, the overlap between two membership functions is a maximum of 2, then a maximum of two runs are required.
  • the examination according to flow chart 9 thus reveals the type of membership function taken.
  • the membership value ⁇ can then be determined from this using the shape information.
  • the individual steps that have to be carried out for this purpose can be seen in FIGS. 10 to 14.
  • FIG. 10c deals with the case of FIG. 15c. It is understandable in itself.
  • FIG. 15d and FIG. 16a which are dealt with in FIGS. 11a and 11b, respectively.
  • the distance between the support point x and eu of the input signal is determined and from this the membership value is determined in accordance with FIG.
  • the case of the trapezoid in FIG. 16c is shown in FIG. 13.
  • the membership value is either y or results from the multiplication of the slope Stl or St2 by the distance eu -x of the corresponding support point.
  • FIG. 17 The case of the polygon, FIG. 17, is shown in FIG. 14.
  • the support point is immediately adjacent to the left of the point eu and then the membership value is calculated using the slope St starting from this support point.
  • the exact sequence is shown in FIG. 14.
  • segment address memory is addressed. If the same shapes are defined in two segments, shape information is sufficient for a shape address FA in the segment address memory. This would be e.g. this is the case in segments 1, 2, 3, 8, 9 and 14 to 16, since there is only a horizontal level of the same height. In this way, the segment address memory can be constructed to save space.
  • Table 8 shows the organization of the shape information store:
  • FA2 + 1 slope FA12 + 1 with y

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Evolutionary Computation (AREA)
  • Molecular Biology (AREA)
  • Fuzzy Systems (AREA)
  • Biomedical Technology (AREA)
  • Algebra (AREA)
  • Artificial Intelligence (AREA)
  • Health & Medical Sciences (AREA)
  • Data Mining & Analysis (AREA)
  • General Health & Medical Sciences (AREA)
  • Automation & Control Theory (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Image Analysis (AREA)
  • Complex Calculations (AREA)

Abstract

Un processeur à logique floue contient un système de mise en logique floue qui calcule des valeurs d'appartenance des fonctions d'appartenance d'entrée concernées, à partir du signal d'entrée numérique. Les fonctions d'appartenance doivent à cette fin être mémorisées. Afin de réduire l'espace de mémorisation, notamment à haute résolution des signaux d'entrée, il est avantageux de décrire les fonctions d'appartenance à l'aide de caractéristiques prédéfinies, telles que des points d'appui et des pentes et de mémoriser ces caractéristiques. Afin que les calculs s'effectuent plus rapidement, la plage de définition des signaux d'entrée est répartie en segments égaux. Lors de la mise en logique floue, on ne considère que le segment qui contient le signal d'entrée à mettre en logique floue. Le nombre de fonctions d'appartenance à considérer se trouve de ce fait réduit, ce qui raccourcit par conséquent la durée des calculs. Ce procédé permet de mettre des signaux d'entrée en logique floue en un temps minimal de calcul, sans que l'espace nécessaire à la mémorisation des fonctions d'appartenance ne soit trop important.
EP95915138A 1994-04-29 1995-04-10 Procede permettant de preparer et d'effectuer la mise en logique floue d'un signal d'entree numerique se trouvant a l'entree d'un processeur a logique floue Ceased EP0757812A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE4415135 1994-04-29
DE4415135 1994-04-29
PCT/DE1995/000488 WO1995030186A1 (fr) 1994-04-29 1995-04-10 Procede permettant de preparer et d'effectuer la mise en logique floue d'un signal d'entree numerique se trouvant a l'entree d'un processeur a logique floue

Publications (1)

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EP0757812A1 true EP0757812A1 (fr) 1997-02-12

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EP95915138A Ceased EP0757812A1 (fr) 1994-04-29 1995-04-10 Procede permettant de preparer et d'effectuer la mise en logique floue d'un signal d'entree numerique se trouvant a l'entree d'un processeur a logique floue

Country Status (3)

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EP (1) EP0757812A1 (fr)
JP (1) JPH09512366A (fr)
WO (1) WO1995030186A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1524623B1 (fr) 2003-10-16 2008-07-16 STMicroelectronics S.r.l. Procédures floues dans des appareils de calcul

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Publication number Priority date Publication date Assignee Title
JPH04343138A (ja) * 1991-05-20 1992-11-30 Omron Corp 推論部開発システムおよびその動作方法
US5295229A (en) * 1992-06-17 1994-03-15 Motorola, Inc. Circuit and method for determining membership in a set during a fuzzy logic operation

Non-Patent Citations (1)

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Title
See references of WO9530186A1 *

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WO1995030186A1 (fr) 1995-11-09
JPH09512366A (ja) 1997-12-09

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