EP0715240B1 - Voltage regulator for logical circuit in coupled mode - Google Patents

Voltage regulator for logical circuit in coupled mode Download PDF

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Publication number
EP0715240B1
EP0715240B1 EP95410136A EP95410136A EP0715240B1 EP 0715240 B1 EP0715240 B1 EP 0715240B1 EP 95410136 A EP95410136 A EP 95410136A EP 95410136 A EP95410136 A EP 95410136A EP 0715240 B1 EP0715240 B1 EP 0715240B1
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EP
European Patent Office
Prior art keywords
voltage
source
transistor
regulator
current source
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EP95410136A
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German (de)
French (fr)
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EP0715240A1 (en
Inventor
Didier Belot
Patrick Bernard
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STMicroelectronics SA
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STMicroelectronics SA
SGS Thomson Microelectronics SA
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/267—Current mirrors using both bipolar and field-effect technology
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S323/00—Electricity: power supply or regulation systems
    • Y10S323/907—Temperature compensation of semiconductor

Definitions

  • the present invention relates to a voltage source of reference intended to control a current source of a logic circuit in coupled mode (CML). It applies more particularly to the realization of a voltage regulator intended to operate under a low supply voltage of 3 volts.
  • Logic circuits in coupled mode are distributed basically in two categories.
  • Logic circuits with coupled transmitters are made from transistors bipolar.
  • Logic circuits with coupled sources are made from MOS transistors.
  • any logic circuit we seek to obtain a lowest possible supply voltage to generate minimum energy consumption.
  • the minimum value of the supply voltage is limited by the circuits used to supply the logic circuit current sources, a stable reference voltage in case of variation of the supply voltage Vcc or operating temperature. This is to keep the input level deviation constant or output from a logic gate.
  • This difference can be expressed for an ECL logic as the potential difference AV between two complementary outputs of the logic gate.
  • SCL logic this difference can be expressed as the difference AV potential between two complementary inputs of the logic gate.
  • the AV gap between two levels of a logic gate whether ECL or SCL logic is for example 0.4 volts.
  • the invention aims to propose a voltage regulator realized in BICMOS technology which can be intended for current sources of an ECL or SCL logic circuit while allowing a low supply voltage of around 3 volts.
  • the present invention provides a voltage regulator for controlling at least one current source of at least one logic gate in coupled mode and which comprises a first current source produced in bipolar technology mounted between ground and a first resistance connected to a supply voltage, said first source being controlled by the voltage across a second resistance which is crossed by a current supplied by a second current source produced in MOS technology, the value of the current of said second source determining the potential of a regulator output terminal by reproduction of this current on a third current source mounted in mirror on the second source.
  • said second current source consists of a MOS transistor with channel P whose source is connected to the supply voltage, whose grid is connected to its own drain and to the gate of a P channel MOS transistor constituting the third current source, the drain of said MOS transistor of the third current source constituting the output terminal of the regulator.
  • the regulator includes a first voltage source produced in bipolar technology and connected in series with one second opposite voltage source allowing the postponement of the voltage across the first current source across the terminals of the second resistance.
  • the regulator further includes deletion switches any energy consumption of the regulator outside its periods of use.
  • said first current source consists of two transistors NPN type bipolar mirror mounted, the transmitter of a first transistor being connected to ground via of two resistors connected in series while the transmitter of a second transistor is connected to the connection point between said two resistors, the bases of the two transistors constituting a current source control terminal while the collector of the second transistor constitutes an output terminal connected to the first voltage source.
  • said first voltage source consists of a bipolar transistor PNP type whose collector is connected to ground, whose base is connected to the second transistor of the first current source and whose transmitter is connected to the grid of a N-channel MOS transistor constituting the second source of voltage, the source of said MOS transistor of the second source of voltage being connected to ground while its drain is connected to the drain of the MOS transistor of the second source of current.
  • the regulator further includes three P-channel MOS transistors including the sources are connected to the supply voltage by through a first switch, including the grids are connected to a starting assistance device and whose drains are respectively connected to the collectors of the transistors from the first current source and to the emitter of the transistor constituting the first source of tension.
  • a current source of a logic gate consists of a transistor N-channel MOS with grid and drain connected, the drain of said transistor being connected to the output terminal of the regulator and its source being connected to ground.
  • the regulator includes a voltage-current converter mounted between the regulator output terminal and ground, said converter being made up of a bipolar transistor of the NPN type of which the transmitter is connected to ground via a resistance and whose collector is connected to said terminal exit ; a current source of a logic gate being constituted an NPN type bipolar transistor whose emitter is connected to ground via a resistor and which is mirrored on the transistor of said converter voltage-current.
  • the regulator further comprises an NPN type bipolar transistor of compensation of the base currents of the current source of the logic gate, the base of said compensation transistor being connected to the regulator output terminal while its collector is connected to the supply voltage and that its transmitter is connected to the base of the transistor of said converter voltage-current.
  • a voltage regulator according to the invention such as shown in Figure 1 has a first current source 11 controlled by the voltage across a resistor R21 placed between ground and a node C of the circuit.
  • Source 11 made in bipolar technology, is placed between the ground and a first voltage source 12 which is connected to the supply voltage via a resistor R22.
  • the connection node between resistance R22 and the source voltage 12 is connected to node C via a second voltage source 13.
  • the node C is connected to the voltage Vcc supply via a second current source 14 made in MOS technology.
  • a third current source 15, also in MOS technology is mounted mirrored on the source 14 and is connected to an output terminal S of the regulator. The value of the output voltage Vcs on the terminal S is fixed by the value of resistance R21 and of current I supplied by current source 14 and mirrored on the source 15.
  • the potential of the output terminal S is equal to the potential of node C which corresponds to the product of the resistance R21 by current I.
  • the potential of node C is regulated as a function of temperature by means of the source 11.
  • this potential being fixed by the source 11 with respect to ground, it is independent of the supply voltage Vcc.
  • the role of the voltage source 12 is to compensate the voltage drop provided by the source 13 which constitutes a voltage follower allowing the voltage to be transferred to the terminals from source 11 on node C.
  • a change in temperature results in a variation of the value of the resistance R21. This variation is compensated by a variation of the potential of the node C by through the source 11.
  • the potential Vcs of the output terminal S delivered to the terminals of a load Q is independent temperature and supply voltage Vcc.
  • the minimum supply voltage of the regulator according to the invention may be weak, as will be shown in relationship with each of the embodiments described below.
  • An advantage of the present invention is that such regulator can be used to control power sources which are carried out either in bipolar technology or in MOS technology.
  • the invention provides a adaptation of the device output to allow control by running from source 15 which is in technology MOS.
  • Figure 3 illustrates this application.
  • Figure 2 shows the diagram of a regulator such as shown in Figure 1 for the control of sources of current of a logic circuit based on transistors MOS.
  • the current source 11 consists of two transistors NPN type Tll and T12 bipolar linked by a factor of surface and whose bases are connected to each other and to a first terminal of resistance R21.
  • the other resistance R21 is connected to ground.
  • the transistor emitter Tll is connected to ground via two resistors R23 and R24 connected in series. The connection between these two resistors is connected to the emitter of transistor T12.
  • Collectors transistors T11 and T12 are respectively connected the drains of two P-channel MOS transistors MP11 and MP12, the gates are connected together and to the drain of the transistor MP11.
  • the sources of the transistors MP11 and MP12 are connected together at the supply voltage Vcc via a first switch 16 whose role will be explained more far.
  • the collector of transistor T12 which constitutes the output of the power source 11 is connected to the base of a bipolar transistor T13 of PNP type constituting the source of voltage 12.
  • the collector of transistor T12 is connected to the ground and its emitter is connected to the drain of a MOS transistor at P channel MP13 as well as the gate of an N channel MOS transistor MN13.
  • the transistors MP11, MP12 and MP13 correspond to the resistance R22 symbolized in Figure 1.
  • the gate of the transistor MP13 is connected to the drain of transistor MP11 which constitutes a START input terminal of a device to assist in starting the regulator.
  • the device starting aid is a classic device which is not shown.
  • the START input terminal may if necessary, correspond to the emitter of transistor T11.
  • the transistor MN13 constitutes the voltage source 13 of the diagram represented in figure 1.
  • the source of this transistor is connected to ground via the resistor R21 while its drain is connected to the drain of a MOS transistor P channel MP14.
  • the transistor MP14 constitutes the current source 14. Its source is connected to the supply voltage Vcc while its grid is connected to its drain and the grid an MP15 P channel MOS transistor.
  • This MP15 transistor constitutes the current source 15 and its source is connected to the supply voltage Vcc while its drain constitutes the regulator output terminal S.
  • the regulator also has two other switches 17 and 18.
  • the switch 17 consists of a transistor MN14 N-channel MOS whose source is connected to ground and whose drain is connected to the gate of transistor MN13.
  • the gate of transistor MN14 is connected to a control terminal PWD.
  • the switch 18 consists of a MOS transistor with N channel MN15 whose source is connected to ground and whose drain is connected to the output terminal S of the regulator. Grid of transistor MN15 is connected to the control terminal PWD.
  • the switch 16 consists of a P-channel MOS transistor MP16 whose source is connected to the supply voltage and whose drain is connected to the sources of the transistors MP11, MP12 and MP13. The gate of the transistor MP16 is connected to a terminal of NPWD command.
  • switches 16, 17 and 18 The role of switches 16, 17 and 18 is to remove all energy consumption from the regulator outside periods of use under the action of a control signal PWD and its inverse NPWD. When the regulator is in operation, the position of the switches is thus closed for switch 16 (transistor MP16 on) and open for switches 17 and 18 (transistors MN14 and MN15 blocked).
  • a capacitor C is inserted between the base of the transistor T13 and ground to provide an alternative ground based on transistor T13.
  • the charge Q here consists of one (or more) current source 2 of an SCL logic.
  • One such source is conventionally constituted by an N channel MOS transistor MN3 of which the source is connected to ground and whose drain is connected to its own grid and sources of MOS transistors (not shown) logic with coupled sources.
  • the transistor gate MN3 is the control input for the current source 2.
  • the voltage Vcs at the terminals of the charges Q is equal to R21 * I, where I represents the current of the source 14.
  • Minimum operating supply voltage of such a regulator is about 2.2 volts corresponding to two threshold voltages of MOS transistors (those of transistors MP14 and MN13) and at a base-emitter voltage (that of the transistor T12).
  • a regulator as shown in FIG. 2 produced with the following resistance values and the width to gate length ratios (W / L) for the MOS transistors makes it possible to obtain an operating range in supply voltage of 2.2 to 7 volts and a Vcs voltage of 0.4 volts.
  • R21 30 k ⁇ ;
  • R23 10.8 k ⁇ ;
  • R24 74.1 k ⁇ ;
  • Figure 3 shows the diagram of a regulator such as shown in Figure 1 for the control of sources of current of a logic circuit based on transistors bipolar.
  • the charge Q here consists of one (or more) current source 1 of an ECL logic gate.
  • a source conventionally consists of a bipolar transistor of the type NPN T3 whose transmitter is connected to ground via with a resistor R3 and whose collector is connected to the emitters of bipolar transistors (not shown) of the logic with coupled transmitters.
  • the base of transistor T3 constitutes the input current source control 1.
  • transistor MP15 no longer directly constitutes the output terminal S of the regulator, but is connected to the collector of a NPN T14 bipolar transistor of which the transmitter is connected to ground via a resistance R25.
  • the transistor T14 plays the role of a converter voltage-current to allow current control of bipolar transistors T3 of the loads Q.
  • the transistors T3 of the charges Q are mirrored on transistor T14.
  • transistor T14 is linked to the fact that the current sources being produced in bipolar technology, they are controlled by current while in the case from source. in MOS technology they are voltage controlled.
  • a bipolar transistor T15 of NPN type is connected by its base to the drain of the MP15 transistor while that its collector is connected to the supply voltage Vcc and that its emitter is connected to the base of transistor T14.
  • This transistor T15 makes it possible to supply sufficient current for control a large number of sources 1 using the same regulator.
  • the switch 18 is here placed in parallel on the resistance R21. Switch 18 now acts on the bases transistors T11 and T12.
  • Vcs of the regulator is here equal to R25 * I + Vbe 14 , where Vbe 14 represents the base-emitter voltage of the transistor T14 and where I represents the current mirrored on the source 14.
  • Minimum operating supply voltage of such a regulator is about 2.5 volts corresponding to the threshold voltage of transistor MP15 and two base-emitter voltages (those of transistors T14 and T15).
  • the maximum value current that can be delivered to drive transistors T3 from sources 1 is around 1 mA, which corresponds to a control capacity of around four hundred sources 1.
  • a regulator as shown in FIG. 3 produced with the following resistance values and the W / L ratios for the MOS transistors makes it possible to obtain an operating range in supply voltage of 2, 5 to 7 volts and a Vcs voltage of 0.4 volts.
  • R21 30 k ⁇ ;
  • R23 10.8 k ⁇ ;
  • R24 74.1 k ⁇ ;
  • R25 1 k ⁇ ;
  • W / L (MP11, MP12) 40/10;
  • W / L (MP15) 2050/10;
  • the invention makes it possible to use a low voltage power supply of about 3 volts whether for current sources in bipolar or MOS technology.
  • Voltage Vcs delivered by the regulator is also stable in the event of variation of temperature and / or supply voltage.
  • the present invention is susceptible various variants and modifications that will appear at one skilled in the art.
  • each of the components described may be replaced by one or more elements filling the same function.
  • the dimensioning of the different constituents is at the scope of the skilled person according to the functional indications given in the present description.

Description

La présente invention concerne une source de tension de référence destinée à commander une source de courant d'un circuit logique en mode couplé (CML). Elle s'applique plus particulièrement à la réalisation d'un régulateur de tension destiné à fonctionner sous une faible tension d'alimentation de 3 volts.The present invention relates to a voltage source of reference intended to control a current source of a logic circuit in coupled mode (CML). It applies more particularly to the realization of a voltage regulator intended to operate under a low supply voltage of 3 volts.

Les circuits en logique en mode couplé se répartissent essentiellement en deux catégories. Les circuits logiques à émetteurs couplés (ECL) sont réalisés à partir de transistors bipolaires. Les circuits logiques à sources couplées (SCL) sont réalisés à partir de transistors MOS.Logic circuits in coupled mode are distributed basically in two categories. Logic circuits with coupled transmitters (ECL) are made from transistors bipolar. Logic circuits with coupled sources (SCL) are made from MOS transistors.

Dans tout circuit logique, on cherche à obtenir une tension d'alimentation la plus basse possible afin d'engendrer une consommation d'énergie minimale. Cependant, la valeur minimale de la tension d'alimentation est limitée par les circuits utilisés pour fournir aux sources de courants du circuit logique, une tension de référence stable en cas de variation de la tension d'alimentation Vcc ou de la température de fonctionnement. Ceci afin de maintenir constant l'écart de niveau d'entrée ou de sortie d'une porte logique. Cet écart peut s'exprimer pour une logique ECL comme étant la différence de potentiel AV entre deux sorties complémentaires de la porte logique. Pour une logique SCL, cet écart peut s'exprimer comme étant la différence de potentiel AV entre deux entrées complémentaires de la porte logique.In any logic circuit, we seek to obtain a lowest possible supply voltage to generate minimum energy consumption. However, the minimum value of the supply voltage is limited by the circuits used to supply the logic circuit current sources, a stable reference voltage in case of variation of the supply voltage Vcc or operating temperature. This is to keep the input level deviation constant or output from a logic gate. This difference can be expressed for an ECL logic as the potential difference AV between two complementary outputs of the logic gate. For SCL logic, this difference can be expressed as the difference AV potential between two complementary inputs of the logic gate.

L'écart AV entre deux niveaux d'une porte logique qu'il s'agisse d'une logique ECL ou SCL est par exemple de 0,4 volts.The AV gap between two levels of a logic gate whether ECL or SCL logic is for example 0.4 volts.

Le choix entre les deux technologies (bipolaire ou MOS) des circuits logiques dépend de la destination du circuit. Par exemple, si l'on privilégie la rapidité de commutation des portes logiques, celles-ci sont généralement réalisées en logique à émetteurs couplés.The choice between the two technologies (bipolar or MOS) of logic circuits depends on the destination of the circuit. For example, if we favor the speed of switching of logic gates, these are generally made in logic with coupled transmitters.

Dans des circuits BICMOS faisant appel sur une même puce aux deux technologies bipolaire et CMOS, on peut avoir recours aux deux catégories de circuits logiques. Cependant, les régulateurs de tension destinés à commander les sources de courant sont alors réalisés respectivement au moyen de transistors bipolaires pour les logiques ECL et au moyen de transistors MOS pour les logiques SCL. De plus, les régulateurs connus utilisant des transistors bipolaires ne permettent pas de diminuer la tension d'alimentation à une valeur de l'ordre de 3 volts.In BICMOS circuits using the same chip with both bipolar and CMOS technologies, we can have use of two categories of logic circuits. However, voltage regulators intended to control the sources of current are then produced respectively by means of transistors bipolar for ECL logic and by means of transistors MOS for SCL logic. In addition, known regulators using bipolar transistors do not decrease the supply voltage at a value of the order of 3 volts.

L'invention vise à proposer un régulateur de tension réalisé en technologie BICMOS qui puisse être destiné à des sources de courant d'un circuit logique ECL ou SCL tout en autorisant une faible tension d'alimentation d'environ 3 volts.The invention aims to propose a voltage regulator realized in BICMOS technology which can be intended for current sources of an ECL or SCL logic circuit while allowing a low supply voltage of around 3 volts.

Pour atteindre cet objet, la présente invention prévoit un régulateur de tension destiné à commander au moins une source de courant d'au moins une porte logique en mode couplé et qui comporte une première source de courant réalisée en technologie bipolaire montée entre la masse et une première résistance connectée à une tension d'alimentation, ladite première source étant commandée par la tension aux bornes d'une seconde résistance qui est traversée par un courant fourni par une deuxième source de courant réalisée en technologie MOS, la valeur du courant de ladite deuxième source déterminant le potentiel d'une borne de sortie du régulateur par reproduction de ce courant sur une troisième source de courant montée en miroir sur la deuxième source.To achieve this object, the present invention provides a voltage regulator for controlling at least one current source of at least one logic gate in coupled mode and which comprises a first current source produced in bipolar technology mounted between ground and a first resistance connected to a supply voltage, said first source being controlled by the voltage across a second resistance which is crossed by a current supplied by a second current source produced in MOS technology, the value of the current of said second source determining the potential of a regulator output terminal by reproduction of this current on a third current source mounted in mirror on the second source.

Selon un mode de réalisation de l'invention, ladite deuxième source de courant est constituée d'un transistor MOS à canal P dont la source est connectée à la tension d'alimentation, dont la grille est reliée à son propre drain et à la grille d'un transistor MOS à canal P constitutif de la troisième source de courant, le drain dudit transistor MOS de la troisième source de courant constituant la borne de sortie du régulateur.According to one embodiment of the invention, said second current source consists of a MOS transistor with channel P whose source is connected to the supply voltage, whose grid is connected to its own drain and to the gate of a P channel MOS transistor constituting the third current source, the drain of said MOS transistor of the third current source constituting the output terminal of the regulator.

Selon un mode de réalisation de l'invention, le régulateur comporte une première source de tension réalisée en technologie bipolaire et montée en série avec une seconde source de tension de sens opposé permettant le report de la tension aux bornes de la première source de courant aux bornes de la seconde résistance.According to one embodiment of the invention, the regulator includes a first voltage source produced in bipolar technology and connected in series with one second opposite voltage source allowing the postponement of the voltage across the first current source across the terminals of the second resistance.

Selon un mode de réalisation de l'invention, le régulateur comporte en outre des interrupteurs de suppression de toute consommation d'énergie du régulateur hors de ses périodes d'utilisation.According to one embodiment of the invention, the regulator further includes deletion switches any energy consumption of the regulator outside its periods of use.

Selon un mode de réalisation de l'invention, ladite première source de courant est constituée de deux transistors bipolaires de type NPN montés en miroir, l'émetteur d'un premier transistor étant connecté à la masse par l'intermédiaire de deux résistances montées en série tandis que l'émetteur d'un second transistor est relié au point de liaison entre lesdites deux résistances, les bases des deux transistors constituant une borne de commande de la source de courant tandis que le collecteur du second transistor en constitue une borne de sortie reliée à la première source de tension.According to one embodiment of the invention, said first current source consists of two transistors NPN type bipolar mirror mounted, the transmitter of a first transistor being connected to ground via of two resistors connected in series while the transmitter of a second transistor is connected to the connection point between said two resistors, the bases of the two transistors constituting a current source control terminal while the collector of the second transistor constitutes an output terminal connected to the first voltage source.

Selon un mode de réalisation de l'invention, ladite première source de tension est constituée d'un transistor bipolaire de type PNP dont le collecteur est connecté à la masse, dont la base est reliée au second transistor de la première source de courant et dont l'émetteur est relié à la grille d'un transistor MOS à canal N constitutif de la seconde source de tension, la source dudit transistor MOS de la seconde source de tension étant connectée à la masse tandis que son drain est relié au drain du transistor MOS de la deuxième source de courant.According to one embodiment of the invention, said first voltage source consists of a bipolar transistor PNP type whose collector is connected to ground, whose base is connected to the second transistor of the first current source and whose transmitter is connected to the grid of a N-channel MOS transistor constituting the second source of voltage, the source of said MOS transistor of the second source of voltage being connected to ground while its drain is connected to the drain of the MOS transistor of the second source of current.

Selon un mode de réalisation de l'invention, le régulateur comporte en outre trois transistors MOS à canal P dont les sources sont connectées à la tension d'alimentation par l'intermédiaire d'un premier interrupteur, dont les grilles sont reliées à un dispositif d'aide au démarrage et dont les drains sont respectivement reliés aux collecteurs des transistors de la première source de courant et à l'émetteur du transistor constitutif de la première source de tension.According to one embodiment of the invention, the regulator further includes three P-channel MOS transistors including the sources are connected to the supply voltage by through a first switch, including the grids are connected to a starting assistance device and whose drains are respectively connected to the collectors of the transistors from the first current source and to the emitter of the transistor constituting the first source of tension.

Selon un mode de réalisation de l'invention, une source de courant d'une porte logique est constituée d'un transistor MOS à canal N à grille et drain reliés, le drain dudit transistor étant raccordé à la borne de sortie du régulateur et sa source étant connectée à la masse.According to one embodiment of the invention, a current source of a logic gate consists of a transistor N-channel MOS with grid and drain connected, the drain of said transistor being connected to the output terminal of the regulator and its source being connected to ground.

Selon un mode de réalisation de l'invention, le régulateur comporte un convertisseur tension-courant monté entre la borne de sortie du régulateur et la masse, ledit convertisseur étant constitué d'un transistor bipolaire de type NPN dont l'émetteur est connecté à la masse par l'intermédiaire d'une résistance et dont le collecteur est relié à ladite borne de sortie ; une source de courant d'une porte logique étant constituée d'un transistor bipolaire de type NPN dont l'émetteur est connecté à la masse par l'intermédiaire d'une résistance et qui est monté en miroir sur le transistor dudit convertisseur tension-courant.According to one embodiment of the invention, the regulator includes a voltage-current converter mounted between the regulator output terminal and ground, said converter being made up of a bipolar transistor of the NPN type of which the transmitter is connected to ground via a resistance and whose collector is connected to said terminal exit ; a current source of a logic gate being constituted an NPN type bipolar transistor whose emitter is connected to ground via a resistor and which is mirrored on the transistor of said converter voltage-current.

Selon un mode de réalisation de l'invention, le régulateur comporte en outre un transistor bipolaire de type NPN de compensation des courants de base de la source de courant de la porte logique, la base dudit transistor de compensation étant reliée à la borne de sortie du régulateur tandis que son collecteur est connecté à la tension d'alimentation et que son émetteur est relié à la base du transistor dudit convertisseur tension-courant.According to one embodiment of the invention, the regulator further comprises an NPN type bipolar transistor of compensation of the base currents of the current source of the logic gate, the base of said compensation transistor being connected to the regulator output terminal while its collector is connected to the supply voltage and that its transmitter is connected to the base of the transistor of said converter voltage-current.

Ces objets, caractéristiques et avantages, ainsi que d'autres de la présente invention seront exposés en détail dans la description suivante de modes de réalisation particuliers faite à titre non limitatif en relation avec les figures jointes parmi lesquelles :

  • la figure 1 est un schéma de principe d'un mode de réalisation d'un régulateur de tension selon l'invention ;
  • la figure 2 est un schéma détaillé d'un mode de réalisation d'un régulateur selon l'invention destiné à des sources de courant réalisées en technologie MOS ; et
  • la figure 3 est le schéma détaillé d'un mode de réalisation d'un régulateur selon l'invention destiné à des sources de courant réalisées en technologie bipolaire.
    • These objects, characteristics and advantages, as well as others of the present invention will be explained in detail in the following description of particular embodiments given without implied limitation in relation to the attached figures among which:
  • Figure 1 is a block diagram of an embodiment of a voltage regulator according to the invention;
  • FIG. 2 is a detailed diagram of an embodiment of a regulator according to the invention intended for current sources produced in MOS technology; and
  • FIG. 3 is the detailed diagram of an embodiment of a regulator according to the invention intended for current sources produced in bipolar technology.

    • Un régulateur de tension selon l'invention tel que représenté à la figure 1 comporte une première source de courant 11 commandée par la tension aux bornes d'une résistance R21 placée entre la masse et un noeud C du circuit. La source 11, réalisée en technologie bipolaire, est placée entre la masse et une première source de tension 12 qui est connectée à la tension d'alimentation par l'intermédiaire d'une résistance R22. Le noeud de connexion entre la résistance R22 et la source de tension 12 est relié au noeud C par l'intermédiaire d'une seconde source de tension 13. Le noeud C est connecté à la tension d'alimentation Vcc par l'intermédiaire d'une deuxième source de courant 14 réalisée en technologie MOS. Une troisième source de courant 15, également en technologie MOS, est montée en miroir sur la source 14 et est reliée à une borne de sortie S du régulateur. La valeur de la tension de sortie Vcs sur la borne S est fixée par la valeur de la résistance R21 et du courant I fourni par la source de courant 14 et miroité sur la source 15. A voltage regulator according to the invention such as shown in Figure 1 has a first current source 11 controlled by the voltage across a resistor R21 placed between ground and a node C of the circuit. Source 11, made in bipolar technology, is placed between the ground and a first voltage source 12 which is connected to the supply voltage via a resistor R22. The connection node between resistance R22 and the source voltage 12 is connected to node C via a second voltage source 13. The node C is connected to the voltage Vcc supply via a second current source 14 made in MOS technology. A third current source 15, also in MOS technology, is mounted mirrored on the source 14 and is connected to an output terminal S of the regulator. The value of the output voltage Vcs on the terminal S is fixed by the value of resistance R21 and of current I supplied by current source 14 and mirrored on the source 15.

    En effet, le potentiel de la borne de sortie S est égal au potentiel du noeud C qui correspond au produit de la résistance R21 par le courant I. Or le potentiel du noeud C est régulé en fonction de la température au moyen de la source 11. De plus, ce potentiel étant fixé par la source 11 par rapport à la masse, il est indépendant de la tension d'alimentation Vcc.Indeed, the potential of the output terminal S is equal to the potential of node C which corresponds to the product of the resistance R21 by current I. Now the potential of node C is regulated as a function of temperature by means of the source 11. In addition, this potential being fixed by the source 11 with respect to ground, it is independent of the supply voltage Vcc.

    Le rôle de la source de tension 12 est de compenser la chute de tension apportée par la source 13 qui constitue un suiveur de tension permettant de reporter la tension aux bornes de la source 11 sur le noeud C.The role of the voltage source 12 is to compensate the voltage drop provided by the source 13 which constitutes a voltage follower allowing the voltage to be transferred to the terminals from source 11 on node C.

    Une variation de la température se traduit par une variation de la valeur de la résistance R21. Cette variation est compensée par une variation du potentiel du noeud C par l'intermédiaire de la source 11. Ainsi, le potentiel Vcs de la borne de sortie S délivré aux bornes d'une charge Q est indépendant de la température et de la tension d'alimentation Vcc.A change in temperature results in a variation of the value of the resistance R21. This variation is compensated by a variation of the potential of the node C by through the source 11. Thus, the potential Vcs of the output terminal S delivered to the terminals of a load Q is independent temperature and supply voltage Vcc.

    La tension minimale d'alimentation du régulateur selon l'invention peut être faible, comme on le montrera en relation avec chacun des modes de réalisation décrits ci-après.The minimum supply voltage of the regulator according to the invention may be weak, as will be shown in relationship with each of the embodiments described below.

    Un avantage de la présente invention est qu'un tel régulateur peut servir à commander des sources de courant qui sont réalisées soit en technologie bipolaire, soit en technologie MOS.An advantage of the present invention is that such regulator can be used to control power sources which are carried out either in bipolar technology or in MOS technology.

    Si la technologie utilisée pour les sources de courant du circuit logique est une technologie MOS, la charge Q telle que représentée à la figure 1 est directement constituée par ces sources de courant. La figure 2 illustre cette application.If the technology used for power sources of the logic circuit is MOS technology, the charge Q as shown in Figure 1 is directly constituted by these current sources. Figure 2 illustrates this application.

    Si la technologie des sources de courant du circuit logique est une technologie bipolaire, l'invention prévoit une adaptation de la sortie du dispositif pour permettre une commande en courant à partir de la source 15 qui est en technologie MOS. La figure 3 illustre cette application.If the technology of the circuit current sources logic is bipolar technology, the invention provides a adaptation of the device output to allow control by running from source 15 which is in technology MOS. Figure 3 illustrates this application.

    La figure 2 représente le schéma d'un régulateur tel que représenté à la figure 1 pour la commande de sources de courant d'un circuit logique réalisées à base de transistors MOS.Figure 2 shows the diagram of a regulator such as shown in Figure 1 for the control of sources of current of a logic circuit based on transistors MOS.

    La source de courant 11 est constituée de deux transistors bipolaires de type NPN Tll et T12 liés par un facteur de surface et dont les bases sont reliées entre elles et à une première borne de la résistance R21. L'autre borne de la résistance R21 est connectée à la masse. L'émetteur du transistor Tll est connecté à la masse par l'intermédiaire de deux résistances R23 et R24 montées en série. La liaison entre ces deux résistances est reliée à l'émetteur du transistor T12. Les collecteurs des transistors T11 et T12 sont respectivement reliés aux drains de deux transistors MOS à canal P MP11 et MP12 dont les grilles sont reliées ensemble et au drain du transistor MP11. Les sources des transistors MP11 et MP12 sont connectées ensemble à la tension d'alimentation Vcc par l'intermédiaire d'un premier interrupteur 16 dont le rôle sera expliqué plus loin.The current source 11 consists of two transistors NPN type Tll and T12 bipolar linked by a factor of surface and whose bases are connected to each other and to a first terminal of resistance R21. The other resistance R21 is connected to ground. The transistor emitter Tll is connected to ground via two resistors R23 and R24 connected in series. The connection between these two resistors is connected to the emitter of transistor T12. Collectors transistors T11 and T12 are respectively connected the drains of two P-channel MOS transistors MP11 and MP12, the gates are connected together and to the drain of the transistor MP11. The sources of the transistors MP11 and MP12 are connected together at the supply voltage Vcc via a first switch 16 whose role will be explained more far.

    Le collecteur du transistor T12 qui constitue la sortie de la source de courant 11 est connecté à la base d'un transistor bipolaire T13 de type PNP constituant la source de tension 12. Le collecteur du transistor T12 est connecté à la masse et son émetteur est relié au drain d'un transistor MOS à canal P MP13 ainsi qu'à la grille d'un transistor MOS à canal N MN13. Les transistors MP11, MP12 et MP13 correspondent à la résistance R22 symbolisée à la figure 1. La grille du transistor MP13 est reliée au drain du transistor MP11 qui constitue une borne d'entrée START d'un dispositif d'aide au démarrage du régulateur. En effet, à la mise sous tension du circuit, il est nécessaire de forcer le potentiel de la grille des transistors MP11, MP12 et MP13 pour qu'il soit inférieur à la tension d'alimentation Vcc diminuée de la chute de tension due à la résistance interne de l'interrupteur 16 à l'état fermé. Le dispositif d'aide au démarrage est un dispositif classique qui n'est pas représenté. La borne d'entrée START pourra le cas échéant correspondre à l'émetteur du transistor T11. The collector of transistor T12 which constitutes the output of the power source 11 is connected to the base of a bipolar transistor T13 of PNP type constituting the source of voltage 12. The collector of transistor T12 is connected to the ground and its emitter is connected to the drain of a MOS transistor at P channel MP13 as well as the gate of an N channel MOS transistor MN13. The transistors MP11, MP12 and MP13 correspond to the resistance R22 symbolized in Figure 1. The gate of the transistor MP13 is connected to the drain of transistor MP11 which constitutes a START input terminal of a device to assist in starting the regulator. Indeed, when the circuit is energized, it is necessary to force the potential of the gate of the transistors MP11, MP12 and MP13 so that it is lower than the voltage supply voltage Vcc reduced by the voltage drop due to the internal resistance of switch 16 in closed state. The device starting aid is a classic device which is not shown. The START input terminal may if necessary, correspond to the emitter of transistor T11.

    Le transistor MN13 constitue la source de tension 13 du schéma représenté à la figure 1. La source de ce transistor est connectée à la masse par l'intermédiaire de la résistance R21 tandis que son drain est relié au drain d'un transistor MOS à canal P MP14. Le transistor MP14 constitue la source de courant 14. Sa source est connectée à la tension d'alimentation Vcc tandis que sa grille est reliée à son drain et à la grille d'un transistor MOS à canal P MP15. Ce transistor MP15 constitue la source de courant 15 et sa source est connectée à la tension d'alimentation Vcc tandis que son drain constitue la borne de sortie S du régulateur.The transistor MN13 constitutes the voltage source 13 of the diagram represented in figure 1. The source of this transistor is connected to ground via the resistor R21 while its drain is connected to the drain of a MOS transistor P channel MP14. The transistor MP14 constitutes the current source 14. Its source is connected to the supply voltage Vcc while its grid is connected to its drain and the grid an MP15 P channel MOS transistor. This MP15 transistor constitutes the current source 15 and its source is connected to the supply voltage Vcc while its drain constitutes the regulator output terminal S.

    Le régulateur comporte en outre deux autres interrupteurs 17 et 18. L'interrupteur 17 est constitué d'un transistor MOS à canal N MN14 dont la source est connectée à la masse et dont le drain est relié à la grille du transistor MN13. La grille du transistor MN14 est reliée à une borne de commande PWD. L'interrupteur 18 est constitué d'un transistor MOS à canal N MN15 dont la source est connectée à la masse et dont le drain est relié à la borne de sortie S du régulateur. La grille du transistor MN15 est reliée à la borne de commande PWD. L'interrupteur 16 est constitué d'un transistor MOS à canal P MP16 dont la source est connectée à la tension d'alimentation et dont le drain est relié aux sources des transistors MP11, MP12 et MP13. La grille du transistor MP16 est reliée à une borne de commande NPWD. Le rôle des interrupteurs 16, 17 et 18 est de supprimer toute consommation d'énergie du régulateur hors de ses périodes d'utilisation sous l'action d'un signal de commande PWD et de son inverse NPWD. Lorsque le régulateur est en fonctionnement, la position des interrupteurs est ainsi fermée pour l'interrupteur 16 (transistor MP16 passant) et ouverte pour les interrupteurs 17 et 18 (transistors MN14 et MN15 bloqués).The regulator also has two other switches 17 and 18. The switch 17 consists of a transistor MN14 N-channel MOS whose source is connected to ground and whose drain is connected to the gate of transistor MN13. The gate of transistor MN14 is connected to a control terminal PWD. The switch 18 consists of a MOS transistor with N channel MN15 whose source is connected to ground and whose drain is connected to the output terminal S of the regulator. Grid of transistor MN15 is connected to the control terminal PWD. The switch 16 consists of a P-channel MOS transistor MP16 whose source is connected to the supply voltage and whose drain is connected to the sources of the transistors MP11, MP12 and MP13. The gate of the transistor MP16 is connected to a terminal of NPWD command. The role of switches 16, 17 and 18 is to remove all energy consumption from the regulator outside periods of use under the action of a control signal PWD and its inverse NPWD. When the regulator is in operation, the position of the switches is thus closed for switch 16 (transistor MP16 on) and open for switches 17 and 18 (transistors MN14 and MN15 blocked).

    Un condensateur C est intercalé entre la base du transistor T13 et la masse afin de fournir une masse alternative sur la base du transistor T13. A capacitor C is inserted between the base of the transistor T13 and ground to provide an alternative ground based on transistor T13.

    La charge Q est ici constituée d'une (ou plusieurs) source de courant 2 d'une logique SCL. Une telle source est classiquement constituée d'un transistor MOS à canal N MN3 dont la source est connectée à la masse et dont le drain est relié à sa propre grille et aux sources de transistors MOS (non représentés) de la logique à sources couplées. La grille du transistor MN3 constitue l'entrée de commande de la source de courant 2.The charge Q here consists of one (or more) current source 2 of an SCL logic. One such source is conventionally constituted by an N channel MOS transistor MN3 of which the source is connected to ground and whose drain is connected to its own grid and sources of MOS transistors (not shown) logic with coupled sources. The transistor gate MN3 is the control input for the current source 2.

    La tension Vcs aux bornes des charges Q est égale à R21*I, où I représente le courant de la source 14.The voltage Vcs at the terminals of the charges Q is equal to R21 * I, where I represents the current of the source 14.

    La tension d'alimentation minimale de fonctionnement d'un tel régulateur est d'environ 2,2 volts correspondant à deux tensions seuil de transistors MOS (celles des transistors MP14 et MN13) et à une tension base-émetteur (celle du transistor T12).Minimum operating supply voltage of such a regulator is about 2.2 volts corresponding to two threshold voltages of MOS transistors (those of transistors MP14 and MN13) and at a base-emitter voltage (that of the transistor T12).

    A titre d'exemple de réalisation, un régulateur tel que représenté à la figure 2 réalisé avec les valeurs de résistances et les rapports largeur sur longueur de grille (W/L) suivants pour les transistors MOS permet d'obtenir une plage de fonctionnement en tension d'alimentation de 2,2 à 7 volts et une tension Vcs de 0,4 volt. R21 = 30 kΩ ; R23 = 10,8 kΩ ; R24 = 74,1 kΩ ; W/L(MP11, MP12) = 40/5 ; W/L(MP13) = 10/2 ; W/L(MP14) = 100/3 ; W/L(MP15) = 600/3 ; W/L(MP16, MN13) = 100/0,7 ; W/L(MN14, MN15) = 3/1. As an exemplary embodiment, a regulator as shown in FIG. 2 produced with the following resistance values and the width to gate length ratios (W / L) for the MOS transistors makes it possible to obtain an operating range in supply voltage of 2.2 to 7 volts and a Vcs voltage of 0.4 volts. R21 = 30 kΩ; R23 = 10.8 kΩ; R24 = 74.1 kΩ; W / L (MP11, MP12) = 40/5; W / L (MP13) = 10/2; W / L (MP14) = 100/3; W / L (MP15) = 600/3; W / L (MP16, MN13) = 100 / 0.7; W / L (MN14, MN15) = 3/1.

    La figure 3 représente le schéma d'un régulateur tel que représenté à la figure 1 pour la commande de sources de courant d'un circuit logique réalisées à base de transistors bipolaires.Figure 3 shows the diagram of a regulator such as shown in Figure 1 for the control of sources of current of a logic circuit based on transistors bipolar.

    La constitution de ce régulateur est similaire à celle de celui représenté à la figure 2. Les mêmes éléments ont été désignés par les mêmes références.The constitution of this regulator is similar to that of that shown in Figure 2. The same elements have have been designated by the same references.

    La charge Q est ici constituée d'une (ou plusieurs) source de courant 1 d'une porte logique ECL. Une telle source est classiquement constituée d'un transistor bipolaire de type NPN T3 dont l'émetteur est relié à la masse par l'intermédiaire d'une résistance R3 et dont le collecteur est relié aux émetteurs de transistors bipolaires (non représentés) de la logique à émetteurs couplés. La base du transistor T3 constitue l'entrée de commande de la source de courant 1.The charge Q here consists of one (or more) current source 1 of an ECL logic gate. Such a source conventionally consists of a bipolar transistor of the type NPN T3 whose transmitter is connected to ground via with a resistor R3 and whose collector is connected to the emitters of bipolar transistors (not shown) of the logic with coupled transmitters. The base of transistor T3 constitutes the input current source control 1.

    Le drain du transistor MP15 ne constitue plus directement la borne de sortie S du régulateur, mais est relié au collecteur d'un transistor bipolaire de type NPN T14 dont l'émetteur est connecté à la masse par l'intermédiaire d'une résistance R25. Le transistor T14 joue le rôle d'un convertisseur tension-courant pour permettre la commande en courant des transistors bipolaires T3 des charges Q. Les transistors T3 des charges Q sont montés en miroir sur le transistor T14.The drain of transistor MP15 no longer directly constitutes the output terminal S of the regulator, but is connected to the collector of a NPN T14 bipolar transistor of which the transmitter is connected to ground via a resistance R25. The transistor T14 plays the role of a converter voltage-current to allow current control of bipolar transistors T3 of the loads Q. The transistors T3 of the charges Q are mirrored on transistor T14.

    L'adjonction du transistor T14 est liée au fait que les sources de courant étant réalisées en technologie bipolaire, elles sont commandées en courant alors que dans le cas de source.en technologie MOS elles sont commandées en tension.The addition of transistor T14 is linked to the fact that the current sources being produced in bipolar technology, they are controlled by current while in the case from source. in MOS technology they are voltage controlled.

    Pour compenser les courants de base du transistor T14 et du ou des transistors T3, un transistor bipolaire T15 de type NPN est relié par sa base au drain du transistor MP15 tandis que son collecteur est relié à la tension d'alimentation Vcc et que son émetteur est relié à la base du transistor T14. Ce transistor T15 permet de fournir un courant suffisant pour commander un grand nombre de sources 1 au moyen d'un même régulateur.To compensate for the base currents of transistor T14 and of the transistor (s) T3, a bipolar transistor T15 of NPN type is connected by its base to the drain of the MP15 transistor while that its collector is connected to the supply voltage Vcc and that its emitter is connected to the base of transistor T14. This transistor T15 makes it possible to supply sufficient current for control a large number of sources 1 using the same regulator.

    L'interrupteur 18 est ici placé en parallèle sur la résistance R21. L'interrupteur 18 agit désormais sur les bases des transistors T11 et T12.The switch 18 is here placed in parallel on the resistance R21. Switch 18 now acts on the bases transistors T11 and T12.

    La tension Vcs du régulateur est ici égale à R25*I + Vbe14, où Vbe14 représente la tension base-émetteur du transistor T14 et où I représente le courant miroité sur la source 14.The voltage Vcs of the regulator is here equal to R25 * I + Vbe 14 , where Vbe 14 represents the base-emitter voltage of the transistor T14 and where I represents the current mirrored on the source 14.

    Tous les autres constituants sont identiques à ceux du schéma de la figure 2. All other components are identical to those of the diagram in Figure 2.

    La tension d'alimentation minimale de fonctionnement d'un tel régulateur est d'environ 2,5 volts correspondant à la tension seuil du transistor MP15 et à deux tensions base-émetteur (celles des transistors T14 et T15). La valeur maximale du courant pouvant être délivré pour commander des transistors T3 de sources 1 est d'environ 1 mA, ce qui correspond à une capacité de commande d'environ quatre cents sources 1.Minimum operating supply voltage of such a regulator is about 2.5 volts corresponding to the threshold voltage of transistor MP15 and two base-emitter voltages (those of transistors T14 and T15). The maximum value current that can be delivered to drive transistors T3 from sources 1 is around 1 mA, which corresponds to a control capacity of around four hundred sources 1.

    A titre d'exemple de réalisation, un régulateur tel que représenté à la figure 3 réalisé avec les valeurs de résistances et les rapports W/L suivants pour les transistors MOS permet d'obtenir une plage de fonctionnement en tension d'alimentation de 2,5 à 7 volts et une tension Vcs de 0,4 volt. R21 = 30 kΩ ; R23 = 10,8 kΩ ; R24 = 74,1 kΩ ; R25 = 1 kΩ ; W/L(MP11, MP12) = 40/10 ; W/L(MP13) = 10/5 ; W/L(MP14) = 200/6 ; W/L(MP15) = 2050/10 ; W/L(MP16, MN13) = 100/0,7 ; W/L(MN14, MN15) = 3/1. As an exemplary embodiment, a regulator as shown in FIG. 3 produced with the following resistance values and the W / L ratios for the MOS transistors makes it possible to obtain an operating range in supply voltage of 2, 5 to 7 volts and a Vcs voltage of 0.4 volts. R21 = 30 kΩ; R23 = 10.8 kΩ; R24 = 74.1 kΩ; R25 = 1 kΩ; W / L (MP11, MP12) = 40/10; W / L (MP13) = 10/5; W / L (MP14) = 200/6; W / L (MP15) = 2050/10; W / L (MP16, MN13) = 100 / 0.7; W / L (MN14, MN15) = 3/1.

    Ainsi, l'invention permet d'utiliser une faible tension d'alimentation d'environ 3 volts que ce soit pour des sources de courant en technologie bipolaire ou MOS. La tension Vcs délivrée par le régulateur est en outre stable en cas de variation de la température et/ou de la tension d'alimentation.Thus, the invention makes it possible to use a low voltage power supply of about 3 volts whether for current sources in bipolar or MOS technology. Voltage Vcs delivered by the regulator is also stable in the event of variation of temperature and / or supply voltage.

    Bien entendu, la présente invention est susceptible de diverses variantes et modifications qui apparaítront à l'homme de l'art. En particulier, chacun des composants décrits pourra être remplacé par un ou plusieurs éléments remplissant la même fonction. De plus, le dimensionnement des différents constituants (résistances, rapport W/L des transistors MOS, rapports de surface des transistors bipolaires, etc.) est à la portée de l'homme du métier en fonction des indications fonctionnelles données dans la présente description.Of course, the present invention is susceptible various variants and modifications that will appear at one skilled in the art. In particular, each of the components described may be replaced by one or more elements filling the same function. In addition, the dimensioning of the different constituents (resistances, W / L ratio of MOS transistors, area ratios of bipolar transistors, etc.) is at the scope of the skilled person according to the functional indications given in the present description.

    Claims (10)

    1. A voltage regulator for controlling at least one current source (1, 2) of at least one coupled-mode logic gate (CML), characterized in that it includes a first current source (11), of a bipolar-type, connected between ground and a first resistor (R22) that is connected to a supply voltage (Vcc), said first source (11) being controlled by the voltage across a second resistor (R21) that is fed by a current (I) from a second current source (14) of a MOS-type, the current value (I) of said second source (14) determining the voltage of an output terminal (S) of the regulator by duplicating said current on a third current source (15) mirror-connected to the second source (14).
    2. The voltage regulator of claim 1, characterized in that said second current source (14) is constituted by a P-channel MOS transistor (MP14) having its source connected to the supply voltage (Vcc), and its gate connected to its own drain and to the gate of a P-channel MOS transistor (MP15) which constitutes the third current source (15), the drain of said MOS transistor (MP15) of the third current source constituting the output terminal (S) of the regulator.
    3. The voltage regulator of claim 2, characterized in that it includes a first voltage source (12) of the bipolar-type and connected in series to a second voltage source (13) of a reverse polarity for transferring the voltage across the first current source (11) to the terminals of the second resistor (R21).
    4. The voltage regulator of claim 2 or 3, characterized in that it further includes switches (16, 17, 18) for preventing the regulator from consuming energy when it is not used.
    5. The voltage regulator of claim 3 or 4, characterized in that said first current source (11) is constituted by two mirror-connected NPN bipolar transistors, the emitter of a first transistor (T11) being connected to ground through two resistors (R23, R24) connected in series, and the emitter of a second transistor (T12) being connected to the junction between said two resistors (R23, R24), the bases of the two transistors (T11, T12) constituting a control terminal of the current source (11), while the collector of the second transistor (T12) constitutes a current source output terminal connected to the first voltage source (12).
    6. The voltage regulator of claim 5, characterized in that said first voltage source (12) is constituted by a PNP bipolar transistor (T13) having its collector connected to ground, its base connected to the second transistor (T12) of the first current source (11), and its emitter connected to the gate of an N-channel MOS transistor (MN13) which constitutes the second voltage source (13), the source of said MOS transistor (MN13) of the second voltage source (13) being connected to ground, and its drain being connected to the drain of the MOS transistor (MP14) of the second current source (14).
    7. The voltage regulator of claim 6, characterized in that it further comprises three P-channel MOS transistors (MP11, MP12, MP13) having their sources connected to the supply voltage (Vcc) through a first switch (16), their gates connected to a start aid device, and their drains respectively connected to the collectors of the transistors (T11, T12) of the first current source (11) and to the emitter of the transistor (T13) which constitutes the first voltage source (12).
    8. The voltage regulator of any of claims 1 to 7, characterized in that a current source (2) of a logic gate is constituted by an N-channel MOS transistor (MN3) whose gate and drain are interconnected, the drain of said transistor (MN3) being connected to the output terminal (S) of the regulator and its source being connected to ground.
    9. The voltage regulator of any of claims 1 to 7, characterized in that it comprises a voltage-to-current converter connected between the regulator output terminal (S) and ground, said converter being constituted by an NPN bipolar transistor (T14) having its emitter connected to ground through a resistor (R25) and its collector connected to said output terminal (S); and wherein a current source (1) of a logic gate is constituted by an NPN bipolar transistor (T3) having its emitter connected to ground through a resistor (R3), the bipolar transistor being mirror-connected to the transistor (T14) of said current-to-voltage converter.
    10. The voltage regulator of claim 9, characterized in that it further comprises an NPN bipolar transistor (T15) for compensating for the base currents of the current source (1) of the logic gate, the base of said compensation transistor (T15) being connected to the output terminal (S) of the regulator, its collector being connected to the supply voltage (Vcc), and its emitter being connected to the base of the transistor (T14) of said current-to-voltage converter.
    EP95410136A 1994-11-30 1995-11-27 Voltage regulator for logical circuit in coupled mode Expired - Lifetime EP0715240B1 (en)

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    FR9414604A FR2727534A1 (en) 1994-11-30 1994-11-30 VOLTAGE REGULATOR FOR LOGIC CIRCUIT IN TORQUE MODE
    FR9414604 1994-11-30

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    EP0715240B1 true EP0715240B1 (en) 2000-06-07

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    IT1244341B (en) * 1990-12-21 1994-07-08 Sgs Thomson Microelectronics REFERENCE VOLTAGE GENERATOR WITH PROGRAMMABLE THERMAL Drift

    Also Published As

    Publication number Publication date
    FR2727534A1 (en) 1996-05-31
    JP2920246B2 (en) 1999-07-19
    EP0715240A1 (en) 1996-06-05
    US5646517A (en) 1997-07-08
    DE69517395D1 (en) 2000-07-13
    JPH08237098A (en) 1996-09-13
    FR2727534B1 (en) 1997-02-14
    DE69517395T2 (en) 2001-01-18

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