EP0698874B1 - Verfahren zum Reduzieren zeitlicher Artefakte in digitalen Videosystemen - Google Patents

Verfahren zum Reduzieren zeitlicher Artefakte in digitalen Videosystemen Download PDF

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Publication number
EP0698874B1
EP0698874B1 EP95111242A EP95111242A EP0698874B1 EP 0698874 B1 EP0698874 B1 EP 0698874B1 EP 95111242 A EP95111242 A EP 95111242A EP 95111242 A EP95111242 A EP 95111242A EP 0698874 B1 EP0698874 B1 EP 0698874B1
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Prior art keywords
bit
time
bits
data
frame
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Expired - Lifetime
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EP95111242A
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French (fr)
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EP0698874A1 (de
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Donald B. Doherty
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Texas Instruments Inc
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Texas Instruments Inc
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • G09G3/2033—Display of intermediate tones by time modulation using two or more time intervals using sub-frames with splitting one or more sub-frames corresponding to the most significant bits into two or more sub-frames
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0266—Reduction of sub-frame artefacts
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0428—Gradation resolution change
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • G09G3/2029—Display of intermediate tones by time modulation using two or more time intervals using sub-frames the sub-frames having non-binary weights
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • G09G3/2037—Display of intermediate tones by time modulation using two or more time intervals using sub-frames with specific control of sub-frames corresponding to the least significant bits

Definitions

  • This invention relates to display systems using spatial light modulators, more particularly to the data handling for such systems.
  • Spatial light modulators have many different forms. A common for has an array of individually addressable elements, each of which represent a picture element in an image being displayed. Two examples of spatial light modulators are the liquid crystal display devices (LCD) and the digital micromirror device (DMD, also known as the deformable mirror device).
  • LCD liquid crystal display devices
  • DMD digital micromirror device
  • the liquid crystal device typically functions as a transmissive modulator.
  • the optical system is positioned such that the light passes through the LCD.
  • the individual elements are activated and deactivated to block or transmit the light to the screen. They can also control the color.
  • the DMD is a reflective modulator, with the optical system positioned to allow the individual elements to either reflect light to the screen or away from it.
  • the individual elements typically receive a signal that causes the mirror to deflect in one direction or another. When it deflects in one direction, the light is reflected to the screen, when it deflects in the other direction, light is moved away from the screen.
  • a display device which achieves increased temporal balance of the light from each mirror device during each frame period of the display system and/or between consecutive frame periods is known from WO-A-94/09473.
  • Each field period of the display system is divided into sufficient time intervals to allow grouping of the time intervals in which each mirror device is switched to either the on state or the off state. However, bit transitions are not eliminated thereby.
  • EP-A-0 686 954 which consists of prior art within the meaning of Art.
  • 54(3) EPC discloses a method of implementing pulse-width modulated image display systems with a spatial light modulator configured for split-reset addressing.
  • the frame period is divided into a number of time slices, wherein the total number of time slices and the allocation of time slices among pixel data is determined by the number of times that pixel data is delivered to the spatial light modulator rather than by binary patterns. This document does not deal with elimination of visual artifacts.
  • CA-A-2 113 213 discloses pixel control circuitry for a spatial light modulator, wherein sets of pixel elements share a memory cell, such that each memory cell has the same fanout as other memory cells. Each pixel element in a set is switched to an on or off state via a reset line that is separate from that of the other pixel elements in that set. Frame data is loaded in split bit-frames during a set time period, such that each split bit-frame contains only the data for pixel elements on one reset line.
  • the same memory cell can be used to deliver data to all pixel elements in its fanout because only one pixel element in the fanout is switched at a time.
  • non-binary weighting system it is possible to use a non-binary weighting system to eliminate the visual artifacts at a bit transition.
  • the bits are weighted in a non-binary fashion according to the system requirements.
  • This weighting is programmed into a logic circuit. When the incoming data, most likely a digitization of a video signal, or possibly a digital video signal, passes through the circuit, it is converted to the new non-binary weighting. This new weighting is then used in displaying the data. Because the new weighting does not have extensive bit transitions, it eliminates or significantly reduces the visual artifacts caused by these transitions.
  • Figure 1 shows a schematic example of a circuit to translate from binary to non-binary bit weights.
  • Figure 2 shows a graphical example of 5 binary bits translated to 8 non-binary weighted bits.
  • Figure 3 shows a standard 8 binary bits frame time and its resulting pattern.
  • Figure 4 shows a graphical example of 6 binary bits translated to 8 non-binary weighted bits.
  • Figure 5 shows a graphical example of 8 binary bits translated into 12 non-binary weighted bits.
  • Figure 6 shows another graphical example of 8 binary bits translated into 12 non-binary bits.
  • spatial light modulators include arrays of separate elements, each individually addressable. They can operate in either digital or analog fashion.
  • the digital modulators are becoming very popular for display systems.
  • These individually addressable elements typically consist of an active area, either reflective or transmissive (sometime referred to as pixels), and some type of activation circuitry.
  • the activate circuitry causes the active area to become active. For example in liquid crystal displays (LCD), electrodes on one side of a piece of glass cause the crystalline material to activate and block or not block the light received on that element.
  • LCD liquid crystal displays
  • the addressing for these elements is complex and suffers from several time constraints.
  • the first constraint is the minimum time necessary to load the data. For spatial light modulators consisting of arrays of individual elements, this can result in several different embodiments. Loading the entire array takes a certain period of time, which usually becomes the amount of time the least significant bit (LSB) is displayed. This minimum number depends upon the number of bits for the system.
  • LSB least significant bit
  • the second constraint is the maximum time available for the display of a video frame of data.
  • the frame time is typically one frame in 1/60th of a second, or 16.67 milliseconds (msecs). This assumes a mono-color system.
  • Color systems are done several ways using spatial light modulators. One way is to use a white light source with some sort of filter, such as a color wheel, and allowing only 1/3 of the 16.67 msecs for each color.
  • Additional ways include using either a white light source and three separate filters, with one modulator per filter, actually coloring the individual elements red, green or blue, or using three separate light sources.
  • each modulator receives the total frame time for display. To adapt it to a one source/three color system, the patterns would merely need to be triplicated and the timing adjusted.
  • the LSB must have 1/255 of the total frame time, which is typically 16.67 msecs.
  • the data for the entire array must then be loaded during [16.67 msecs/255], or 65.4 microseconds (10 -6 ).
  • the data rate to support this is prohibitively high, or the number of input lines would be prohibitively high.
  • a subarray of the elements are reset as a block.
  • the data for the LSB is displayed for the LSB time, then the subarray displaying that data is reset and "blacked out" for another LSB time. This allows the load time to be extended and decreases the burst data rate.
  • the split reset architecture has numerous individual elements, or pixels, assigned to one memory cell. This way, not as many memory cells must receive data.
  • the array is again divided into subarrays, although now by the reset circuitry.
  • a typical array may have 16 reset groups, or subarrays.
  • a circuit 10 for translating the binary resolution bits into non-binary weighting is shown if Figure 1. This circuit can be used for any type of array addressing, be it split reset, block reset or straight addressing as discussed above.
  • the color video data stream 12 goes through a degamma process. Since cathode ray tubes have a non-linear response curve, a gamma correction signal is added at the broadcasters. Since spatial light modulators have a linear response, this signal must be removed, and is done so with a degamma circuit 14. If the incoming signal is a digital video stream with an assumed linear response, the degamma will not be necessary.
  • the data stream 16 from the degamma circuity may be of a higher resolution than the spatial light modulator's pulse-width modulation scheme. Therefore it needs to be adjusted down, and is done so by the intensity diffusion filter 18.
  • the adjusted data stream 20 then has the correct resolution for the spatial light modulator, but is probably in rasterized format. Rasterized format typically has the data in lines, which is difficult for most spatial light modulators to use.
  • the arrays of a spatial light modulator normally receive data along column address drivers, so the data needs to be reformatted to achieve this.
  • the bit translation logic 22 accomplishes this by arranging the data for the columns and by storing it in bit planes. Each bit plane has only that data for a given significance level. For example, bit plane 0 has data for every pixel, but only the MSB for every pixel, it is followed by bit plane 1, etc. Also the bit translation logic will convert the binary bits into the appropriate translated bits and place those into bit planes. This logic could be contained in a look-up table, a processor or many other types of circuitry.
  • the bit plane data 24 is then passed to the frame-store 26, typically some kind of random access memory (RAM).
  • the frame storage stores all of the bit planes for a given frame of video data. Often, there are two frame stores, one is emptied out and the data is sent to the array circuitry while the other is being filled.
  • the sequence control processor 32 governs the sequence of the bit planes and their timing. In the case of split reset, it will also control the synchronization for the various reset groups and their data.
  • bit plane data 28 is passed to the spatial light modulator arrays 30.
  • the sequence control processor will also control the bit planes by color.
  • Another possibility is three modulators, each with a colored light source. Regardless, using the present invention, the data arriving at the activation circuitry for the array will be translated, non-binary data.
  • the system requirements drive what type of translation is done.
  • the pixel intensity resolution is reduced so that the non-binary bits can be stored, with no increase in memory.
  • a second embodiment retains the same intensity resolution, but uses more memory.
  • One advantage of both of these approaches is that they eliminate the visual artifacts resulting from binary bit transitions.
  • Figure 2 shows a graphical example of how a 5 bit binary system can be translated into an 8 bit non-binary system.
  • the example shown assumes that the array of pixels is divided into 16 reset groups.
  • the slices shown for bit 3 are each 16 time periods. Since there are two time periods on either side of the center region, bit 3 now has a bit weight of 32.
  • each bit will not have a distinct bit weight.
  • bits 3, 4, 5, and 6 all have the same bit weight of 32.
  • Bit 7 has two 16 period time slices and two 20 (a 16 period plus 4 extra periods) period time slices for a total weight of 72. Obviously, this could not be a binary weighting system, since 72 is not an exponential of 2.
  • bits are somewhat more difficult to define. Since they have time periods less than the amount of time it takes to load the array, they must be set using either split reset or block reset.
  • the point 40 is the mid-point both the frame period and the vertical extent of the array.
  • Bit 0 must be loaded onto two different subarrays at different times. If it were loaded on two different subarrays at the same time, the minimum value achievable for bit 0 would be 16. Since it is loaded on half the array, it can be loaded with a minimum time of 8. It is loaded symmetrically about the center of the time period and the array.
  • Bit 1 and bit 2 must be used to even out the asymmetry caused by bit 1.
  • Bit 1 has a weight of 16, and is divided into two pieces to fill the frame.
  • Bit 2 has a weight of 24, since to even out the asymmetry it must have a length equal to bit 0 + bit 1, or 16 + 8.
  • the total time of the bit displaying process must fill out the frame time, which here has been assumed to be 16.67 msecs.
  • This non-binary example uses 8 memory bits to represent gray levels 0-31 where a binary code uses only 5.
  • the extra bits are used to produce a bit code that minimizes changes in light patterns at gray level transitions (bit transitions). For instance, bits 3, 4, 5 and 6 are all 32 time periods long and could be used interchangeably, but, by using bit 3 for all levels above 6 and using bit 4 for all levels above 10, etc., the light pattern expands is a substantially smoother fashion as gray levels increase.
  • the resulting graph at the bottom of Figure 2 shows the gray levels over the time of the frame period.
  • the graph of Figure 3 which shows the standard 8-bit binary pattern, one can see the difference made by the non-binary approach.
  • the graph in Figure 3 is for an 8-bit split reset pattern in which bits 0-4 have been compacted much as bits 0-2 were in the graph of Figure 2.
  • Figure 4 shows another example of a bit translation.
  • 6 binary bits are translated into 8 non-binary bits and 64 gray levels are achieved.
  • the bit weights, order, and coding are chose to minimize light pattern changes for gray level (bit) transitions).
  • FIG. 5 Another way to adjust the bit patterns in a non-binary fashion to eliminate visual artifacts is shown in Figures 5 and 6. In these embodiments, more bits are used to translate fewer bits, 12 bits being used to translate 8 bits. This alternative allows for the same resolution, but adds more memory, since 4 additional bit planes must be stored.
  • Figure 5 shows a the above approach where the bits are arranged around the mid-point of the frame in a substantially symmetrical fashion.
  • the bit weights are the same as the binary example of Figure 3 for bits 0-4 while bits 5-11 are all weighted 32. This yields a sum of 255 which is required for 8 bits.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Mechanical Light Control Or Optical Switches (AREA)

Claims (4)

  1. Verfahren zum Anzeigen digitaler Videodaten auf einer Anzeige, die eine Matrix aus Pixel enthält, die in mehreren Rücksetzgruppen angeordnet sind,
    wobei jede Rücksetzgruppe die gleiche Anzahl von Pixel besitzt, wobei jedes Pixel einer Rücksetzgruppe eine entsprechende Pixel-Dateneinheit derselben Bitebene gleichzeitig anzeigt, wobei das Verfahren umfaßt:
    a. Festlegen der Zeit, die für ein Bild der Daten verfügbar ist;
    b. Anordnen der Bits der Daten in binär gewichteten Bitebenen, so daß alle Bits mit gleichem Gewicht aus allen Datenwörtern in einer Bitebene gespeichert sind;
    c. Übersetzen der binär gewichteten Bitebenen in nicht binär gewichtete Bitebenen, so daß Graustufenübergänge mit minimalen Änderungen der Bits eines Bitmusters auftreten, wobei jede durch ein Pixel der Anzeige anzuzeigende Graustufe durch ein eindeutiges Bitmuster repräsentiert wird, wobei jedes eindeutige nicht binäre Bitmuster mehrere höherwertige Bits und mehrere niedrigerwertige Bits umfaßt,
       wobei wenigstens zwei der höherwertigen Bits das gleiche Bitgewicht besitzen, wobei jedes dieser höherwertigen Bits während zwei gleichen Zeitschlitzen und durch sämtliche Rück setzgruppen während der jeweiligen Zeitschlitze angezeigt werden, wobei jeder solche Zeitschlitz eines höherwertigen Bits wenigstens diejenige Anzahl Zeitperioden umfaßt, die für die Adressierung aller Rücksetzgruppen der Anzeige erforderlich sind, und wobei jedes der niedrigerwertigen Bits jeweils unterschiedliches Bitgewicht besitzt, wobei jedes niedrigerwertige Bit durch verschiedene Rücksetzgruppen zu unterschiedlichen Zeiten während einer Bildzeit angezeigt wird, wobei entsprechende Zeitschlitze eines niedrigerwertigen Bits eine Anzahl Zeitperioden umfassen, die entweder höher oder niedriger als jene ist, die erforderlich ist, um alle Rücksetzgruppen der Anzeige zu adressieren, und
       wobei bei einer Pegeländerung der Graustufenintensität eines Pixel der Anzeige zwischen irgendeiner Graustufe und einer weiteren Graustufe direkt über oder unter dieser Graustufe der Zustand wenigstens eines höherwertigen Bits jedes Bitmusters der beiden von der Intensitätsänderung betroffenen Graustufen unverändert bleibt, und
    d. Senden der nicht binären Bitebenen zu der Aktivierungsschaltungsanordnung eines räumlichen Lichtmodulators (30), so daß Daten für irgendeine gegebene nicht binäre Bitebene durch Pixelgruppen der Anzeige für eine Zeitperiode angezeigt werden, die zu dem Gewicht der Bitebene proportional ist.
  2. Verfahren nach Anspruch 1, bei dem sich Zeitperioden ausgehend von wenigstens einem vorgegebenen Punkt innerhalb der für jedes Bild verfügbaren Zeit symmetrisch erstrecken.
  3. Verfahren nach Anspruch 2, bei dem der wenigstens eine vorgegebene Punkt der Mittelpunkt der Bildzeit ist
  4. Verfahren nach Anspruch 2, bei dem der wenigstens eine vorgegebene Punkt beide Viertelbildzeiten beiderseits des Bildmittelpunkts umfaßt
EP95111242A 1994-07-25 1995-07-18 Verfahren zum Reduzieren zeitlicher Artefakte in digitalen Videosystemen Expired - Lifetime EP0698874B1 (de)

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US28003294A 1994-07-25 1994-07-25
US280032 1999-03-26

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EP (1) EP0698874B1 (de)
JP (2) JPH0863122A (de)
KR (1) KR100346877B1 (de)
DE (1) DE69524502T2 (de)
TW (1) TW291632B (de)

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EP0698874A1 (de) 1996-02-28
JPH0863122A (ja) 1996-03-08
JP4185129B2 (ja) 2008-11-26
DE69524502D1 (de) 2002-01-24
KR100346877B1 (ko) 2004-05-22
TW291632B (de) 1996-11-21
DE69524502T2 (de) 2002-06-06
JP2007052444A (ja) 2007-03-01

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