EP0698840B1 - Circuit limiteur de tension - Google Patents

Circuit limiteur de tension Download PDF

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Publication number
EP0698840B1
EP0698840B1 EP95112175A EP95112175A EP0698840B1 EP 0698840 B1 EP0698840 B1 EP 0698840B1 EP 95112175 A EP95112175 A EP 95112175A EP 95112175 A EP95112175 A EP 95112175A EP 0698840 B1 EP0698840 B1 EP 0698840B1
Authority
EP
European Patent Office
Prior art keywords
voltage
terminal
transistor
whose
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP95112175A
Other languages
German (de)
English (en)
Other versions
EP0698840A2 (fr
EP0698840A3 (fr
Inventor
Heinz Dipl.-Ing. Zitta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0698840A2 publication Critical patent/EP0698840A2/fr
Publication of EP0698840A3 publication Critical patent/EP0698840A3/fr
Application granted granted Critical
Publication of EP0698840B1 publication Critical patent/EP0698840B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

Definitions

  • the invention relates to a device with an input terminal and a reference potential terminal and a circuit arrangement to limit the voltage between the Input terminal and the reference potential terminal can be applied Tension.
  • B. is a 5V regulator with a tolerance of 5% e.g. to aim for a response voltage of approx. 6V.
  • Such a circuit arrangement for voltage limitation one between an input terminal and a reference potential terminal applied voltage is from US-A-5,027,181 known.
  • a circuit arrangement for Protection of electronic circuits against overvoltage Power supply known as surge protection has voltage-limiting means.
  • the voltage limiting Means are integrable in this document by at least one Zener diode formed.
  • Zener diode there is an integrated Zener diode in the manufacturing process with exactly the desired breakdown voltage
  • An external one, for example Zener diode can be provided.
  • the circuit according to the invention is in practical use with equate to a Zener diode so that they have existing Zener diode protection structures can replace directly.
  • 1 is one Designated input terminal, which has a resistance divider 2, 3 is connected to ground 4.
  • the center tap of the resistance divider 2, 3 is based on an NPN transistor 5 interconnected. Its emitter is via a further resistance divider 7, 8 also connected to ground.
  • the collector is connected to the via a FET 6 connected as a diode Input terminal 1 connected so that the collector with source and gate connection and the drain connection of the FET 6 with the Input terminal 1 is connected.
  • a second MOS transistor 10 is provided, the gate of which is connected to the gate of the MOS transistor 6 and its drain connection also with the input terminal 1 is connected.
  • the source terminal of the MOS transistor 10 is connected to the collector of a further npn transistor 9, the base of which is connected to the base of transistor 5 and its emitter with the node further Voltage divider 7, 8 is connected.
  • the collector of the Transistor 9 is also based on a MOS transistor 11 interconnected, the source connection on the one hand the gate terminal of a further MOS transistor 12 and over a resistor 13 connected to the reference potential 4 is.
  • the drain of the MOS transistor 11 is connected to the Input terminal 1 connected.
  • the drain of the MOS transistor 12 is with the input terminal 1 and the source connection of the MOS transistor 12 with the reference potential 4 interconnected.
  • Block A forms the voltage divider
  • block B the comparator
  • block C the output stage the protection circuit.
  • the voltage divider A consisting from the resistors 2, 3, is now dimensioned so that at the desired response voltage VZ, which is between the Input terminal 1 and the reference potential 4 is applied Voltage VR at the base of transistor 5 e.g. the value 1.2V assumes.
  • Comparator B uses the reference voltage principle known from bandgap reference circuits to define the switching threshold. It is known here that one can generate a temperature-stable voltage by adding two voltages with opposite temperature coefficients.
  • the U BE voltage of a bipolar transistor has a negative temperature coefficient.
  • a voltage with a counter-positive temperature coefficient can be generated by forming the difference between the base-emitter voltage of two transistors that are operated with different currents.
  • a current mirror 6, 10 is provided for generating the different currents.
  • the basic principle for such a bandgap reference circuit is known from Tietze / Schenk, semiconductor circuit technology, 8th edition, page 534ff.
  • An application circuit for generating a constant voltage that is as independent of interference as possible is described in Patent Abstracts of Japan, Sect. P, Volume 17 (1993), No. 588 (P-1634), JP 5-173657.
  • the output stage C amplifies the output signal of the comparator B and feeds it to the switching transistor 12, which becomes conductive and thereby limits a further rise in the voltage VZ.
  • the function ultimately corresponds to that of a Zener diode, the internal resistance being dimensioned as required by the on-resistance R on of the DMOS transistor 12.
  • Figure 3 shows the resulting characteristic of the circuit. If the applied voltage is less than V th , no cross current I Z flows , but with increasing voltage VZ the current rises quickly, and this provides a good protective function in the same way that only a Zener diode would otherwise allow.
  • the switching threshold By coupling the switching threshold to the bandgap voltage, which is done by means of scaling by the voltage divider 2, 3, this is very temperature-stable and largely unaffected by manufacturing tolerances.
  • the flatter rise in the characteristic curve in the region of higher currents is caused by the finite on- resistance R dson of the DMOS transistor 12.
  • the transistor size is to be designed according to the maximum currents to be expected.
  • the circuit according to the invention thus allows the installation of a Surge protection in an integrated circuit also in those cases where no suitable zener diode in technology of the integrated voltage regulator is available.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)

Claims (2)

  1. Dispositif comprenant une borne d'entrée (1) et une borne de potentiel de référence (4) ainsi qu'un circuit limiteur de tension pour une tension applicable entre la borne d'entrée (1) et la borne de potentiel de référence (4), caractérisé en ce que le circuit limiteur de tension comprend un diviseur ohmique (2, 3) branché entre la borne d'entrée (1) et la borne de potentiel de référence (4) et dont le signal de sortie est amené à un comparateur (B) dont le seuil de commutation est déterminé par un circuit de référence du type bandgap, avec un transistor MOS (12) dont le chemin de charge est branché entre la borne d'entrée (1) et la borne de potentiel de référence (4), la borne de drain étant reliée à la borne d'entrée (1) et la borne de source étant reliée à la borne de potentiel de référence, et qui est commandé par le signal de sortie du comparateur.
  2. Circuit selon la revendication 1, caractérisé en ce que le comparateur (B) contient un premier transistor bipolaire (5) dont la borne de base est alimentée avec la tension de référence et dont l'émetteur est reliée à la borne de potentiel de référence (4) par le bais d'un diviseur de tension (7, 8), contient un second transistor bipolaire (9) dont l'émetteur est relié à la prise médiane du diviseur de tension (7, 8) et dont la base est connectée à la base du premier transistor (5), un miroir de courant (6, 10) dont le circuit d'entrée est relié au collecteur du premier transistor (5) et dont le circuit de sortie est relié au collecteur du second transistor (9), et en ce que la tension de sortie (VK) peut être lue au niveau de la borne collectrice du second transistor (9).
EP95112175A 1994-08-22 1995-08-02 Circuit limiteur de tension Expired - Lifetime EP0698840B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE4429715 1994-08-22
DE4429715A DE4429715C1 (de) 1994-08-22 1994-08-22 Schaltungsanordnung zur Spannungsbegrenzung

Publications (3)

Publication Number Publication Date
EP0698840A2 EP0698840A2 (fr) 1996-02-28
EP0698840A3 EP0698840A3 (fr) 1996-10-16
EP0698840B1 true EP0698840B1 (fr) 1998-11-04

Family

ID=6526257

Family Applications (1)

Application Number Title Priority Date Filing Date
EP95112175A Expired - Lifetime EP0698840B1 (fr) 1994-08-22 1995-08-02 Circuit limiteur de tension

Country Status (2)

Country Link
EP (1) EP0698840B1 (fr)
DE (2) DE4429715C1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6031701A (en) * 1997-03-12 2000-02-29 Daimler-Chrysler Ag Device and method for overvoltage protection
DE19710073A1 (de) * 1997-03-12 1998-10-01 Daimler Benz Ag Intellectual P Vorrichtung und Verfahren zum Überspannungsschutz
US6271715B1 (en) 1998-02-27 2001-08-07 Maxim Integrated Products, Inc. Boosting circuit with supply-dependent gain
WO2003052898A1 (fr) * 2001-12-14 2003-06-26 Stmicroelectronics Asia Pacific Pte Ltd Circuit de calage de tension transitoire

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1201848B (it) * 1986-10-02 1989-02-02 Sgs Microelettronica Spa Circuito di interfaccia logica ad alta stabilita' e bassa corrente di riposo
JPH05173657A (ja) 1991-02-27 1993-07-13 Matsushita Electric Ind Co Ltd 定電圧回路
US5144223A (en) * 1991-03-12 1992-09-01 Mosaid, Inc. Bandgap voltage generator
JPH06104672A (ja) * 1992-09-22 1994-04-15 Mitsubishi Electric Corp クランプ回路

Also Published As

Publication number Publication date
EP0698840A2 (fr) 1996-02-28
DE4429715C1 (de) 1996-05-02
DE59504118D1 (de) 1998-12-10
EP0698840A3 (fr) 1996-10-16

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