EP0697710B1 - Manufacturing method for a micropoint-electron source - Google Patents

Description

The present invention relates to a method for manufacturing a microtip electron source ("microtips").

It applies in particular to manufacturing flat display devices.

When a potential difference is applied between two electrodes, one of which is pointed, the electric field thus generated can easily reach, at the end of this pointed electrode, a value of the order of 10 ⁷ V / cm, value sufficient for electrons to be extracted from this electrode.

Such a principle is used to realize cold sources of electrons, capable of replacing the electron-emitting heating filaments, because that such cold springs have a more response fast, lower power consumption and are susceptible to greater miniaturization than these heating filaments.

One of the most important applications of these cold sources of electrons, also called "microtip sources" is the manufacture of tubes television dishes.

We recall the principle of these flat tubes, or flat screens, with reference to Figures 1 and 2.

Figure 1 is a sectional view schematic and partial of such a flat screen and the Figure 2 is a schematic perspective view and partial view of this flat screen.

The flat screen in Figures 1 and 2 includes a source of microtip electrons 2 and a substrate glass 4 which is separated from the source 2 by a space thin in which a vacuum has been created.

The substrate 4 carries, facing the source 2, a transparent, electrically conductive layer 6, for example in indium tin oxide, this layer 6 itself carrying elements cathodoluminescent 8, also called "luminophores".

The microtip source 2 includes, on an electrically insulating substrate 10, for example in glass, a set of cathode conductors parallels 12 which constitute the columns of the screen.

These cathode conductors are covered by a layer 14 of an electrically insulating material such as silica.

A set of other drivers parallel electric 15 is placed above the insulating layer 14 and these other conductors 15, or grids, are perpendicular to the conductors cathodic 12 to form the lines of the screen.

At the intersections between the cathode conductors and grids, holes 18, 19 are formed through the insulating layer 14 and these grids 15 and microtips 20 made of a material electron emitter are formed in these holes and are based on the cathode conductors 12.

The phosphors 8 are formed on the transparent conductive layer 6, opposite these intersections, as seen in Figure 2.

Electrons are extracted by application appropriate electrical voltages between the grids and the microtips then these electrons are accelerated thanks to appropriate electrical voltages applied between the grids and the conductive layer 6 constituting the anode of the screen.

Each phosphor 8 excited by electrons 22 emits light 24.

An appropriate voltage sweep on the rows and columns of the screen helps to form a picture.

Only microtips located at the intersection of a row and a fed column in tension emit electrons to form a picture element or pixel.

Each pixel is actually "excited" by several hundred microtips whose dimensions are of the order of 1 µm, generally 1.5 µm, and which are spaced from each other by a distance of the order of a few micrometers, typically 5 µm.

These small dimensions are essential for, on the one hand, not having to use excessively high voltages between the grids and the microtips (voltages of the order of 50 V) and, on the other hand, for having an emission of sufficiently high current per unit area (approximately 1 mA / mm ² ).

A flat screen typically uses around 10,000 microtips per square millimeter over areas of several square decimetres.

The flat screens currently manufactured have surfaces of the order of 5 dm ² and it is envisaged to manufacture flat screens whose surfaces would go up to approximately 1 m ² .

However, it is not easy to obtain microtip sources with such large surfaces with known methods of manufacturing microtips.

The most used process for manufacturing these microtips is the so-called Spindt process (from the name from its inventor).

We will consult on this subject for example the following document:

(1) C.A. Spindt, J. Appl. Phys., Vol.39, p.3504, 1968.

We see in Figure 3, which illustrates schematically this process, a structure comprising the insulating substrate 10 on which the cathode conductors 12, and the insulating layer 14 which is formed on these cathode conductors and which carries a grid layer 16 electrically conductive.

The grids themselves are obtained from this grid layer 16, after having formed the microtips as we will see.

After etching by chemical attack the holes 18 and 19 respectively in the insulating layer 14 and in the grid layer 16, a nickel layer 16a is deposited on the grid layer 16 by vacuum evaporation and grazing incidence.

The microtips 20 are obtained by evaporation of an electron emitting material 26.

A layer 28 of this material then forms on the surface of the gate layer 16a.

Therefore, the holes 19 formed in these layers 16 and 16a gradually decrease as as the thickness of layer 28 increases.

Since evaporation is very directive, the diameter of the material deposits 26 in the holes 18 of the insulating layer 14 varies as the diameter of the holes layer 16a and grid layer 16, which leads to the point shape of the deposits in the holes 18, that is to say at the microtips 20.

Then layer 28 is removed by selective dissolution of the nickel layer 16a, this which brings up these microtips.

The main advantage of this known process is that it does not require precise alignment of masks of microlithography since these are the holes in the grid layer which define themselves the microtips.

It would be almost impossible to engrave the microtips first and then the holes in the grid layer by conventional methods of microlithography, with alignment accuracy greater than a micrometer over large areas.

Another known process for manufacturing microtips is described in the following document:

(2) Oxidation-Sharpened Gated Field Emitter Array Process, N.E. McGruer et al., IEEE Transactions on Electron Devices, (38) 1991 October, n ° 10.

This other process is schematically illustrated by figure 4.

We see in this figure 4 a substrate in silicon 30.

We start by oxidizing superficially this substrate then disks 32 are formed from the layer of silica which results from this oxidation.

Reactive ion etching of the substrate silicon 30 then allows the formation of pedestals 34 made of silicon, the discs 32 serving as masks.

Then forming a layer of silica 36 on the substrate 30 by evaporation of silica 38.

A layer 40 of silica is then formed. on each disk 32.

The pedestals 34 are then oxidized thermally, which leads to the formation of microtips 42 from these pedestals.

We then form a grid layer 44 by evaporation of an electrically conductive material on the layer of silica 36.

During this evaporation, a layer 46 of this material also forms on layer 40 silica associated with each disc 32.

Then remove the silica that covers the microtips 42 as well as the disks 32 and the layers 40 and 46 corresponding.

The disadvantage of the known methods that one just described is that they require very directive evaporations.

Using the example of the Figure 3, the angle of incidence  of a beam of evaporation F varies according to the position of the holes 19 of the grid layer 16, which leads to the phenomenon illustrated in FIG. 5, that is to say at microtips with less Y axes perpendicular to the surface of the substrate 10 that the angle of incidence  is large.

This results in a variation in the shape of the microtips, variation which induces a dispersion of emission characteristics of electrons, and, at the limit, a short circuit between microtips and the grid layer.

To solve this problem, we can think of increase the distance L between the evaporation source 48 (containing material 26) and the surface of the structure on which this material 26 is evaporated, so to keep the angle  within acceptable limits.

However this leads to an increase too large the size of the equipment microtip manufacturing as well as too large decrease in deposition rate.

The object of the present invention is to remedy these drawbacks.

• on fabrique une structure comprenant un substrat électriquement isolant, au moins un conducteur cathodique sur ce substrat, une couche électriquement isolante qui recouvre chaque conducteur cathodique, une couche de grille électriquement conductrice qui recouvre cette couche électriquement isolante, des trous étant formés à travers cette couche de grille et la couche électriquement isolante, au niveau de chaque conducteur cathodique, et
• on forme, dans chaque trou, une micropointe qui est faite en un matériau métallique émetteur d'électrons et qui repose sur le conducteur cathodique correspondant à ce trou,

ce procédé étant caractérisé en ce que la formation des micropointes comprend les étapes suivantes :

• on forme une couche de protection électriquement isolante sur la couche de grille,
• on forme un dépôt chimique, de préférence électrolytique, du matériau métallique émetteur d'électrons au fond des trous jusqu'à ce que ce matériau métallique déborde de ceux-ci,
• on élimine la couche de protection, et
• on réalise une attaque électrolytique du matériau métallique déposé, de manière à obtenir les micropointes à partir de ce matériau métallique.

It relates to a process for manufacturing a microtip electron source, a process according to which:

• a structure is made up comprising an electrically insulating substrate, at least one cathode conductor on this substrate, an electrically insulating layer which covers each cathode conductor, an electrically conductive grid layer which covers this electrically insulating layer, holes being formed through this layer grid and the electrically insulating layer, at the level of each cathode conductor, and
• a microtip is formed in each hole which is made of an electron-emitting metallic material and which rests on the cathode conductor corresponding to this hole,

this process being characterized in that the formation of the microtips comprises the following stages:

• an electrically insulating protective layer is formed on the grid layer,
• a metallic deposit, preferably electrolytic, of the metallic material emitting electrons is formed at the bottom of the holes until this metallic material overflows from them,
• the protective layer is removed, and
• an electrolytic etching of the metallic material deposited is carried out, so as to obtain the microtips from this metallic material.

According to a particular mode of implementation of the process which is the subject of the invention, preferred for its simplicity of implementation, the layer of grid as a cathode for the electrolytic attack of the metallic material.

During this dissolution phase, it is advantageous to renew, by any known means, the electrolyte being located around the metallic material so as to avoid an overconcentration of ions which could slow dissolution and cause a significant redeposition of this material on the grid around microdots in formation.

Low redeposit or controlled redeposit which is spread over the entire grid is tolerated; he results in a significant reduction in the diameter of the holes, which is rather favorable to the emission of electrons by microtips.

The protective layer can be formed by depositing, under grazing incidence, a layer of electrically insulating material on the layer of wire rack.

However, this protective layer is preferably formed by anodic oxidation of the grid layer.

The grid layer can be made of a material chosen from the group comprising niobium, tantalum and aluminum.

Metallic material can be chosen in the group comprising iron, nickel, chromium, Fe-Ni, gold, silver and copper.

The protective layer can be removed by chemical attack.

This protective layer can also be removed by reactive ion etching.

• la figure 1, déjà décrite, est une vue en coupe schématique et partielle d'un écran plat,
• la figure 2, déjà décrite, est une vue schématique et partielle en perspective de cet écran plat,
• la figure 3, déjà décrite, illustre schématiquement un procédé connu de fabrication des micropointes d'une source d'électrons à micropointes,
• la figure 4, déjà décrite, illustre schématiquement un autre procédé connu de fabrication des micropointes d'une source d'électrons à micropointes,
• la figure 5, déjà décrite, illustre schématiquement des inconvénients de ces procédés connus, et
• les figures 6A à 6E illustrent schématiquement des étapes d'un mode de mise en oeuvre particulier du procédé objet de l'invention.

The present invention will be better understood on reading the description of exemplary embodiments given below, by way of purely indicative and in no way limiting, with reference to the appended drawings in which:

• FIG. 1, already described, is a schematic and partial sectional view of a flat screen,
• FIG. 2, already described, is a schematic and partial perspective view of this flat screen,
• FIG. 3, already described, schematically illustrates a known method of manufacturing the microtips of an electron source with microtips,
• FIG. 4, already described, schematically illustrates another known method for manufacturing the microtips of an electron source with microtips,
• FIG. 5, already described, schematically illustrates drawbacks of these known methods, and
• FIGS. 6A to 6E schematically illustrate steps of a particular mode of implementation of the method which is the subject of the invention.

According to this mode of implementation particular, we start by forming (Figure 6A) a structure 49 like the one shown on Figure 3 and which includes the substrate electrically insulator 10 on which the conductors are formed cathodic 12, electrically insulating layer 14 formed on these cathode conductors and the layer of grid 16 formed on this layer electrically insulating 14 (it being understood that, in other modes of specific implementation, the structure may not understand only one cathode conductor).

We also see the holes substantially circulars 18 and 19 respectively formed through the insulating layer 14 and through the grid layer 16.

The processes for obtaining such a structure are known in the state of the art.

By way of example, the substrate 10 is in glass, cathode conductors are made of a bilayer of chromium and copper, layer 14 is in silica and the gate layer 16 is made of niobium, tantalum or aluminum.

We then form a protective layer on the grid layer 16 (Figure 6B).

To do this, we can perform a evaporation of silica, under grazing incidence, on the grid layer 16, to cover it with silica.

However, preferably, a anodic oxidation of the gate layer 16, which leads to the formation of a layer 50 of oxide of niobium or tantalum oxide or aluminum oxide in the example considered, which covers the part remaining of the grid layer 16, as seen in Figure 6B.

This anodic oxidation leads to a more reliable coverage of the grid layer than evaporation under grazing incidence mentioned more high and is simpler to use.

An electrolytic deposition is then carried out metallic material at the bottom of holes 18 to that this metallic material overflows from these holes as seen in Figure 6C, part of this material then being above layer 50.

To do this, we place the structure 49, comprising the protective layer 50, in a bath electrolytic suitable 54 (containing ions of metallic material to be deposited) and we also place in this electrolytic bath a block 56 of this material metallic.

When this metallic material is iron-nickel, the electrolytic bath can be used, the composition of which is as follows: NiCl ₂ , 6H ₂ O 50 gl ^-1 NiSO ₄ , 6H ₂ O 21 gl ^-1 FeSO ₄ 2 gl ^-1 H ₃ BO ₃ 25 gl ^-1 Na saccharinate 0.8 gl ^-1

Then apply an electrical voltage appropriate, thanks to a voltage source 58, between the cathode conductors 12 and this block 56.

densité de courant : 0,5 à 2 mA/cm²

tension : 1 à 2V

température ambiante.

In the case where the metallic material is iron-nickel, the following conditions can be used for the electrolytic deposition:

current density: 0.5 to 2 mA / cm ²

voltage: 1 to 2V

ambient temperature.

For electrolysis, the conductors cathodes 12 serve as cathode and block 56 serves anode.

The electrically conductive elements 60, which result from the deposition of metallic material at the bottom holes 18 are in contact with the conductors cathodic but are electrically isolated from the grid layer 16 thanks to the protective layer 50 which covers the latter.

This protective layer is then removed 50 by chemical attack or by ion etching reactive (Figure 6D).

We then carry out an attack electrolytic of electrically conductive elements 60 so as to form the microtips 62 from these (Figure 6E).

To do this, the structure, where the protective layer 50 has been removed, is placed in an appropriate electrolytic bath 64 (containing for example 10% HCl at 37% and 90% H ₂ O for the dissolution of nickel iron) and , by means of a suitable electrical voltage source 66, an electrical voltage is established (for example 1 to 2 V for the dissolution of iron-nickel) between the cathode conductors 12 which, in this case, serve as an anode, and the grid layer 16 which serves as a cathode.

Preferably we ensure a renewal electrolyte by stirring and / or by circulation, so as to avoid an ion concentration around the element material 60.

During electrolysis, the material of elements 60 is eliminated substantially symmetrical around the Z axis of the holes 18 and the ions metals produced by the chemical attack on the material elements 60 are partly eliminated thanks to the electrolyte renewal and partly redeposited on the grid layer.

Depending on the material of elements 60 and the electrolyte renewal rate, the fraction redeposited ions is more or less important and can be checked.

• d'éléments pointus qui affleurent sensiblement à la surface de la couche de grille 16 et constituent les micropointes 62, et
• de parties 68 qui se détachent de ces micropointes et restent dans le bain électrolytique comme on le voit sur la figure 6E.

The wear of the conductive elements 60 by electrolysis leads to obtaining:

• pointed elements which are substantially flush with the surface of the grid layer 16 and constitute the microtips 62, and
• parts 68 which detach from these microtips and remain in the electrolytic bath as seen in FIG. 6E.

Preferably, this step of forming microtips is done with the glass substrate above and the electrolytic bath below, so that allow parts 68 to fall into the bath electrolytic.

Then we finish the formation of the source of microtip electrons by performing known manner, from the grid layer 16, parallel grids (not shown) making an angle with cathode conductors (but if there were that a cathode conductor, we would keep the layer of grid as is).

The interest of the process object of the present invention is to enable the manufacture of self-aligned microtips over the diaper holes grid 16, using a non-directive technique, in an isotropic liquid medium (electrolytic bath 64).

This process which is the subject of the invention is therefore independent of the surface of the structure where you want form the microtips.

Claims (9)

1. Process for the production of a microtip electron source, in which:

   a structure (49) is produced which comprises an electrically insulating substrate (10), at least one cathode conductor (12) on said substrate, an electrically insulating layer (14) covering each cathode conductor, an electrically conductive gate layer (16) covering said electrically insulating layer, holes (18, 19) being formed through said gate layer and the electrically insulating layer, at each cathode conductor and

   in each hole is formed a microtip (62), which is made from an electron emitting metallic material and which rests on the cathode conductor corresponding to said hole,

   said process being characterized in that the formation of the microtips involves the following stages:

   an electrically insulating protective layer (50) is formed on the gate layer (16),

   a chemical deposit of the electron emitting metallic material is formed at the bottom of the holes until said metallic material overflows the holes,

   the protective layer (50) is eliminated and

   electrolytic etching takes place of the deposited metallic material, so as to obtain the microtips (62) from said metallic material.
2. Process according to claim 1, characterized in that the chemical deposit of the electron emitting metallic material is an electrolytic deposit.
3. Process according to claim 1 or 2, characterized in that the gate layer (16) is used as the cathode for the electrolytic etching of the metallic material.
4. Process according to any one of the claims 1 to 3, characterized in that the protective layer (50) is formed by depositing, under grazing incidence, a layer of electrically insulating material on the gate layer (16).
5. Process according to any one of the claims 1 to 3, characterized in that the protective layer is formed by anodic oxidation of the gate layer (16).
6. Process according to any one of the claims 1 to 5, characterized in that the gate layer (16) is made from a material chosen from within the group including niobium, tantalum and aluminium.
7. Process according to any one of the claims 1 to 6, characterized in that the metallic material is chosen from within the group including iron, nickel, chromium, Fe-Ni, gold, silver and copper.
8. Process according to any one of the claims 1 to 7, characterized in that the protective layer (50) is eliminated by chemical etching.
9. Process according to any one of the claims 1 to 7, characterized in that the protective layer (50) is eliminated by reactive ionic etching.

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