EP0673050A2 - Circuit for fail-safe relay control for electronic circuitry - Google Patents
Circuit for fail-safe relay control for electronic circuitry Download PDFInfo
- Publication number
- EP0673050A2 EP0673050A2 EP95103457A EP95103457A EP0673050A2 EP 0673050 A2 EP0673050 A2 EP 0673050A2 EP 95103457 A EP95103457 A EP 95103457A EP 95103457 A EP95103457 A EP 95103457A EP 0673050 A2 EP0673050 A2 EP 0673050A2
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- EP
- European Patent Office
- Prior art keywords
- transistor
- voltage divider
- base
- transistors
- circuit
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H47/00—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
- H01H47/002—Monitoring or fail-safe circuits
Definitions
- the invention relates to a circuit for fail-safe relay control for electronic circuits.
- the invention is based on the object to provide a circuit which is very simple and by which the relay to be controlled is only activated when the control signals are in the correct level position and in the correct time window and the safe switch-on lock Relay operates when a fault in the circuit, such as an open or short circuit, occurs.
- a circuit for fail-safe relay control for electronic circuits with inputs for the control signals, one input with low potential via a first voltage divider to the base of a first transistor and the other input with high potential via a second Voltage dividers are connected to the base of a second transistor, the collectors of the two transistors being connected to a relay to be controlled and their emitters to diodes, and a third voltage divider to the base of a third transistor and a fourth voltage divider to the base of a fourth Transistors are connected and the collectors of the third and fourth transistor are connected to the corresponding base of the first and second transistor.
- An advantageous embodiment of the invention results from the fact that a capacitor is connected in parallel with a respective resistor of the third and fourth voltage divider.
- a freewheeling diode is connected between the third and fourth voltage divider and in parallel with the relay.
- E1 and E2 mean the inputs for the control signals.
- the resistors R1 and R2 form a first voltage divider, the resistors R3 and R4 a second voltage divider, the resistors R5 and R6 a third and the resistors R7 and R8 a fourth voltage divider.
- the input E1 is connected to the base of a first transistor Q1 via the first voltage divider R1, R2 and the other input E2 is connected to the base of a second transistor Q2 via the second voltage divider R3, R4.
- the collectors 2 of the two transistors Q1, Q2 are connected to the relay K1 to be controlled and the emitters 1 of the two transistors Q1, Q2 to the diodes D1, D2.
- the third voltage divider R5, R6 is connected to the base of a third transistor Q3 and a fourth voltage divider R 7, R8 to the base of a fourth transistor Q4.
- the collectors 2 of the third and fourth transistors Q3 and Q4 are connected to the corresponding bases of the first and second transistors Q1 and Q2.
- a capacitor C1 and C2 is connected in parallel with a respective resistor R6 and R8 of the third and fourth voltage divider R5, R6 and R7, R8.
- the drawing also shows that a free-wheeling diode D3 can be connected between the third and fourth voltage dividers R5, R 6 and R7, R8 and in parallel with the relay K1.
- the mode of operation and the functional principle of the circuit according to the invention are essentially as follows.
- the relay K1 In order to turn on the relay K1, it is necessary to turn on the collector-emitter path of both the transistor Q1 and the transistor Q2. To achieve this, a low potential is required at input E1, which reaches the base of transistor Q1 via voltage divider R1, R2. If the base of transistor Q1 becomes sufficiently negative with respect to the emitter potential, transistor Q1 turns on. At the same time, a high potential must reach the base of the transistor Q2 at the input E2 via the voltage divider R3, R4. If the base of transistor Q2 becomes sufficiently positive against the emitter potential, transistor Q2 also turns on. If both transistors are turned on, the relay K1 picks up. This is the normal switching process when there are no errors in the circuit.
- the fail-safe relay control is controlled with two normally inverted logic signals at inputs E1 and E2.
- input E1 is at high potential and input E2 is at low potential.
- input E1 is at low potential and input E2 is at high potential.
- both inputs must change their potential. This dynamic is monitored over the time window, which is essentially formed by the capacitors C1 and C2. If there is a state other than OFF, the output is activated or the is activated if the potential is suitably positioned As described in more detail below, the circuit assumes an error state and activates the transistor Q3 or the transistor Q4 in order to block the output transistors Q1 or Q2.
- Another source of error is as follows. If the switching of the input signals at the inputs E1 and E2 is not carried out within a defined time window tau, that is to say within a predefined time difference, then one of the transistor paths, that is to say the collector-emitter paths, is in each case implemented of the transistor Q1 or the transistor Q2 activated, whereby the switch-off process takes place again as previously explained.
- capacitor C1 is connected in parallel with resistor R6 and capacitor C2 is connected in parallel with resistor R8. This delays the activation of the switch-off process of the output transistors.
- the time delay is based on the formula:
- the diodes D1 and D2 essentially serve to raise or lower the base of the transistors Q1 and Q2 by approximately 0.6 V in order to enable the transistors Q3 and Q4 to reliably switch off the output transistors Q1 and Q2.
- the diode D3 has the function of a freewheeling diode for the relay K1 and is optionally provided.
- the circuit is in principle designed in such a way that the relay K1 only operates when the control signals via the inputs E1 and E2 are in the correct level position and in the correct time window, that is to say in the specified time difference.
- a breakdown of the base-emitter path also causes the output transistors Q1 and Q2 a safe switch-on lock of the relay K1.
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- Electronic Switches (AREA)
- Logic Circuits (AREA)
- Safety Devices In Control Systems (AREA)
- Cookers (AREA)
Abstract
Description
Die Erfindung bezieht sich auf eine Schaltung zur fehlersicheren Relaisansteuerung für elektronische Schaltungen.The invention relates to a circuit for fail-safe relay control for electronic circuits.
Um eine Fehlersicherheit zu gewährleisten, ist es bisher üblich, eine Verschaltung mit zwei zwangsgeführten Relais vorzunehmen, die ihrerseits von zwangsgeführten Relais aktiviert werden. Diese Verschaltung ist aber mit einem erheblichen Bau- und Kostenaufwand verbunden.In order to ensure error safety, it has hitherto been customary to interconnect with two positively driven relays, which in turn are activated by positively driven relays. This interconnection is associated with considerable construction and cost.
Der Erfindung liegt demgegenüber die Aufgabe zugrunde, eine Schaltung zu schaffen, die sehr einfach aufgebaut ist und durch die erreicht wird, daß das anzusteuernde Relais nur dann durchsteuert, wenn die Ansteuersignale in der richtigen Pegellage und im richtigen Zeitfenster erfolgen und die eine sichere Einschaltsperre des Relais bewirkt, wenn ein Fehler in der Schaltung, zum Beispiel eine Unterbrechung oder ein Kurzschluß, entsteht.The invention is based on the object to provide a circuit which is very simple and by which the relay to be controlled is only activated when the control signals are in the correct level position and in the correct time window and the safe switch-on lock Relay operates when a fault in the circuit, such as an open or short circuit, occurs.
Zur Lösung der gestellten Aufgabe wird eine Schaltung zur fehlersicheren Relaisansteuerung für elektronische Schaltungen vorgeschlagen, mit Eingängen für die Ansteuersignale wobei der eine Eingang mit Low-Potential über einen ersten Spannungsteiler an die Basis eines ersten Transistors und der andere Eingang mit High-Potential über einen zweiten Spannungsteiler an die Basis eines zweiten Transistors angeschlossen sind, wobei die Kollektoren der beiden Transistoren an ein anzusteuerndes Relais und deren Emitter an Dioden angeschlossen sind, und wobei ein dritter Spannungsteiler an die Basis eines dritten Transistors und ein vierter Spannungsteiler an die Basis eines vierten Transistors angeschlossen sind und die Kollektoren des dritten und vierten Transistors mit der entsprechenden Basis des ersten und zweiten Transistors verbunden sind.To solve the problem, a circuit for fail-safe relay control for electronic circuits is proposed, with inputs for the control signals, one input with low potential via a first voltage divider to the base of a first transistor and the other input with high potential via a second Voltage dividers are connected to the base of a second transistor, the collectors of the two transistors being connected to a relay to be controlled and their emitters to diodes, and a third voltage divider to the base of a third transistor and a fourth voltage divider to the base of a fourth Transistors are connected and the collectors of the third and fourth transistor are connected to the corresponding base of the first and second transistor.
Eine vorteilhafte Ausgestaltung der Erfindung ergibt sich dadurch, daß parallel zu jeweils einem Widerstand des dritten und vierten Spannungsteilers ein Kondensator geschaltet ist.An advantageous embodiment of the invention results from the fact that a capacitor is connected in parallel with a respective resistor of the third and fourth voltage divider.
In weiterer Ausgestaltung der Erfindung wird ferner vorgeschlagen, daß zwischen dem dritten und vierten Spannungsteiler und parallel zu dem Relais eine Freilaufdiode geschaltet ist.In a further embodiment of the invention it is further proposed that a freewheeling diode is connected between the third and fourth voltage divider and in parallel with the relay.
In der Zeichnung ist ein Ausführungsbeispiel der erfindungsgemäßen Schaltung dargestellt. Darin bedeuten E1 und E2 die Eingänge für die Ansteuersignale. Die Widerstände R1 und R2 bilden einen ersten Spannungsteiler, die Widerstände R3 und R4 einen zweiten Spannungsteiler, die Widerstände R5 und R6 einen dritten und die Widerstände R7 und R8 einen vierten Spannungsteiler. Wie zeichnerisch dargestellt ist, ist der Eingang E1 über den ersten Spannungsteiler R1 , R2 an die Basis eines ersten Transistors Q1 und der andere Eingang E2 über den zweiten Spannungsteiler R3, R4 an die Basis eines zweiten Transistors Q2 angeschlossen. Die Kollektoren 2 der beiden Transistoren Q1, Q2 sind an das anzusteuernde Relais K1 und die Emitter 1 der beiden Transistoren Q1, Q2 an die Dioden D1, D2 angeschlossen. Der dritte Spannungsteiler R5, R6 ist wie zeichnerisch dargestellt an die Basis eines dritten Transistors Q3 und ein vierter Spannungsteiler R 7, R8 an die Basis eines vierten Transistors Q4 angeschlossen. Die Kollektoren 2 des dritten und vierten Transistors Q3 und Q4 sind mit der entsprechenden Basis des ersten und zweiten Transistors Q1 und Q2 verbunden.In the drawing, an embodiment of the circuit according to the invention is shown. E1 and E2 mean the inputs for the control signals. The resistors R1 and R2 form a first voltage divider, the resistors R3 and R4 a second voltage divider, the resistors R5 and R6 a third and the resistors R7 and R8 a fourth voltage divider. As shown in the drawing, the input E1 is connected to the base of a first transistor Q1 via the first voltage divider R1, R2 and the other input E2 is connected to the base of a second transistor Q2 via the second voltage divider R3, R4. The
Parallel zu jeweils einem Widerstand R6 und R8 des dritten und vierten Spannungsteilers R5, R6 und R7, R8 ist ein Kondensator C1 und C2 geschaltet. Die Zeichnung zeigt ferner, daß zwischen dem dritten und vierten Spannungsteiler R5, R 6 und R7, R8 und parallel zu dem Relais K1 eine Freilaufdiode D3 geschaltet sein kann.A capacitor C1 and C2 is connected in parallel with a respective resistor R6 and R8 of the third and fourth voltage divider R5, R6 and R7, R8. The drawing also shows that a free-wheeling diode D3 can be connected between the third and fourth voltage dividers R5, R 6 and R7, R8 and in parallel with the relay K1.
Die Wirkungsweise und das Funktionsprinzip der erfindungsgemäßen Schaltung sind im wesentlichen folgende. Um das Relais K1 durchzusteuern, ist es notwendig, die Kollektor-Emitterstrecke sowohl des Transistors Q1 als auch des Transistors Q2 durchzusteuern. Um dies zu erreichen, ist ein Low-Potential am Eingang E1 notwendig, das über den Spannungsteiler R1, R2 an die Basis des Transistors Q1 gelangt. Wird die Basis des Transistors Q1 ausreichend negativ gegenüber dem Emitter-Potential, steuert der Transistor Q1 durch. Gleichzeitig muß an dem Eingang E2 ein High-Potential über den Spannungsteiler R3, R4 an die Basis des Transistors Q2 gelangen. Wird die Basis des Transistors Q2 ausreichend positiv gegen das Emitter-Potential, so steuert auch der Transistor Q2 durch. Wenn beide Transistoren durchgesteuert sind, zieht das Relais K1 an. Dies ist der normale Schaltungsvorgang, wenn sich in der Schaltung keine Fehler befinden.The mode of operation and the functional principle of the circuit according to the invention are essentially as follows. In order to turn on the relay K1, it is necessary to turn on the collector-emitter path of both the transistor Q1 and the transistor Q2. To achieve this, a low potential is required at input E1, which reaches the base of transistor Q1 via voltage divider R1, R2. If the base of transistor Q1 becomes sufficiently negative with respect to the emitter potential, transistor Q1 turns on. At the same time, a high potential must reach the base of the transistor Q2 at the input E2 via the voltage divider R3, R4. If the base of transistor Q2 becomes sufficiently positive against the emitter potential, transistor Q2 also turns on. If both transistors are turned on, the relay K1 picks up. This is the normal switching process when there are no errors in the circuit.
Die Ansteuerung der fehlersicheren Relaissteuerung erfolgt mit zwei im Normalfall inversen Logiksignalen an den Eingängen E1 und E2. Im sicheren AUS-Zustand ist der Eingang E1 auf High-Potential und der Eingang E2 auf Low-Potential. Im Aktivierungsfall oder im EIN-Zustand liegt der Eingang E1 auf Low- und der Eingang E2 auf High-Potential. Um aus dem AUS- in den EIN-Zustand wechseln zu können, müssen beide Eingänge ihr Potential wechseln. Diese Dynamik wird über das Zeitfenster, das im wesentlichen durch die Kondensatoren C1 und C2 gebildet wird, überwacht. Liegt ein anderer Zustand als AUS vor, so wird bei geeigneter Potentiallage der Ausgang aktiviert oder die Schaltung geht, wie nachfolgend noch im einzelnen beschrieben ist, von einem Fehlerzustand aus und aktiviert den Transistor Q3 bzw. den Transistor Q4, um die Ausgangstransistoren Q1 bzw. Q2 zu sperren.The fail-safe relay control is controlled with two normally inverted logic signals at inputs E1 and E2. In the safe OFF state, input E1 is at high potential and input E2 is at low potential. In the event of activation or in the ON state, input E1 is at low potential and input E2 is at high potential. In order to be able to switch from the OFF to the ON state, both inputs must change their potential. This dynamic is monitored over the time window, which is essentially formed by the capacitors C1 and C2. If there is a state other than OFF, the output is activated or the is activated if the potential is suitably positioned As described in more detail below, the circuit assumes an error state and activates the transistor Q3 or the transistor Q4 in order to block the output transistors Q1 or Q2.
Es seien nun die Fehlermöglichkeiten betrachtet. Wenn die Kollektor-Emitterstrecke des Transistors Q1 geschlossen ist, so entsteht über die Diode D1, die kurzgeschlossene Kollektor-Emitterstrecke Q1 und das Relais K1 ein hoher positiver Spannungspegel am Kollektor des Transistors Q2. Dieser gelangt über den Spannungsteiler R7, R8 an die Basis des Transistors Q4, wodurch der Transistor leitend wird und die Basis des Transistors Q2 gegen Nullpotential bringt. Damit kann der Transistor Q2 auch dann nicht mehr aktiviert werden, wenn ein entsprechend positives Eingangssignal am Eingang E 2 vorliegt. Das Relais K1 kann nicht mehr anziehen.Let us consider the possible errors. When the collector-emitter path of transistor Q1 is closed, a high positive voltage level is generated at the collector of transistor Q2 via diode D1, short-circuited collector-emitter path Q1 and relay K1. This reaches the base of transistor Q4 via voltage divider R7, R8, which makes the transistor conductive and brings the base of transistor Q2 to zero potential. This means that transistor Q2 can no longer be activated even if there is a correspondingly positive input signal at
Wenn die Kollektor-Emitterstrecke des Transistors Q2 kurzgeschlossen ist, so gelangt über die Diode D2 über die kurzgeschlossenen Kollektor-Emitterstrecke des Transistors Q2 und das Relais K1 ein Pegel von nahezu null Volt an den Kollektor des Transistors Q1. Damit wird über den Spannungsteiler R5, R6 die Basis des Transistors Q3 negativ gegenüber dem Emitter angesteuert, wodurch der Transistor Q3 aktiviert wird und die Basis des Transistors Q1 gegen positive Spannung geht. Auf diese Weise ist auch durch ein entsprechend negatives Eingangssignal am Eingang E1 der Transistor Q1 nicht mehr aktivierbar, so daß auch in diesem Falle das Relais K1 nicht mehr anziehen kann.When the collector-emitter path of transistor Q2 is short-circuited, a level of almost zero volts reaches the collector of transistor Q1 via diode D2 via the short-circuited collector-emitter path of transistor Q2 and relay K1. The base of transistor Q3 is thus driven negatively with respect to the emitter via voltage divider R5, R6, as a result of which transistor Q3 is activated and the base of transistor Q1 goes against positive voltage. In this way, the transistor Q1 can no longer be activated by a correspondingly negative input signal at the input E1, so that the relay K1 can no longer pick up in this case either.
Eine weitere Fehlerquelle ist folgende. Wenn die Umschaltung der Eingangssignale an den Eingängen E1 und E2 nicht innerhalb eines definierten Zeitfensters tau, das heißt innerhalb einer vorgegebenen Zeitdifferenz, durchgeführt wird, so wird jeweils eine der Transistorstrecken, das heißt der Kollektor-Emitterstrecken des Transistors Q1 oder des Transistors Q2 aktiviert, wodurch wieder der Abschaltvorgang wie zuvor erläutert, erfolgt. Um den Eingangssignalen für die Umschaltung ein gewisses Zeitfenster, das heißt eine gewisse Zeitdifferenz zur Verfügung zu stellen, ist parallel zu dem Widerstand R6 der Kondensator C1 und parallel zu dem Widerstand R8 der Kondensator C2 geschaltet. Damit wird die Aktivierung des Abschaltvorganges der Ausgangstransistoren zeitlich verzögert. Die zeitliche Verzögerung erfolgt nach der Formel:
Die Dioden D1 und D2 dienen im wesentlichen dazu, die Basis der Transistoren Q1 und Q2 um etwa 0,6 V anzuheben bzw. abzusenken, um den Transistoren Q3 und Q4 ein sicheres Abschalten der Ausgangstransistoren Q1 und Q2 zu ermöglichen. Die Diode D3 hat die Funktion einer Freilaufdiode für das Relais K1 und ist optional vorgesehen.Another source of error is as follows. If the switching of the input signals at the inputs E1 and E2 is not carried out within a defined time window tau, that is to say within a predefined time difference, then one of the transistor paths, that is to say the collector-emitter paths, is in each case implemented of the transistor Q1 or the transistor Q2 activated, whereby the switch-off process takes place again as previously explained. In order to provide the input signals for the switchover with a certain time window, that is to say a certain time difference, capacitor C1 is connected in parallel with resistor R6 and capacitor C2 is connected in parallel with resistor R8. This delays the activation of the switch-off process of the output transistors. The time delay is based on the formula:
The diodes D1 and D2 essentially serve to raise or lower the base of the transistors Q1 and Q2 by approximately 0.6 V in order to enable the transistors Q3 and Q4 to reliably switch off the output transistors Q1 and Q2. The diode D3 has the function of a freewheeling diode for the relay K1 and is optionally provided.
Wenn das Zeitfenster, das heißt die vorgegebene Zeitdifferenz, bei der Ansteuerung nicht eingehalten wird und wenn dadurch wie zuvor beschrieben die Transistoren Q3 oder Q4 aktiviert werden, so läßt sich diese Aktivierung nur durch dynamisches Rücksetzen beider Eingangssignale auf Aus wieder zurücksetzen, was bei dem Eingang E1 einem High-Potential und bei dem Eingang E2 einem Low-Potential entspricht.If the time window, i.e. the specified time difference, is not adhered to when the control is activated and if the transistors Q3 or Q4 are activated as described above, this activation can only be reset by dynamically resetting both input signals to Off, which is the case with the input E1 corresponds to a high potential and a low potential at input E2.
Wie aus dem obigen hervorgeht, ist ist Schaltung prinzipiell so ausgelegt, daß das Relais K1 nur dann durchsteuert, wenn die Ansteuersignale über die Eingänge E1 und E2 in der richtigen Pegellage und im richtigen Zeitfenster, das heißt in der vorgegebenen Zeitdifferenz, erfolgen. Ferner bewirkt ein Durchbruch der Basis-Emitterstrecke der Ausgangstransistoren Q1 und Q2 eine sichere Einschaltsperre des Relais K1.As can be seen from the above, the circuit is in principle designed in such a way that the relay K1 only operates when the control signals via the inputs E1 and E2 are in the correct level position and in the correct time window, that is to say in the specified time difference. A breakdown of the base-emitter path also causes the output transistors Q1 and Q2 a safe switch-on lock of the relay K1.
Claims (3)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE4409287A DE4409287C1 (en) | 1994-03-18 | 1994-03-18 | Circuit for fail-safe relay control for electronic circuits |
| DE4409287 | 1994-03-18 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| EP0673050A2 true EP0673050A2 (en) | 1995-09-20 |
| EP0673050A3 EP0673050A3 (en) | 1996-04-17 |
| EP0673050B1 EP0673050B1 (en) | 1997-09-17 |
Family
ID=6513169
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP95103457A Expired - Lifetime EP0673050B1 (en) | 1994-03-18 | 1995-03-10 | Circuit for fail-safe relay control for electronic circuitry |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP0673050B1 (en) |
| AT (1) | ATE158440T1 (en) |
| DE (2) | DE4409287C1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009062536A1 (en) * | 2007-11-15 | 2009-05-22 | Siemens Aktiengesellschaft | Switching arrangement and method for controlling an electromagnetic relay |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107826088B (en) * | 2017-11-06 | 2020-01-03 | 中国人民解放军空军勤务学院 | Brake pad gap adjusting device for brake hub of electric automobile |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63144704A (en) * | 1986-12-05 | 1988-06-16 | Railway Technical Res Inst | Relay dc driving circuit |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3237942A1 (en) * | 1982-10-13 | 1984-04-19 | Robert Bosch Gmbh, 7000 Stuttgart | Device for sequentially switching-on at least two components which store power |
| DE3924988C2 (en) * | 1989-07-28 | 2002-08-01 | Continental Teves Ag & Co Ohg | Circuit arrangement for controlling the safety relay of an electronically controlled brake system of a motor vehicle |
-
1994
- 1994-03-18 DE DE4409287A patent/DE4409287C1/en not_active Expired - Fee Related
-
1995
- 1995-03-10 DE DE59500655T patent/DE59500655D1/en not_active Expired - Lifetime
- 1995-03-10 EP EP95103457A patent/EP0673050B1/en not_active Expired - Lifetime
- 1995-03-10 AT AT95103457T patent/ATE158440T1/en not_active IP Right Cessation
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63144704A (en) * | 1986-12-05 | 1988-06-16 | Railway Technical Res Inst | Relay dc driving circuit |
Non-Patent Citations (1)
| Title |
|---|
| PATENT ABSTRACTS OF JAPAN vol. 012 no. 400 (M-756) ,24.Oktober 1988 & JP-A-63 144704 (RAILWAY TECHNICAL RES INST) 16.Juni 1988, * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009062536A1 (en) * | 2007-11-15 | 2009-05-22 | Siemens Aktiengesellschaft | Switching arrangement and method for controlling an electromagnetic relay |
| CN101889323A (en) * | 2007-11-15 | 2010-11-17 | 西门子公司 | Switching arrangement and method for controlling an electromagnetic relay |
| CN101889323B (en) * | 2007-11-15 | 2013-06-19 | 西门子公司 | Switching arrangement and method for controlling an electromagnetic relay |
Also Published As
| Publication number | Publication date |
|---|---|
| ATE158440T1 (en) | 1997-10-15 |
| DE4409287C1 (en) | 1995-10-19 |
| EP0673050B1 (en) | 1997-09-17 |
| DE59500655D1 (en) | 1997-10-23 |
| EP0673050A3 (en) | 1996-04-17 |
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