EP0667057A1 - Bouclage a impedance active - Google Patents

Bouclage a impedance active

Info

Publication number
EP0667057A1
EP0667057A1 EP94923969A EP94923969A EP0667057A1 EP 0667057 A1 EP0667057 A1 EP 0667057A1 EP 94923969 A EP94923969 A EP 94923969A EP 94923969 A EP94923969 A EP 94923969A EP 0667057 A1 EP0667057 A1 EP 0667057A1
Authority
EP
European Patent Office
Prior art keywords
capacitor
circuit
active impedance
charge
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP94923969A
Other languages
German (de)
English (en)
Inventor
Stephen W. Hobrecht
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of EP0667057A1 publication Critical patent/EP0667057A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/04—Frequency selective two-port networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/46—One-port networks

Definitions

  • An integrated circuit is employed to control the charging and discharging of a small capacitor.
  • IC integrated circuit
  • a large value resistor must be employed to produce a reasonable R-C time constant.
  • a differen ⁇ tial amplifier (diff-amp) to produce a suitably low constant current charging and discharging action.
  • the diff-amp takes up less chip area than an equivalent high value resistor.
  • the charging current being constant, produces a linear charge or discharge.
  • Such circuits are commonly employed in oscillators where the diff-amp is switched between the charge and discharge states by suitable control circuitry.
  • the circuit When the capacitor charge is below V, the circuit will charge the capacitor at a constant current until the charge equals V. When the capacitor charge is above V, the circuit will discharge the capacitor until the charge equals V. The charge and discharge are constant and the rate is determined by the diff-amp tail current.
  • This circuit can be con figured with either bipolar or CMOS elements
  • the basic circuit can be the central part of typical dynamic circuits, such as a low pass filter or a high pass filter.
  • the critical filter frequencies can be controlled by the capacitor value and varied by means of the tail current control.
  • Figure 1 is a schematic diagram of the bipolar transistor version of the circuit of the invention.
  • Figure 2 is a schematic diagram of the CMOS transistor version of the circuit of the invention.
  • Figure 3 is a schematic diagram of a low pass filter using the circuit of the invention.
  • FIG. 4 is a schematic diagram of a high pass filter using the circuit of the invention. Description of the Ivention With reference to the schematic diagram of fi,gure 1, a V power supply is connected + to terminal 10 and - to ground terminal 11. Transistors 12 and 13 comprise a differential pair, configured as a long tailed pair, and the tail current (I household) is supplied by constant current element 14. The value of I Titan is determined by the bias potential applied to control terminal 15. The base of transistor 12 is the non ⁇ inverting input and the base of transistor 13 is the inverting input. Diode connected transistor 16 and transistor 17 are connected as a current mirror load and are connected respec ⁇ tively to the collectors transistors 12 anc 1 13. The collector of transistor 17 provides the circuit outp-.- at terminal 18.
  • the output of the circuit at terminal 18 is con ⁇ nected to the inverting input, at the base of transistor 13, so that the circuit incorporates 100% negative feedback. This means that the circuit will function as a unity gain voltage follower.
  • a voltage source 19 (V), having a value below V is connected to the base of transistor 12 and the stage will act to drive the output at terminal 18, to the level of V.
  • Capacitor 20 is desirably an on chip device which has a relatively small value (typically less than about 50 pf). If the initial charge on capacitor 20 is less than V (for example, when the circuit is first energized, the charge will be zero) , the circuit will cause I ⁇ to flow in transistor 13, thereby to charge capacitor 20. The charge will be constant because the current is constant. During this action, transistor 12 and, consequently, transistors 16 and 17 will be off. If capacitor 20 has an initial charge in excess of V (for example, the charge on capacitor can be equal to V under some conditions), transistor 13 will be turned off and I_, flows in transistor 12. This means that I_, will flow in transistors 16 and 17.
  • I_ will be sunk out of capacitor 20 so that it will discharge linearly.
  • the circuit will act to force the capacitor charge to the level of V at which point it will be balanced and Idonating will be split equally in tran- sisors 12 and 13.
  • I ⁇ /2 will flow in transistors 13 and 17 so that capacitor 20 will have its charge clamped at V.
  • FIG. 2 is a schematic diagram of a CMOS version of the circuit of figure 1.
  • the PNP transistors have been replaced by P channel MOSFETs and the NPN transistors replaced with N channel MOSFETs.
  • the CMOS transistors numerals include a prime sign and where the circuit elements are the same as those of figure 1, the same numerals are used.
  • the CMOS sources function in the same way as the BJT emitters, the drains function as collectors, and the gates function as bases.
  • the CMOS version of figure 2 will not have base-current errors that are always present in the bipolar figure 1 circuit and the voltage follower action will be somewhat more accurate.
  • FIG. 3 is a schematic diagram wherein the diff- amp circuit of figure 1 is used to form a high pass filter.
  • Capacitor 20 instead of being grounded, is returned to input terminal 21 and an a-c input signal 22 is applied thereto.
  • the peak voltage of input 22 is smaller than V.
  • the circuit will charge and discharge capacitor 20 so that the potential at the base of transistor 13 is held constant at V.
  • the signal output is zero.
  • a high frequencies the charge and discharge of capacitor 20 can ⁇ not occur rapidly enough to follow and, in effect, the signal from 22 will be coupled to the output terminal 18.
  • the circuit will display unity gain between terminals 21 and 18.
  • the knee of the transfer function will be determined by the value of I ⁇ , the capacitor value, and the voltage amplitude.
  • the bias applied to terminal 15 can control the frequency at which the knee occurs.
  • FIG 4 is a schematic diagram wherein the circuit of figure 1 is used to form a low-pass filter.
  • the a-c signal input source 22 is coupled in series with bias source 19. While source 22 is shown coupled between source 19 and terminal 23, it can function the same if it is located on the ground side of source 19.
  • capacitor 20 can charge and discharge due to the unity gain stage action and terminal 18 will follow. However, at the higher frequencies, capacitor 20 cannot charge and discharge rapidly enough to follow. At some high frequency the charge and discharge is so slow that substantially zero signal will occur at terminal 18.
  • the knee of the low-pass filter response will thus be a function of I ⁇ , the capacitor value, the voltage amplitude, and will be determined by the bias at terminal 15.

Landscapes

  • Networks Using Active Elements (AREA)

Abstract

Un circuit final à impédance active se compose d'un étage d'amplificateur différentiel comprenant une paire différentielle de transistors (12, 13) et une charge de miroir de courant (16, 17) produisant une sortie asymétrique (18). Une alimentation (14) en courant constant produit le courant de queue (IT) de la paire différentielle et peut être modulée en réponse à un potentiel de régulation (15). La sortie (18) est connectée à l'entrée inverseuse (13), ce qui permet de produire une rétroaction à 100 % négative, un gain de tension unitaire existant entre l'entrée non inverseuse et la sortie. Un condensateur (20) est couplé à l'entrée inverseuse et un potentiel de polarisation est appliqué à l'entrée non inverseuse. Le circuit permet de forcer la charge du condensateur à être égale au potentiel de polarisation. Ce circuit de base peut être configuré pour fonctionner comme un filtre passe-bas ou passe-haut.
EP94923969A 1993-09-02 1994-07-15 Bouclage a impedance active Withdrawn EP0667057A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11615193A 1993-09-02 1993-09-02
US116151 1993-09-02
PCT/US1994/008129 WO1995006977A1 (fr) 1993-09-02 1994-07-15 Bouclage a impedance active

Publications (1)

Publication Number Publication Date
EP0667057A1 true EP0667057A1 (fr) 1995-08-16

Family

ID=22365557

Family Applications (1)

Application Number Title Priority Date Filing Date
EP94923969A Withdrawn EP0667057A1 (fr) 1993-09-02 1994-07-15 Bouclage a impedance active

Country Status (3)

Country Link
EP (1) EP0667057A1 (fr)
KR (1) KR950704855A (fr)
WO (1) WO1995006977A1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2298982B (en) * 1995-03-15 1998-11-18 Plessey Semiconductors Ltd Controllable filter arrangement
SE508697C2 (sv) * 1996-07-19 1998-10-26 Ericsson Telefon Ab L M Förfarande och anordning för tidskontinuerlig filtrering i digital CMOS-process
GB0900747D0 (en) * 2009-01-16 2009-03-04 Isis Innovation Mechanical oscillator
GB0900745D0 (en) * 2009-01-16 2009-03-04 Isis Innovation Acoustic oscillator
GB0900744D0 (en) * 2009-01-16 2009-03-04 Oxford Rf Sensors Ltd Remote sensor device
GB0900746D0 (en) * 2009-01-16 2009-03-04 Oxford Rf Sensors Ltd Delay-line self oscillator

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0319727A3 (fr) * 1987-12-11 1990-08-22 Siemens Aktiengesellschaft Circuit pour un filtre passe bas à fréquence de coupure contrôlable

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9506977A1 *

Also Published As

Publication number Publication date
WO1995006977A1 (fr) 1995-03-09
KR950704855A (ko) 1995-11-20

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Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

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17P Request for examination filed

Effective date: 19950526

AK Designated contracting states

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Designated state(s): DE FR GB

STAA Information on the status of an ep patent application or granted ep patent

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18D Application deemed to be withdrawn

Effective date: 19970201