EP0607860A1 - Verfahren zur Steuerung einer Flüssigkristallanzeigevorrichtung - Google Patents

Verfahren zur Steuerung einer Flüssigkristallanzeigevorrichtung Download PDF

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Publication number
EP0607860A1
EP0607860A1 EP94100380A EP94100380A EP0607860A1 EP 0607860 A1 EP0607860 A1 EP 0607860A1 EP 94100380 A EP94100380 A EP 94100380A EP 94100380 A EP94100380 A EP 94100380A EP 0607860 A1 EP0607860 A1 EP 0607860A1
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EP
European Patent Office
Prior art keywords
period
liquid crystal
voltage
signal
potential
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EP94100380A
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English (en)
French (fr)
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EP0607860B1 (de
Inventor
Yoichi C/O Seiko Epson Corporation Wakai
Kenji C/O Seiko Epson Corporation Niwa
Masanori C/O Seiko Epson Corporation Konishi
Yojiro C/O Seiko Epson Corporation Matsueda
Hiroaki C/O Seiko Epson Corporation Mikoshiba
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Seiko Epson Corp
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Seiko Epson Corp
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/367—Control of matrices with row and column drivers with a nonlinear element in series with the liquid crystal cell, e.g. a diode, or M.I.M. element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2011—Display of intermediate tones by amplitude modulation

Definitions

  • the present invention relates to a method of driving a liquid crystal display device and, in particular, to a method of driving an active-matrix liquid crystal display device utilizing a two-terminal element as a switching element of a pixel.
  • An active-matrix type of liquid crystal display device provides a higher contrast than a conventional passive type of device, so they are becoming increasingly common in various manufacturing fields that use displays.
  • Two types of active elements are used: two-terminal type and three-electrode type. The two-terminal type is considered to be superior from the economical point of view.
  • MIM metal-insulator-metal
  • a two-terminal type of active element utilized in an active-matrix type of liquid crystal display device has the I-V characteristic shown in FIG. 3. In other words, it uses a switching function caused by a non-linear characteristic of current with respect to applied voltage, to charge and discharge an effective electrical charge applied to the picture element.
  • FIG. 1 The configuration of an active-matrix liquid crystal display device using a two-terminal type of active element is shown in FIG. 1.
  • reference number 101 denotes a column drive circuit (X driver) that drives column electrodes of a liquid crystal panel 115
  • 102 denotes a row drive circuit (Y driver) that drives row electrodes thereof.
  • reference number 104 denotes an AC video generation circuit which accepts a video signal (P) input, and generates an AC video signal in synchronization with an AC inversion signal FRX.
  • Reference number 103 denotes a shift register that is activated by a shift start signal DX, performs a shift operation in synchronism with a shift clock signal XSCL, and sequentially generates a sampling signal Sm.
  • Reference number 105 denotes a first analog switch that samples the AC video signal generated from the AC video generation circuit 104 by the sampling signal Sm and holds it in a capacitor 106.
  • the capacitor 106 is a first sample-and-hold capacitor.
  • Reference number 107 denotes a second analog switch that transfers the sampled video signal held in the capacitor 106 to another capacitor 108 by a latch pulse LP.
  • the capacitor 108 is a second sample-and-hold capacitor.
  • Reference number 109 denotes a buffer amplifier that drives a column electrode Xm on the basis of the video signal held in the capacitor 108.
  • reference number 110 denotes an inverter that uses Vp and -Vp as power sources and generates a selection voltage signal Vs in synchronization with an AC inversion signal FRY.
  • Reference number 111 denotes a shift register that is activated by a shift start signal DY, performs a shift operation in synchronism with a shift clock signal YSCL, and generates a selection signal Cn.
  • Reference number 112 denotes a power source selection switch for one cell of a drive circuit for a row electrode Yn.
  • the internal configuration of the selection switch 112 is shown in FIG. 2.
  • the AC inversion signal FRY and selection signal Cn are input to shift register latches which consists of NOR gates 201 and 202.
  • An output from the NOR gate 201 and an inverted signal obtained by an inverter 203 from the selection signal Cn are both input to AND gates 204 and 205, and outputs therefrom are input to gate electrodes of analog switches 207 and 208, respectively.
  • the selection signal Cn is also input to a gate electrode of an analog switch 206.
  • the selection voltage signal Vs and power sources -Va and Va are input to source electrodes of the analog switches 206 to 208, respectively, drain electrodes of the analog switches 206 to 208 are connected in common, and a signal Yn (a signal for driving the row electrode Yn) is output therefrom.
  • Reference number 115 denotes a liquid crystal panel.
  • Column electrodes Xm and row electrodes Yn are formed on the respective substrates of the liquid crystal panel 115, and at each intersection thereof a non-linear element 114 and a liquid crystal layer 113 are arranged in series to form a pixel.
  • voltages applied to the liquid crystal layer 113 and the non-linear element 114 are Vm and Vl, with respect to the row electrode.
  • the non-linear element 114 has the current-voltage characteristic shown in FIG. 3. As can be seen from this figure, when the applied voltage is small, the current is extremely small; when the applied voltage is large, the current characteristic increases steeply.
  • FIG. 1 and FIG. 2 The operation of the example of a prior art liquid crystal display device shown in FIG. 1 and FIG. 2 will now be described with reference to the timing charts of FIG. 4 to FIG. 6.
  • Va is the 100% white level of the positive-phase video signal and the 0% white level (pedestal level) of the negative-phase video signal
  • -Va is the 0% white level (pedestal level) of the positive-phase video signal and the 100% white level of the negative-phase video signal.
  • the shift start signal DY of the Y driver is sequentially transferred by the shift clock signal YSCL to generate selection signals C1, C2, C3...Cn,....
  • the latch pulse LP and the shift start signal DX of the X driver are input every horizontal scanning period.
  • the latch pulse LP is positioned roughly at the synchronization portion of the video signal, and it transfers the video signal that was sampled and held in the capacitor 106 during the previous horizontal scanning period to the capacitor 108.
  • the shift start signal DX is positioned roughly at the start of the video signal portion in one horizontal scanning period, and it is transferred by the shift clock signal XSCL to generate sampling signals S1, S2, S3...Sm,....
  • the nth video signal 104 sampled by sampling signal Sm (the sampling position marked by a circle (o) in the FIG. 4) is output to the column electrode Xm at the timing of the (n+1)th video signal after one horizontal scanning period.
  • FIG. 5 is a timing chart of the components shown in FIG. 2.
  • FIG. 6 is a timing chart of the column electrode signal Xm and the row electrode signal Yn, together with a difference signal Xm - Yn thereof.
  • Video data which corresponds to the mth column in the horizontal direction along the liquid crystal panel 115 is sequentially sampled by the AC video signal, and is output as the line electrode signal Xm.
  • the row electrode signal Yn outputs the selection voltage signal Vs during a selection period Ts, and a non-selection potential Va or -Va during a non-selection period Th.
  • the non-selection potential after a selection at positive potential Vp is Va, and that after a selection at negative potential -Vp is -Va.
  • the difference signal Xm - Yn is shown as a solid line in the signal chart at the bottom of FIG. 6.
  • the broken-line track is that of the potential at the connection between the liquid crystal layer 113 and the non-linear element 114. Since a large voltage is applied to the non-linear element 114 during the selection period Ts, the current flowing therein is large, as can be understood from the I-V characteristic of FIG. 3, and the liquid crystal layer 113 is charged thereby. The amount of this electric charge is controlled by the amplitude of Xm - Yn during the selection period Ts or by the level of the column electrode signal Xm, i.e., by the level of sampling by the AC video signal 104.
  • the signal level of the difference signal Xm - Yn is made positive in the non-selection period after a positive-polarity selection period, and negative in the non-selection period after a negative-polarity selection period. Therefore, the voltage applied to the non-linear element 114 in each non-selection period becomes small and thus it becomes difficult for the charge on the liquid crystal layer 113 to leak through the non-linear element 114 during the selection period.
  • the effective voltage applied to the liquid crystal layer 113 is proportional to the shaded area in FIG. 6, and thus in effect depends on the level of the sampled video signal.
  • the liquid crystal layer 113 controls the amount of light that passes through it in correspondence with the effective voltage applied to it, and thus a predetermined image is displayed on the liquid crystal panel 115.
  • I-V1 denotes the initial current-voltage characteristic of a two-terminal non-linear element
  • I-V2 denotes the same characteristic that has shifted while a voltage was continuously applied to the element (refer to: E. Mizobata et al., SID91 Digest, p. 226(1991)).
  • the I-V2 characteristic shows that resistance increases when the voltage is high, which means that a reduced charge is written to the liquid crystal layer during the selection period.
  • the voltage is low, there is very little difference in resistance, which means that there is little difference in charge held in the liquid crystal layer during the non-selection period. It is known that this I-V characteristic shift saturates with voltage applied to the liquid crystal layer.
  • Xm1 - Yn denotes the signal applied to pixel P1 and Xm2 - Yn denotes the signal applied to pixel P2.
  • a voltage VmsW applied to the non-linear element of pixel P2 during the selection period Ts of the white-display period is greater than a voltage VmsB applied to the non-linear element of pixel P1 of the black-display period.
  • VmsB applied to the non-linear element of pixel P2 has a greater I-V characteristic shift.
  • the afterimage described above is also generated in the case that the drive circuitry shown in FIG. 11 is used. Points at which the drive circuit of FIG. 11 differs from that of FIG. 1 are described below.
  • reference number 120 denotes an A/D converter for digitizing video signals which receives a video signal and generates n-bit digital data.
  • Reference number 121 denotes a shift register that performs a shift in synchronization with the shift clock signal XSCL to sample the input digital signal.
  • Reference number 122 denotes a latch circuit that latches and holds data that has been sampled by the shift register 121.
  • Reference number 123 denotes an Xm drive circuit which drives the column electrode Xm by outputting a potential of either Va or -Va based on the AC inversion signal FRX for the column and the data held in the latch circuit 122.
  • reference number 125 denotes a liquid crystal power generation circuit which inputs the Vp and -Vp voltages and generates the selection voltage signal Vs multiplexed in synchronization with the AC inversion signal FRY for the rows.
  • This liquid crystal power generation circuit 125 is functionally the same as the inverter 110 of FIG. 1.
  • the shift register 111 generates the selection signal Cn in the same way as in the configuration of FIG. 1.
  • Reference number 112 denotes, in the same way as in FIG. 1, a power source selection switch for one cell of the drive circuitry for the row electrode Yn which drives the row electrode Yn by outputting one of Vs, Va, or -Va, based on the selection signal Cn.
  • FIG. 12 is a timing chart of the column electrode signal Xm and the row electrode signal Yn, together with a difference signal Xm - Yn thereof.
  • FR the polarity inversion signal
  • Xm goes to -Va for an OFF level (Voff) and Va for an ON level (Von);
  • FR 1, Xm goes to Va for the OFF level (Voff) and -Va for the ON level (Von).
  • the ratio of Von to Voff varies with the level of the video signal, to enable a display that includes intermediate displays obtained by pulse width modulation (PWM).
  • PWM pulse width modulation
  • the row electrode signal Yn outputs the selection voltage signal Vs during a selection period Ts, and a non-selection voltage Va or -Va during a non-selection period Th.
  • the non-selection potential after a selection at positive potential Vp is Va, and that after a selection at negative potential -Vp is -Va.
  • the difference signal Xm - Yn is shown as a solid line in the signal chart at the bottom of FIG. 12.
  • the broken-line track is that of the potential at the connection between the liquid crystal layer 113 and the non-linear element 114. Since a large voltage is applied to the non-linear element 114 during the selection period Ts, the current flowing therein is large, as can be seen from the I-V characteristic of FIG. 3, and the liquid crystal layer 113 is charged thereby. The amount of this charge is controlled by the amplitude of Xm - Yn during the selection period Ts, i.e., by the width of Von in the column electrode signal Xm.
  • the signal level of the difference signal Xm - Yn is made positive in the non-selection period after a positive-polarity selection period, and negative in the non-selection period after a negative-polarity selection period. Therefore, the voltage applied to the non-linear element 114 in each non-selection period becomes small and thus it becomes difficult for the charge on the liquid crystal layer 113 to leak through the non-linear element 114 during the selection period.
  • Xm1 - Yn denotes the signal applied to pixel P1 of FIG. 8 and FIG. 9 and Xm2 - Yn denotes the signal applied to pixel P2 thereof.
  • a voltage VmsW applied to the non-linear element of pixel P2 during the selection period Ts of the white-display period is greater than a voltage VmsB applied to the non-linear element of pixel P1 of the black-display period, in the same manner as in FIG. 10.
  • VmsW applied to the non-linear element of pixel P2 during the selection period Ts of the white-display period is greater than a voltage VmsB applied to the non-linear element of pixel P1 of the black-display period, in the same manner as in FIG. 10.
  • VmsW applied to the non-linear element of pixel P2 during the selection period Ts of the white-display period is greater than a voltage VmsB applied to the non-linear element of pixel P1 of the
  • I-V characteristic of the non-linear element of pixel P2 shifts to develop a greater resistance when a large voltage is applied than that of pixel P1.
  • the effective voltage applied to the liquid crystal layer during the selection period is proportional to the shaded area in FIG. 13. It is clear that S1 > S2 and, as a result, pixel P2 ends up darker than pixel P1 and can be seen as an afterimage.
  • An objective of the present invention is to solve aforementioned technical problem, i.e., the problem of afterimages in the active-matrix liquid crystal display device utilizing the two-terminal element as the switching elemnt of the pixel.
  • the method of driving a liquid crystal display device that comprises a plurality of row electrodes to which a scanning signal is applied, a plurality of column electrodes to which a data signal is applied, and a plurality of pixels formed at a plurality of intersections between the row and column electrodes, each of the pixels comprising a liquid crystal layer and a two-terminal element having non-linear resistance characteristics connected in series therewith
  • the method of driving a liquid crystal display device comprising steps of: applying the voltage of a difference signal between the scanning signal and the data signal to each of the pixels; applying a write voltage to each of the pixels based on the difference signal during a data write period TB in which each of the row electrodes is selected and the liquid crystal layer of each of the pixels is charged with a data charge voltage corresponding to the data signal; applying a hold voltage of an absolute value smaller than the write voltage to each of the pixels based on the difference signal during a data hold period after the data write period TB; and applying a compensatory voltage
  • a method of driving a liquid crystal display device which comprises a plurality of column lines and row lines and a plurality of pixels each pixel including a display element and a non-linear resistance element connected in series between said column and row lines
  • said method of driving the liquid crystal display device comprising the step of: applying a first higher voltage between said column and row lines so that a display data is supplied to said display element of the pixel, in a selection period of the pixel; applying a lower voltage than said first higher voltage between said first and second lines, in a non-selection period of the pixel after said selection period; applying a second higher voltage than said lower voltage between said first and second lines, in a compensatory period of the pixel before said selection period and after said non-selection period, wherein said second higher voltage in said compensatory period has a polality oposite to that of said first higher voltage in said selection period, a root-mean - square (RMS) of said second higher voltage in said compensatory period and
  • RMS root-mean
  • the relationship between the compensatory charge voltage and the compensatory charge voltage is and the compensatory charge voltage preferably in a complementary relationship with the data charge voltage in view of a display gradation.
  • a compensatory voltage is applied to each pixel immediately before the data write period so that the liquid crystal layer of the pixel is charged with a compensatory charge voltage of a polarity opposite to that of the data charge voltage in the data write period.
  • a large voltage is applied to the non-linear element immediately before the data write period and, moreover, this compensatory voltage is preferably set to have a complementary relationship in view of the display gradation with the voltage to be charged into the liquid crystal layer of the pixel during the write.
  • the method of the present invention is suitable for driving a liquid crystal display devices such as a TV, a display of personal computor, a projector, a head mounted display or a printer having a liquid crystal shutter etc..
  • the root-mean-square values of the voltages applied to the two-terminal element could be set so that they are substantially equal for each two-terminal element of the pixels. If the period of time during which the compensatory voltage is applied is a compensatory period TA and the period of time during which the data is written is a data write period TB, the temporal ratio of the period TA to the period TB can be used to adjust the root-mean-square values of the voltages to be applied to the two-terminal element.
  • the absolute values of the potentials of the scanning signal during the periods TA and TB can be made different, and these scanning signal potentials can be used to adjust the root-mean-square values of the voltages to be applied to the two-terminal element.
  • the potentials of the data signal during the periods TA and TB can be made different, and these data signal potentials can be used to adjust the root-mean-square values of the voltages applied to the two-terminal element.
  • Noise can be counteracted by either making TA/(TA + TB) ⁇ 1/4 , where (TA + TB) equals one horizontal scanning period, or by making sure that the period TA is in a flyback period of the video signal along the time axis.
  • any noise that may be caused by the large voltage change at the boundary between the compensatory voltage and the write voltage of different polarities can be superimposed in the flyback period of the video signal, so that it does not appear as noise on the liquid crystal panel.
  • the data signal is set to a voltage corresponding to a display gradation in each horizontal scanning period and is also at the same voltage level within one horizontal scanning period; and the scanning signal is set to be such that the period TA and the data write period TB have different polarities with respect to a middle potential of the data signal in the voltages each of which is charged into the liquid crystal layer.
  • the voltage applied to the pixel in the period TA and that applied in the period TB are in a complementary relationship in view of the display gradation regarding the voltage that is charged into the liquid crystal layer of the pixel. Therefore, by simply improving the waveform of the scanning signal, it becomes possible to control the afterimage phenomenon based on the principle of the method according to the present invention.
  • the I-V characteristic shift of the non-linear element can be made always uniform, irrespective of the type of display, and thus afterimages can be eliminated.
  • the relationship could be such that TA > TB.
  • the times of the periods TA and TB are substantially equal, and the voltage of the scanning signal with respect to a middle potential of the data signal in the period TA is VTA and that in the period TB is VTB, these voltages could be set such that
  • the root-mean-square values of the voltages to be applied to the two-terminal element can be made to approach a situation in which they are substantially equal with respect to the two-terminal element of each pixel.
  • the voltage of the data signal is not made uniform in one horizontal scanning period, but is set to a voltage corresponding to a display gradation in the period TB, and to a voltage of an absolute value greater than that in the period TB in the period TA, the root-mean-square values of the voltages to be applied to the two-terminal element can be made to approach a situation in which they are substantially equal for each two-terminal element of the pixels. In this way, the absolute value of the scanning signal with respect to a middle potential of the data signal can be made substantially equal in the periods TA and TB.
  • the method of the present invention can also be applied to a case in which the data signal has a potential Von that is supplied a voltage of a large absolute value onto each pixel or a potential Voff that is supplied a voltage of a small absolute value thereto based on the polarity of the scanning signal in the data write period TB with respect to a middle potential of the data signal, and works as a pulse-width modulation signal that varies the pulse width of the potential Von in the period TB to correspond with the voltage that is charged into the liquid crystal layer of each pixel.
  • the data signal has two potentials, Von or Voff in the period TB, and duty of the pulse widths of the potential Von to the period TA is substantially equal to duty of the pulse width of potential Von to the period TB.
  • the data signal is set to be such that the duties of the pulse widths of the potential Von to the periods TA and TB are substantially equal and the scanning signal is set to be such that the periods TA and TB have different polarities on the voltages each of which is charged into the liquid crystal layer of the pixel, so that the values of the difference signal between the data signal and the scanning signal in the periods TA and TB are in a complementary relationship in view of the display gradation, and thus afterimages can be controlled on the basis of the principle of the present invention.
  • TonA, ToffA, TonB, and ToffB periods in each of the periods TA and TB of the difference signal to be applied to the pixel as described above, the difference signals in the periods TA and TB can be made to be in a complementary relationship in view of the display gradation, so afterimages can be controlled on the basis of the principle of the present invention.
  • the initial part of the period TB should be the period ToffB and the ending part thereof should be the period TonB.
  • the period TA can be set so that the period TonA is either the initial part of the period TA or the ending part thereof. Setting the period TonA to the initial part of the period TA is considered superior, from the point of view that it is comparatively easy to generate the data signal in that case.
  • the root-mean-square values of the voltages to be applied to the two-terminal element can be adjusted so that they are substantially uniform for each of the two-terminal elements of the pixels by setting the time ratio of the period TA to the period TB or by making the potentials of the scanning signal different in the periods TA and TB.
  • the data signal has a potential VonB that supplies a voltage of a large absolute value to each pixel or a potential VoffB that supplies a voltage of a small absolute value thereto based on the scanning signal
  • the data signal works as pulse-width modulation signal that varies the pulse width of the potential VonB in the period TB to correspond with the voltage that is charged into the liquid crystal layer of each pixel
  • the data signal can also have potential VonA or VoffA in the period TA of absolute values greater than those of the corresponding potentials VonB or VoffB, respectively, and the duty of the pulse widths of the potential VonA to the period TA is substantially equal to duty of the pulse width of potential VonB to the period TB.
  • the method of the present invention can be used with a two-terminal element that has a metal-insulator-metal layer structure (an MIM element), a metal-insulator-semiconductor layer structure (an MIS element), one type of MIM element comprises, the insulator layer which is preferably an oxide film formed by anodic oxidization in an electrolytic liquid including phosphorus in a form such as phosphoric acid or ammonium phosphate.
  • MIM element comprises the insulator layer whih is a silicon nitride.
  • the insulator layer is also preferably formed by anodic oxidization of tantalum. If an MIM element is used as the non-linear element, one of the metal layers thereof can be made a transparent conductive layer, so that it can also function as a transparent electrode of the liquid crystal panel.
  • FIG. 1 is a structural diagram of a liquid crystal display device.
  • FIG. 2 is a structural diagram of a voltage selection switch within the row drive circuit of the device of FIG. 1.
  • FIG. 3 shows the I-V characteristic of a non-linear element.
  • FIG. 4 is a timing chart in accordance with the prior art example of components shown in FIG. 1.
  • FIG. 5 is a timing chart in accordance with the prior art example of the row drive circuit.
  • FIG. 6 is a drive waveform chart in accordance with the prior art example of the liquid crystal panel.
  • FIG. 7 is a diagram illustrating the I-V characteristic shift of a non-linear element.
  • FIG. 8 shows a window being displayed on a liquid crystal panel.
  • FIG. 9 shows an intermediate display on a liquid crystal panel.
  • FIG. 10 is a drive waveform chart in accordance with the prior art example, illustrating the generation of an afterimage due to the I-V characteristic shift of non-linear elements.
  • FIG. 11 is a structural diagram of another example of a liquid crystal display device.
  • FIG. 12 is a drive waveform chart of the prior art liquid crystal panel used in the device of FIG. 11.
  • FIG. 13 is a drive waveform chart in accordance with the prior art example, illustrating the generation of an afterimage due to the I-V characteristic shift of non-linear elements.
  • FIG. 14 is a timing chart of driving in the row direction, in accordance with a first embodiment of the present invention.
  • FIG. 15 is a drive waveform diagram of the liquid crystal panel in accordance with the first embodiment of the present invention.
  • FIG. 16 illustrates the principle of afterimage reduction in accordance with the first embodiment of the present invention.
  • FIG. 17 is a drive waveform diagram used to reduce afterimages in accordance with the first embodiment of the present invention.
  • FIG. 18 is a timing chart of driving in the row direction, in accordance with a second embodiment of the present invention.
  • FIG. 19 is a drive waveform diagram of the liquid crystal panel in accordance with the second embodiment of the present invention.
  • FIG. 20 illustrates the principle of afterimage reduction in accordance with the second embodiment of the present invention.
  • FIG. 21 is a drive waveform diagram used to illustrate that the non-linear element in accordance with the second embodiment of the present invention can reduce afterimages.
  • FIG. 22 is a timing chart of driving in the row direction, in accordance with a third embodiment of the present invention.
  • FIG. 23 illustrates the principle of afterimage reduction in accordance with the third embodiment of the present invention.
  • FIG. 24 is a drive waveform diagram using to illustrate that the non-linear element in accordance with the third embodiment of the present invention can reduce afterimages.
  • FIG. 25 is a drive waveform diagram of a liquid crystal panel in accordance with the fourth embodiment of the present invention.
  • FIG. 26 is a circuit diagram of an X driver using the fourth embodiment of the present invention.
  • FIG. 27 is a characteristic graph used to illustrate the signal changes in the various components of FIG. 26.
  • FIG. 28 is a timing chart of the operation of the grayscale signal generation circuit of FIG. 26.
  • FIG. 29 is divided into FIG. 29A to FIG. 29D, each used to illustrate the drive circuits for generating the column electrode signal Xm, or the operation thereof.
  • FIG. 30 is a drive waveform diagram used to illustrate a fifth embodiment of the present invention.
  • FIG. 31 is a drive waveform diagram of a liquid crystal panel in accordance with a sixth embodiment of the present invention.
  • FIG. 32 is another drive waveform diagram of the liquid crystal panel in accordance with the sixth embodiment of the present invention.
  • FIG. 33 is a diagram used to illustrate how the X driver of FIG. 31 and FIG. 32 generates the column electrode signal.
  • FIG. 34 is a plan view of a non-linear element of a seventh embodiment of the present invention.
  • FIG. 35 is a cross-sectional view of the non-linear element of the seventh embodiment of the present invention.
  • FIG. 36 is a graph of measurements taken of afterimage levels in the seventh embodiment of the present invention and an example of the prior art.
  • FIG. 37 is a circuit diagram of a variation of the X driver using in the fourth embodiment of the present invention.
  • a first embodiment of the present invention is an improvement to the drive method used by the liquid crystal display device of FIG. 1, and its internal configuration and functions are those of the device of FIG. 1 that has already been described.
  • the non-linear elements 114 of FIG. 1 and FIG. 11 that are used in the method of driving a liquid crystal display device in accordance with the present invention, as described as embodiments 1 to 6 herein, could be MIM elements, MIS elements, varistors, ring diodes, or back-to-back diodes.
  • an MIM element could be configured with one metal layer thereof being a transparent conductive layer which can be made to serve also as a transparent electrode of the liquid-crystal panel.
  • the insulator layer of the MIM element could be a silicon nitride.
  • scanning signals are supplied to row electrodes, and data signals are supplied to column electrodes as shown in Fig. 11.
  • FIG. 14 is a timing chart of the Y driver which is necessary for carrying out the first embodiment of the present invention.
  • DY, YSCL, FRY, C1, and Cn signals are the same as those that have already been described with reference to FIG. 5.
  • Y driver outputs the selection voltage signal Vs as the output Vn when the selection signal Cn is 1 in the same way, but in order to carry out this first embodiment, the phase relationship between the selection signal Cn and the AC inversion signal FRY is changed.
  • the prior art drive see FIG.
  • FIG. 14 illustrates this change in detail.
  • the potential Vp changes into -Vp after the switch in FRY.
  • FIG. 15 This figure shows the waveforms of signals applied to the pixel that is the mth pixel in the horizontal direction and the nth pixel in the vertical direction, in the liquid crystal panel 115 of FIG. 1, in the same manner as already described for FIG. 6.
  • the column electrode signal Xm sequentially samples the AC video signal 104, holds the data for one horizontal scanning period, then outputs the data, in the same way as in the prior art, so that the output data itself represents the data for the previous horizontal scanning period.
  • the row electrode signal Yn is the same as the signal in FIG. 11, which was described above.
  • one horizontal scanning period is the period obtained by multiplying one field period by the number of data lines (the number of column electrodes). If a rest period is set for a certain column electrode, only column electrodes that do not have a rest period set for them are included in the calculation.
  • the difference signal Xm - Yn between the column electrode signal Xm and the row electrode signal Yn, both of which are actually applied to the non-linear element 114 and liquid crystal layer 113.
  • the column electrode signal Xm outputs the same level within one horizontal scanning period, but the polarity of the row electrode signal Yn inverts greatly during one horizontal scanning period. Therefore, the polarity of the difference signal also changes greatly between positive and negative, as shown at the bottom of FIG. 15.
  • large potential of positive polarity is applied to the pixel, then the potential swings over greatly to the negative polarity side.
  • the potential changes greatly to positive polarity.
  • the pixel is selected twice, i.e., in two selection periods, TA and TB, within one horizontal scanning period.
  • the second selection determines the gradation value. Therefore, as shown in FIG. 15, it is the selection of the ending period TB that determines the display gradation (in the example on the right-hand side of the figure, this is a write at positive polarity side).
  • a display gradation or rather, the root-mean-square value actually applied to the liquid crystal layer 113 has the same effect as that of FIG. 6.
  • the display gradation is determined by the ending selection.
  • the selection data for the initial period TA is the complement of the data of the ending period TB in this first embodiment.
  • "complement” is defined here as either of two numbers which together achieve a level of 100%. For example, 0 is the complement of 1, and 0.9 is the complement of 0.1.
  • the state of the column electrode signal described below shows the reason for this complementary relationship.
  • the pixels show a white display when a voltage equal to or more than the threshold voltage is applied to the liquid crystal layer and show a black display when a voltage less than the threshold voltage is applied to the liquid crystal layer.
  • This mode of display is defined here as a negative display.
  • the potential of the column electrode signal is Va when the pixels show a white display and -Va when the pixels show a black display.
  • the potential of the column electrode signal is -Va when the pixels show a white display and Va when the pixels show a black display.
  • the principle by which the first embodiment can reduce the afterimages in the non-linear elements caused by I-V characteristic shift will now be described in detail with reference to FIG. 16.
  • the write potential for the actual selection in the ending period TB is at a maximum at
  • the compensatory selection in the initial period TA writes data that is the complement thereof, and so is at the minimum potential of
  • black is displayed (corresponding to the right-hand side of FIG.
  • the write potential for the actual selection in the ending period TB is at a minimum at
  • the compensatory selection in the initial period TA is at a maximum of
  • white a large potential is applied to the non-linear element during the actual selection, but only a small potential is applied to the non-linear element in the preceding compensatory selection.
  • black the potential to be applied in the actual selection is small, but a large potential is applied to the non-linear element during the compensatory selection. This means that the total potential applied to the non-linear element can be made the same, regardless of whether black or white is selected.
  • the potential applied to the non-linear element changes to the compensatory selection potential from that applied in the non-selection period.
  • this potential goes from -2Va to -(Vp - Va); on the right-hand side, it goes from 0 to -(Vp + Va).
  • the potential applied to the non-linear element changes much more, from the compensatory selection potential to the actual selection potential.
  • this potential goes from -(Vp - Va) to (Vp + Va); on the right-hand side, it goes from -(Vp + Va) to (Vp - Va). Therefore, a larger potential is applied to the non-linear element for the actual selection, and consequently TA > TB.
  • FIG. 17 the signal applied to pixel P1 (in other words, Xm1 - Yn) and the signal applied to pixel P2 (in other words, Xm2 - Yn) are shown in FIG. 17.
  • Pixel P1 shows a black display
  • pixel P2 shows a white display.
  • the principle described above dictates that the effective voltage VmsB applied to pixel P1 and the effective voltage VmsW applied to pixel P2 are equal, so the magnitude of I-V characteristic shift in the non-linear elements thereof is similarly equal. Therefore, the effective voltage S1 applied to pixel P1 and the effective voltage S2 applied to pixel P2 during intermediate display are also equal, and thus the difference in brightness described with reference to FIG. 10 can be eliminated.
  • the present invention is also capable of equalizing the I-V characteristic shift of non-linear elements under all display conditions. This means that the phenomenon of afterimages can be reduced, irrespective of the type of display.
  • FIG. 18 is a timing chart of the Y driver which is necessary for carrying out a second embodiment of the present invention. Note that the DY, YSCL, FRY, C1, and Cn signals are the same as those that have already been described with reference to FIG. 5.
  • the duty ratio of YSCL is 50% and it is used as a switching signal to switch the potential of the signal Vs from ⁇ Vr to ⁇ Vp.
  • FIG. 18 illustrates this change in detail.
  • the left-hand side of FIG. 18 shows the selection voltage signal Vs output as Yn when Cn is 1.
  • Vs is -Vr and ouptputs relatively larger voltage than -Vp.
  • YSCL the Vr and Vp switching signal
  • the switch in FRY changes it to Vp.
  • Yn outputs -Vp by switching in FRY after Yn outputs Vr.
  • FIG. 19 shows the waveforms of signals applied to the pixel that is the mth pixel in the horizontal direction and the nth pixel in the vertical direction, in the liquid crystal panel 115 of FIG. 1, in the same manner as already described for FIG. 6.
  • the column electrode signal Xm sequentially samples the AC video signal 104, holds the data for one horizontal scanning period, then outputs the data, in the same way as in the prior art, so that the output data itself represents the data for the previous horizontal scanning period.
  • the row electrode signal Yn is the same as the signal in FIG. 18, which was described above.
  • the selection of the ending period TB determines the display gradation (in the example on the right-hand side of the figure, this is a write at positive polarity side).
  • a display gradation or rather, the root-mean-square value actually applied to the liquid crystal layer 113 has the same effect as that of FIG. 6.
  • the selection data for the initial period TA is the complement of the data of the ending period TB, in the same manner as in the first embodiment. The reason for this is the same as that given for the first embodiment. Therefore, with the drive of FIG. 19, corresponding to the actual selection for determining the display gradation in the ending period TB, the complementary data of the actual selection is written in the compensatory selection in the initial period TA. This operation enables a reduction in afterimages caused by I-V characteristic shift in the non-linear elements.
  • the write potential for the actual selection in the ending period TB is at a maximum at
  • the compensatory selection in the initial period TA writes data that is the complement thereof, and so is at a minimum potential within the compensatory voltage
  • the pixels show a black display (corresponding to the right-hand side of FIG.
  • the write potential for the actual selection in the ending period TB is at a minimum at
  • the compensatory selection in the initial period TA is at a maximum of
  • white a large potential is applied to the non-linear element during the actual selection, but only a small potential is applied to the non-linear element in the preceding compensatory selection.
  • black the potential to be applied for the actual selection is small, but a large potential is applied to the non-linear element during the compensatory selection. In other words, this means that the total potential applied to the non-linear element can be made the same, regardless of whether black or white is selected.
  • FIG. 21 the signal applied to pixel P1 (in other words, Xm1 - Yn) and the signal applied to pixel P2 (in other words, Xm2 - Yn) are shown in FIG. 21.
  • Pixel P1 shows a black display
  • pixel P2 shows a white display.
  • the principle described above dictates that the effective voltage VmsB applied to pixel P1 and the effective voltage VmsW applied to pixel P2 are equal, so the magnitude of I-V characteristic shift in these non-linear elements is similarly equal. Therefore, the effective voltage S1 applied to pixel P1 and the effective voltage S2 applied to pixel P2 during intermediate display are also equal, and thus the difference in brightness described with reference to FIG. 10 can be eliminated.
  • a third embodiment of the present invention is an improvement to the drive method used by the liquid crystal display device of FIG. 11.
  • FIG. 22 is a timing chart of the Y driver which is necessary for carrying out a third embodiment of the present invention.
  • DY, YSCL, FRY, C1, and Cn signals are the same as those that have already been described with reference to FIG. 5.
  • Y driver outputs the selection voltge signal Vs as the output Vn when the selection signal Cn is 1 in the same way, but in order to carry out this third embodiment, the phase relationship between the selection signal Cn and the AC inversion signal FRY is changed.
  • the example shown in FIG. 22 differs from that of the first embodiment shown in FIG. 14 in that the switching of FRY is set to be at the center of the period during which Cn is 1, so the duty ratio of Yn is uniform. Note that this duty ratio can be freely selected by changing the phases of Cn and FRY.
  • FIG. 23 shows the waveforms of signals applied to the pixel that is the mth pixel in the horizontal direction and the nth pixel in the vertical direction, in the liquid crystal panel 115 of FIG. 11, in the same manner as already described for FIG. 12.
  • the column electrode signal Xm sequentially samples the video signal in the A/D converter 120 and outputs Von and Voff periods based on that data.
  • one horizontal scanning period is divided into two parts, TA and TB, with the selection data for the initial period TA being the complement of the data of the ending period TB.
  • the potential Von of the column electrode signal Xm in the write period TB is Va in the waveform shown in FIG. 23 so that a relatively large voltage is applied to the pixel in connection with the polarity of the scanning signal in the period TB, but the column electrode signal Xm has a potential Von of a substantially equal pulse width in each of the periods TA and TB.
  • the row electrode signal Yn is the signal described with reference to FIG. 22.
  • the polarity of the row electrode signal Yn inverts hugely in one horizontal scanning period, the polarity of the difference signal Xm - Yn between the column electrode signal Xm and the row electrode signal Yn, both of which are actually applied to the non-linear element 114 and liquid crystal layer 113 also changes greatly between positive and negative, as shown at the bottom of FIG. 23.
  • the pixel is selected twice, i.e., in two selection periods, TA and TB, within one horizontal scanning period.
  • the compensatory selection in the initial period TA is the complement of the actual selection in the ending period TB.
  • the mode of display is the negative display
  • the left-hand side of FIG. 23 shows an example where the pixel shows an intermediate display close to white.
  • the ratio of Von to Voff is comparatively large and thus a large root-mean-square value is applied to the liquid crystal layer 113 of FIG. 11.
  • the complementary data described above is selected in the selection in the initial period TA, a wide pulse of the same potential as the potential Von in the ending period TB functions as the Voff potential when it is applied to the pixel, so that in effect the selection is such that the ratio with Von is small.
  • the root-mean-square value of the compensatory selection of the initial part is small.
  • the root-mean-square value of the compensatory selection of the initial part is large.
  • the root-mean-square values applied to the non-linear element 114 that is changing from white to black can be made to be substantially uniform. This operation enables a reduction in afterimages caused by I-V characteristic shift in the non-linear elements.
  • the data of the compensatory selection is the complement of the data of the actual selection.
  • the potential applied to the non-linear element changes to the compensatory selection potential from that applied in the non-selection period. On the left-hand side of FIG. 23, this potential goes from -2Va to -(Vp - Va); on the right-hand side, it goes from 0 to -(Vp + Va).
  • FIG. 24 the signal applied to pixel P1 (in other words, Xm1 - Yn) and the signal applied to pixel P2 (in other words, Xm2 - Yn) are shown in FIG. 24.
  • Pixel P1 shows a black display
  • pixel P2 shows a white display.
  • the principle described above dictates that the effective voltage VmsB applied to pixel P1 and the effective voltage VmsW applied to pixel P2 are equal, so the magnitude of I-V characteristic shift in these non-linear elements is similarly equal. Therefore, the effective voltage S1 applied to pixel P1 and the effective voltage S2 applied to pixel P2 during intermediate display are also equal, and thus the difference in brightness described with reference to FIG. 13 can be eliminated.
  • the third embodiment of the present invention is also capable of equalizing the I-V characteristic shift of non-linear elements under all display conditions. This means that the phenomenon of afterimages can be reduced, irrespective of the type of display.
  • a fourth embodiment of the present invention concerns a case where the signal waveform of the difference signal Xm - Yn is changed as shown in FIG. 25 by changing the waveform of the column electrode signal Xm in FIG. 23, which is the timing chart of the third embodiment.
  • the data of the initial period TA which is the compensatory selection is symmetrical with the data of the ending period TB which is the actual selection, about the axis of the switch in FRX, as shown in the column electrode signal Xm of FIG. 23.
  • the same data is temporally compressed into, for example, half the horizontal scanning period and is output twice in succession within one horizontal scanning period, as shown by the column electrode signal Xm of FIG. 25.
  • FIG. 26 A configuration example of the X driver that outputs the column electrode signal Xm shown in FIG. 25 is shown in FIG. 26.
  • This figure shows a drive circuit that supplies an M-bit video data signal to each of N data lines.
  • reference number 300 denotes a data bus that supplies the M-bit video data signal which inverts in N cycles within one field, as shown by 421 in FIG. 27.
  • the M-bit video data signal is written to first memories 311 to 315 corresponding to addresses determined in accordance with the outputs of N-stage shift registers 301 to 305.
  • Reference numbers 351 to 355 in FIG. 26 denote output signals from the shift registers 301 to 305, respectively.
  • the output signals 351 to 355 are usually at 0 but become 1 once only within one field to write the contents of the data bus 300 to the corresponding first memories 311 to 315.
  • the timing chart of FIG. 27 illustrates this state, where the output signals of the shift registers 301 to 305 are shown as reference numbers 401 to 405, respectively.
  • the contents of the data stored in each of the first memories 311 to 315 are shown as reference numbers 411 to 415, respectively. Note that the shading in FIG. 27 denotes an undetermined status.
  • the video data signal on the data bus 300 is written to memory 311 at a timing T1, to memory 312 at a timing T2, and to memory 313 at a timing T3. Thereafter, video data is written to each memory in turn until data is written to the final-stage memory 315 at a timing Tn, which completes the operation of writing video data to memory in this field.
  • This one field of video data is equivalent to the video data for one scan line.
  • a latch pulse (LP) 360 is input to second memories 321 to 325.
  • This latch pulse 360 acts to transfer the data that is in the first memories 311 to 315 to the second memories 321 to 325.
  • the signal waveform of the latch pulse 360 is shown as reference number 422 in FIG. 27.
  • this latch pulse 422 is high level, the data in the first memories 311 to 315 is written in a batch to the second memories 321 to 325.
  • the data in the second memories 321 to 323 is held stable, as shown by data 423 in FIG. 27.
  • the second memories 321 to 325 each output M-bit data signals 371 to 375, as shown in FIG. 26.
  • These M-bit data signals 371 to 375 and a basic pulse train 361 (which form constituent elements of a grayscale signal) are combined by grayscale signal generation circuits 331 to 335 to generate individual-stage grayscale signals 381 to 385 (in other words, the column electrode signal Xm).
  • the basic pulse train 361 comprises a reset signal RES and a GCP signal formed of, for example, 2 M pulses of a different pulse width, as shown in FIG. 28.
  • the reset signal RES has a pulse that goes high at the initial-period position and final-period position of the horizontal scanning period, in the same manner as the latch pulse 422, as shown in FIG. 28, and it also has a pulse at the central position of the horizontal scanning period.
  • the GCP signal are output in succession in one horizontal scanning period as two identical signals, each compressed into the time of half the horizontal scanning period.
  • the reset signal RES and the GCP signal compound the outputs from the second memories 321 to 325, as shown in FIG.
  • the signal 381 to 385 can be generated in the form of a uniform waveform which reflects the grayscale data is output sequentially within the horizontal scanning period so that the signals 381 to 385 can be generated.
  • these grayscale signal generation circuits 331 to 335 can invert the polarity of the data 381 to 385 within the horizontal scanning period, based on the polarity inversion signal (FR).
  • the outputs 381 to 385 of the grayscale signal generation circuits 331 to 335 are input to liquid crystal drive circuits 341 to 345.
  • These liquid crystal drive circuits 341 to 345 generate liquid crystal drive signals 391 to 395 (i.e., the column electrode signal Xm) of levels that are shifted from the grayscale signals 381 to 385 in accordance with a voltage level 362 (i.e., Va or -Va) that turns the liquid crystal on and a voltage level 363 (i.e., -Va or Va) that turns the liquid crystal off.
  • a voltage level 362 i.e., Va or -Va
  • a voltage level 363 i.e., -Va or Va
  • the X driver that outputs the column electrode signal Xm shown in FIG. 25 can be configured as shown in FIG. 37.
  • a bidirectional shift register 601, a first latch 602, a second latch 604, a decoder 605, a level shifter 607, and an LCD driver 608 correspond to the shift registers 301 to 305, the first memories 311 to 315, the second memories 321 to 325, the grayscale signal generation circuits 331 to 335, and the liquid crystal drive circuits 341 to 345, respectively, of FIG. 26.
  • an enable controller 600 controls the bidirectional shift register 601 and a data controller 604 at the timing of a signal such as the latch pulse LP, to implement the data transfer of FIG. 27.
  • the circuitry of FIG. 37 differs from that of FIG. 26 in that GCP is not a signal having a 2 M pulse width, it is a signal having a pulse at a 2 M th position in accordance with grayscale value, and in that the decoder 605 that inputs the GCP signal through a grayscale controller 606 detects data 371 to 375 output from the second latch 604 together with the GCP signal to generate the grayscale signals 381 to 385 shown in FIG. 28. Except for these points, the operation of the circuit of FIG. 37 is the same as that shown in the timing chart of FIG. 28.
  • the fourth embodiment of the present invention can easily generate the column electrode signal Xm that is configured by outputting a waveform which reflects the grayscale data twice in succession within one horizontal scanning period, using the relatively simple drive circuit shown in either FIG. 26 or FIG. 37. It can also shape the difference signal Xm - Yn of the column electrode signal Xm and the row electrode signal Yn (shown in FIG. 25) in such a manner that the period TonA for Von in the compensatory period TA is on the left of the compensatory period TA. Note that in this fourth embodiment too, the difference signal Xm - Yn shown in FIG. 25 divides the horizontal scanning period into two periods, TA and TB, and the initial-part and ending-part data is in a complementary relationship. This enables a reduction in afterimages caused by I-V characteristic shift in the non-linear elements, in the same way as in the third embodiment.
  • the drive circuit shown in FIG. 26 and used in this fourth embodiment is simple to construct, as can easily be understood by a comparison with the drive circuit of the third embodiment for generating the column electrode signal Xm shown in FIG. 23.
  • the waveform of the column electrode signal Xm used in the third embodiment is shown in FIG. 29A. It reflects the grayscale data, but it has also been made symmetrical about the boundary between the periods TA and TB.
  • An example of the configuration of the drive circuit for generating the waveform of FIG. 29A is shown in FIG. 29B. In this case, a comparatively large memory such as a first-in, first-out (FIFO) memory 501 is necessary.
  • the video signal that is the input signal to the FIFO memory 501 is shown in FIG.
  • the read clock of the FIFO memory 501 is set to be at twice the speed of the write clock thereof.
  • the output signal from the FIFO memory 501 has a timing that is delayed by half the horizontal scanning period with respect to the input signal shown in FIG. 29C, and the video signal of FIG. 29C is compressed to half along the time axis so that the same signal waveform is output twice in succession.
  • the output from the FIFO memory 501 is input to an X driver 503 via a signal processing circuit 502 that processes signal on the basis of an AC inversion signal FRX, so that the symmetrical pulse waveform shown in FIG. 29A can be output as the column electrode signal Xm.
  • a fifth embodiment of the present invention concerns an improvement which ensures that any noise caused by the difference signal Xm - Yn of the first to fourth embodiments (or rather, by the huge change in potential that occurs at the boundary between the periods TA and TB) does not appear on the liquid crystal panel 115.
  • the voltage experiences a huge shift from a negative potential to a positive one, as shown in FIG. 30. It is feared that this huge potential difference generated in the liquid crystal display device will be superimposed as noise in the video circuitry of the previous stage, and also in the tuner circuitry and antenna of earlier stages, and will eventually appear as noise on the liquid crystal screen. It is possible to remove this noise by providing an exclusion circuit in the video circuitry, for example, but this would make the structure complicated.
  • the fifth embodiment of the present invention solves this problem by placing the compensatory selection period TA of the difference signal Xm - Yn so that it is included within the flyback period of the video signal.
  • the video signal and the difference signal Xm - Yn are synchronized. Therefore, by making sure that the above equation is satisfied, the compensatory selection pulse (i.e., the compensatory selection period TA) within the difference signal can be set to substantially correspond to the flyback signal of the video signal along the time axis. Then, even if noise caused by the huge potential difference within the difference signal Xm - Yn is superimposed on the video signal, it is superimposed on the signal during the flyback period. The signal within this flyback period is not displayed on the liquid crystal screen, and thus it does not appear as noise on the liquid crystal screen.
  • the compensatory selection pulse i.e., the compensatory selection period TA
  • a sixth embodiment of the present invention concerns an improvement to the drive waveform of the column electrode signal Xm, whereby the voltages applied to the two ends of the non-linear element and the liquid crystal layer are made even larger during the compensatory selection than during the actual selection.
  • FIG. 31 An improved version of the column electrode signal Xm of FIG. 25, which shows the waveforms of the fourth embodiment, is shown in FIG. 31.
  • the reference potentials Vb and -Vb during the compensatory selection are set with respect to reference potentials Va and -Va of the column electrode signal Xm during the actual selection such that
  • the potential of the difference signal Xm - Yn during the compensatory selection is made relatively greater than that during the actual selection.
  • FIG. 32 improved versions of the column electrode signal Xm and row electrode signal Yn of FIG. 19, which shows the waveforms of the second embodiment, are shown in FIG. 32.
  • the reference potentials Vb and -Vb during the compensatory selection are set with respect to reference potentials Va and -Va of the column electrode signal Xm during the actual selection such that
  • the description based on FIG. 32 refers to white display (corresponding to the left-hand side of the figure). In order to show a white display by the pixels, the write potential is at a maximum of
  • the potential of the compensating voltage is
  • which is the minimum potential
  • FIG. 33 An example of the configuration of the drive circuit on the row electrode side is shown in FIG. 33.
  • the drive circuit is provided with a first power supply 701 for setting the reference voltage Va during the actual selection as the power voltage for the X driver 700, and a second power supply 702 for setting the reference voltage Vb during the compensatory selection.
  • the configuration is such that power is supplied to the X driver 700 by the switching of the two supplies by a switch 703 that operates based on the AC inversion signal FR.
  • the configuration could be such that relatively low voltages are supplied, such as about 5 V by the first power supply 701 and about 6 V by the second power supply 702.
  • the power supply voltage connected to the Y driver must be large. This is particularly necessary when an MIM element is used as the non-linear element, because an MIM element needs a much larger voltage such as 30 to 40 V, and setting an even larger voltage on top of that will increase the load. It is possible to enable a liquid crystal drive circuit that uses an MIM element to obtain such a large voltage as 30 to 40 V by swinging a lower voltage to generate a large voltage, but it is difficult to accurately generate the potential Vr for the complementary selection by a voltage swing with respect to the potential Vp necessary during the actual selection shown in FIG. 19.
  • an X driver that can set a difference signal which has a larger potential in the compensatory selection than that in the actual selection can be formed simply by adding a power source of a relatively low voltage, and thus is it possible to accurately set a high voltage, with a drive circuit of a simple configuration.
  • the first to sixth embodiments of the present invention have been described as having compensatory selection data in a period TA and actual selection data in a period TB, obtained by a difference signal Xm - Yn, which are in a mutually complementary relationship, but the present invention is not limited thereto.
  • the complementary relationship need not hold, so long as the relationship is such that, when the data write charge voltage that charges the liquid crystal layer 113 during the actual selection is large, the compensatory charge voltage applied to the liquid crystal layer 113 during the compensatory selection is small and, conversely, when the data write charge voltage is small, the compensatory charge voltage is large. So long as this relationship between the actual selection data and the compensatory selection data holds, the afterimage phenomenon can be controlled.
  • first to sixth embodiments of the present invention can also be carried out with polarity inversion techniques at every line that drive the device in such a manner that the polarity of the voltage charged into the liquid crystal layers of pixels in odd-numbered frames, for instance, is different from the polarity of the voltage that charges the liquid crystal layers of pixels in even-numbered frames.
  • FIG. 34 A plan view of the non-linear element (denoted by reference number 114 in FIG. 1 and FIG. 11) of one pixel in a liquid crystal panel that uses a seventh embodiment of the present invention is shown in FIG. 34.
  • an MIM element using tantalum-tantalum oxide-chromium as materials is used as the non-linear element
  • reference number 801 denotes a tantalum covered with tantalum oxide that also serves as a column electrode.
  • Reference number 802 denotes chromium patterns.
  • An MIM element is formed at an intersection between chromium patterns 802 and tantalum 801.
  • Reference number 803 denotes a transparent ITO pattern that forms a pixel electrode.
  • FIG. 35 is a cross-sectional view through the structure of the MIM element, taken along the dot-dash line 804 in FIG. 34.
  • Reference number 901 denotes a transparent substrate
  • reference number 902 denotes a tantalum portion
  • reference number 903 denotes a tantalum oxide portion.
  • a tantalum layer is formed on the transparent substrate by sputtering, and this layer is patterned to form a tantalum electrode that will be the column electrode.
  • This tantalum electrode is subjected to anodic oxidization to cover the surface thereof with tantalum oxide.
  • a diluted aqueous solution of phosphoric acid is used as the electrolyte for the anodic oxidization.
  • An oxide layer of a uniform thickness is obtained by initially controlling the current, then by applying a constant voltage. Subsequently, a chromium layer is sputtered and patterned, then ITO that is to form a transparent pixel electrode is also sputtered and patterned thereon. This enables the formation of an electrode substrate having MIM element.
  • a liquid crystal panel can be formed by pasting this substrate together with a substrate formed of a resistance electrode, with a liquid crystal inserted into a gap therebetween.
  • FIG. 36 is a graph of measurements done on the magnitude of afterimages in the present embodiment. These measurements were done after the window display of FIG. 8 had been left on the liquid crystal panel for a fixed time then the entire panel was switched to the uniform display shown in FIG. 9. This graph shows variations in brightness ratio for the points PI and P2 in FIG. 9.
  • a prior art drive method is defined as a
  • the drive method described as the third embodiment of the present invention is A
  • a device using a liquid crystal panel formed by a prior art anodic oxidization method is b
  • a device using a liquid crystal panel formed by the anodic oxidization method of the seventh embodiment is B
  • the change in brightness ratio obtained by a combination of a and b is shown as line 1, that for a and B is line 2, that for A and b is line 3, and that for A and B (completely in accordance with the present invention) is line 4.
  • the insulator layer that will become a non-linear resistance element by anodic oxidization using an electrolytic liquid that includes phosphorus, it is possible to greatly reduce the magnitude of the I-V characteristic shift in comparison with a prior art non-linear element. This phenomenon has been confirmed by experimental results, but the mechanism thereof has not yet been clarified. It is assumed that perhaps the inclusion of phosphorus in an oxide film stabilizes the ranking of impurities existing within the film, and thus the current flowing therethrough is also stabilized by the Poole-Frenkel effect or Schottky effect. Note that the insulator layer described above would have the same effect if it is the insulator layer of an MIS element. Note also that if one of the metal layers of an MIM element is formed as transparent electrode layer, it can also be used as a transparent electrode of the liquid crystal panel.

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  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
EP19940100380 1993-01-13 1994-01-12 Verfahren zur Steuerung einer Flüssigkristallanzeigevorrichtung Expired - Lifetime EP0607860B1 (de)

Applications Claiming Priority (10)

Application Number Priority Date Filing Date Title
JP4322/93 1993-01-13
JP432293 1993-01-13
JP12396493 1993-05-26
JP123964/93 1993-05-26
JP14777993 1993-06-18
JP147779/93 1993-06-18
JP149552/93 1993-06-21
JP14955293 1993-06-21
JP28778993A JP3482667B2 (ja) 1993-01-13 1993-10-23 液晶表示装置の駆動方法及び液晶表示装置
JP287789/93 1993-10-23

Publications (2)

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EP0607860A1 true EP0607860A1 (de) 1994-07-27
EP0607860B1 EP0607860B1 (de) 1998-12-16

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Publication number Priority date Publication date Assignee Title
WO1995026544A1 (en) * 1994-03-23 1995-10-05 Philips Electronics N.V. Display device
EP0692779A3 (de) * 1994-07-15 1996-04-03 Sharp Kk Verfahren zur Steuerung einer Anzeigetafel
WO1997012355A1 (en) * 1995-09-25 1997-04-03 Philips Electronics N.V. Display device
EP1093654A1 (de) * 1998-05-08 2001-04-25 Aurora Systems, Inc. Verfahren zum modulieren einer multiplex-pixel-anzeige
CN107799051A (zh) * 2016-09-06 2018-03-13 三星显示有限公司 显示装置以及用于使用该显示装置显示图像的方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3281298B2 (ja) 1997-09-22 2002-05-13 シャープ株式会社 液晶表示素子の駆動装置

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EP0367531A2 (de) * 1988-11-01 1990-05-09 Sharp Kabushiki Kaisha Verfahren zur Steuerung einer ferroelektrischen Flüssigkristallanzeigetafel
JPH03166514A (ja) * 1989-11-24 1991-07-18 Toppan Printing Co Ltd 液晶表示装置
EP0508628A2 (de) * 1991-03-20 1992-10-14 Seiko Epson Corporation Verfahren zum Treiben einer Flüssigkristallanzeige vom Aktivmatrixtyp

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EP0367531A2 (de) * 1988-11-01 1990-05-09 Sharp Kabushiki Kaisha Verfahren zur Steuerung einer ferroelektrischen Flüssigkristallanzeigetafel
JPH03166514A (ja) * 1989-11-24 1991-07-18 Toppan Printing Co Ltd 液晶表示装置
EP0508628A2 (de) * 1991-03-20 1992-10-14 Seiko Epson Corporation Verfahren zum Treiben einer Flüssigkristallanzeige vom Aktivmatrixtyp

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PATENT ABSTRACTS OF JAPAN vol. 015, no. 410 (P - 1264) 18 October 1991 (1991-10-18) *
S. TOGASHI: "Two-terminal device addressed LCD", OPTOELECTRONICS DEVICES AND TECHNOLOGIES, vol. 7, no. 2, December 1992 (1992-12-01), TOKYO JP, pages 271 - 286, XP000336430 *

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995026544A1 (en) * 1994-03-23 1995-10-05 Philips Electronics N.V. Display device
EP0692779A3 (de) * 1994-07-15 1996-04-03 Sharp Kk Verfahren zur Steuerung einer Anzeigetafel
US5760758A (en) * 1994-07-15 1998-06-02 Sharp Kabushiki Kaisha Method of driving display device
WO1997012355A1 (en) * 1995-09-25 1997-04-03 Philips Electronics N.V. Display device
US5905484A (en) * 1995-09-25 1999-05-18 U.S. Philips Corporation Liquid crystal display device with control circuit
EP1093654A1 (de) * 1998-05-08 2001-04-25 Aurora Systems, Inc. Verfahren zum modulieren einer multiplex-pixel-anzeige
EP1093654A4 (de) * 1998-05-08 2007-10-31 Aurora Sys Inc Verfahren zum modulieren einer multiplex-pixel-anzeige
US8344980B2 (en) 1998-05-08 2013-01-01 Omnivision Technologies, Inc. Display with multiplexed pixels and driving methods
CN107799051A (zh) * 2016-09-06 2018-03-13 三星显示有限公司 显示装置以及用于使用该显示装置显示图像的方法

Also Published As

Publication number Publication date
DE69415181D1 (de) 1999-01-28
EP0607860B1 (de) 1998-12-16
DE69415181T2 (de) 1999-06-24
JPH0772457A (ja) 1995-03-17
JP3482667B2 (ja) 2003-12-22

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