EP0599391A2 - Système de communication à spectre étalé - Google Patents

Système de communication à spectre étalé Download PDF

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Publication number
EP0599391A2
EP0599391A2 EP93203204A EP93203204A EP0599391A2 EP 0599391 A2 EP0599391 A2 EP 0599391A2 EP 93203204 A EP93203204 A EP 93203204A EP 93203204 A EP93203204 A EP 93203204A EP 0599391 A2 EP0599391 A2 EP 0599391A2
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Prior art keywords
correlation
signals
data
signal
receiver
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EP93203204A
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German (de)
English (en)
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EP0599391A3 (fr
Inventor
Ralph W. Schoolcraft
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Magnavox Electronic Systems Co
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Magnavox Electronic Systems Co
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation

Definitions

  • the present invention is related to a transmission system comprising a transmitter for applying a pseudo-noise (PN) modulated signal to a transmission channel and a receiver for receiving said pseudo-noise modulated signal from the channel, said receiver comprising correlation means, for correlating digitized samples of the received signal with locally generated PN code sequences.
  • PN pseudo-noise
  • the invention is also related to a receiver for use in such a transmission system.
  • a transmissiuon system according to the preamble is known from the book “Mobile Radio Communications” by Raymond Steele, published by Pentech Press Publishers London, pp. 45-51.
  • Digital modulation techniques for communication are well known, and include phase shift keying (PSK), where a constant amplitude carrier signal is selectively reversed in phase to indicate a binary change of state of a data signal.
  • PSK phase shift keying
  • QPSK quadriphase phase shift keying
  • the modulated carrier can assume any of four phase states, as determined by pairs of data bits.
  • a modulated carrier signal may also be subject to spread spectrum modulation.
  • a spread spectrum signal is, as the name implies, spread over a wide bandwidth and is relatively immune to eavesdropping and jamming.
  • a technique uses a pseudo-random (PN) code sequence to obtain the desired spectral spreading.
  • PN sequence is binary sequence that repeats itself after a large number cycles. Thus the binary numbers in the sequence are not truly random, but if the repetition cycle of the sequence is long enough its spectrum shares many of the properties of random electromagnetic noise.
  • PN modulation may be effected by simply passing the data stream and the PN code sequence through an exclusive OR gate, to achieve PSK modulation of the data onto the PN code.
  • Data bits are either inverted or not, depending on the presence or absence of a logical "1" bit in the PN code.
  • the data symbol rate is typically many times slower than the PN code rate (referred to as the PN "chip" rate).
  • the resulting digital data stream is a PN code modulated by the slower data symbol stream, and is used to modulate a carrier signal in accordance with a digital modulation technique, such as QPSK, and the modulated carrier is transmitted.
  • the present invention is concerned with systems of this general type, and particularly with such systems in which there may be multiple transmission paths between a transmitter and a receiver.
  • Receiving and demodulating signals that have been subject to PN modulation requires that the same PN code sequence be generated in the receiver, and correlated with received signals to extract the data modulation.
  • One type of correlation technique employs a digital matched filter to compare the received digital signal with the locally generated version of the PN code.
  • the digital filter produces an in-phase (I) signal and a quadrature (Q) signal from which a digital demodulator (such as a DPSK demodulator) can derive data values.
  • Another function of the digital matched filter is to produce correlation measurements from which synchronization (sync) signals can be generated and used to handle multipath components in the received data signals.
  • Multipath components arise in rf communication systems of various types when a receiving antenna detects signals arriving non-simultaneously over different paths. Multiple transmission paths may result from various causes, such as from atmospheric effects, or reflections from buildings or geographical features. In any event, a transmitted signal may produce multiple received signals of different strength.
  • multipath errors are resolved in a PN correlator by selecting one or two correlation measurements having the highest signal strength, and using only these measurements during subsequent signal processing in which data demodulation is completed. For example, a PN correlator may generate an output spanning a few microseconds, long enough to produce multiple correlation output peaks resulting from multipath errors.
  • a single correlation peak value is detected in a sync detector, which integrates over a suitably large number of symbols, and a time epoch associated with the detected correlation peak is used to control input to a data demodulator.
  • a practical characteristic of transmissions involving multipath errors is that the multipath conditions may vary rapidly with time, especially if the transmitter or receiver, or both, are in motion, or if a source of multipath reflections is in motion. Therefore, a path that provides the maximum signal strength at a receiver at one instant in time may fade or disappear in the next instant, to be replaced by other signal paths providing different signal strengths. This effect leads to a detoriated performance of the known transmission system.
  • An object of the invention is to provide a transmission system according to the preamble having an improved performance with respect to the known transmission system.
  • the transmission system according to the invention is characterised in that said receiver comprises means to obtain correlation measurements over a plurality of consecutive time bins, demodulation means for demodulating the received signal to obtain potential baseband data relating to all of the time bins, and signal combining means, for combining usable baseband data components in proportion to their relative signal strengths.
  • the autocorrelation function of the input signal is determined, and peaks in this autocorrelation function relating to multipath components are identified. Demodulated signals corresponding to said identified multipath components are then combined to obtain a combined base band signal. The resulting simultaneous use of multipath signal components improves the overall signal quality and assures continuity of data reception in a dynamic multipath transmission medium.
  • data symbols to be derived from the received signals may change state at a data symbol rate, and each received symbol persists for a data symbol interval.
  • the correlating step operates on successive segments of the received signal, and there is an integral number of segments in each data symbol interval. More specifically, the correlating step includes correlating a first segment of locally generated PN code with a moving segment of the received signal, to obtain a first set of correlation measurements over multiple time bins relating to the signal segment, correlating successive subsequent segments of the locally generated PN code with successive moving segments of the received signal, to obtain multiple sets of correlation measurements similar to the first set, and integrating the first and successive sets of correlation measurements over all of the segments in each data symbol interval.
  • the correlation process yields a set of correlation measurements, such as sixty-four measurements, integrated over all segments in the symbol interval.
  • there are sixteen segments in each symbol interval although this is not a critical limitation.
  • the multiple correlation measurements may be taken over successive time segments and then integrated over complete data symbol time intervals, to obtain multiple coherently integrated correlation measurements for each symbol time interval.
  • data demodulation is performed for all of the time "bins," and then resulting multipath signal components are selected, based on the times of occurrence of peaks in the correlation measurements.
  • the selected data values of the multipath components are then combined by weighting them in accordance with their signal strengths.
  • the correlating step further comprises the steps of generating from the correlation measurements a set of in-phase (I) and quadrature (Q) signals for each data symbol interval; and generating from the I and Q signals a set of correlation magnitude signals approximately proportional to (1 2 +Q 2 ), for each data symbol interval.
  • the method further comprises the steps of integrating the correlation magnitude signals over a selected number of data symbol intervals; detecting peaks in the integrated correlation magnitude signals; and generating from the detected peaks, sync signals indicative of the relative times of arrival associated with the multipath components.
  • the step of demodulating the received signals includes deriving multiple data values from the I and Q signals obtained for each data symbol interval, the multiple data values being associated with the times of arrival of multipath components.
  • the step of combining the usable baseband data components in proportion to their relative signal strengths includes accumulating selected ones of the multipath data values, under control of the generated sync signals, whereby the selected multipath data values are accumulated only if they correspond in time to significant correlation measurements.
  • a number of aspects of the manner in which receiver functions are implemented contribute to the desirable simplicity of the implementation, which can then be conveniently reduced in size and cost.
  • One of these aspects involves the step of generating sets of correlation magnitude signals approximately proportional to (1 2 + Q 2 ).
  • this step includes determining the magnitudes of the I and Q signals, without regard to sign, and adding the magnitudes of the I and Q signals.
  • the present invention represents a significant advance in the field of digital communication using PN modulation.
  • the invention provides a novel technique for handling multipath transmissions, wherein correlation measurements are maintained over multiple time bins and data demodulation is also performed over multiple time bins, to yield multiple data values that can be conveniently filtered and combined in accordance with their relative multipath signal strengths.
  • PN modulation has been used in data transmission to spread the spectrum of the transmitted signals over a wide bandwidth. Spectral spreading of the signals makes them more immune to eavesdropping and accidental or deliberate interference.
  • a disadvantage of PN modulation is that demodulation equipment required in a receiver tends to be complex and bulky unless design compromises are made. One such compromise relates to the manner in which multipath signals are handled. Multipath transmissions arrive at the receiver at slightly different times and PN demodulation requires complex circuitry if all potential signal paths are to be considered throughout the PN demodulation and data demodulation process.
  • the received PN signals are correlated with a locally generated PN code sequence and, if multiple correlation peaks are detected, the strongest is selected as a time reference for use in data demodulation.
  • This approach reduces the complexity of receiver circuitry, but at the expense of possible loss of data if the selected correlation peak is replaced by another one resulting from a different transmission path.
  • FIGS 1 and 2 depict a transmitter and receiver, respectively, using phase shift keying (PSK) data modulation and quadriphase phase shift keying (QPSK) PN modulation.
  • PSK phase shift keying
  • QPSK quadriphase phase shift keying
  • the function of the transmitter ( Figure 1) is to convert a data stream, received over line 10, to a modulated radio-frequency (rf) signal for transmission from an antenna 12.
  • the data signals are shown as being input to a buffer 14 in which a slow PN code may be added, but this has no direct relevance to the present invention.
  • Slow PN coding may be employed to facilitate acquisition of the signal at the receiver, but in the description of the receiver that follows it will be assumed that acquisition has been achieved.
  • the data then passes into a quadriphase modulator 16 in which two types of modulation take place.
  • a timing synthesizer 18, driven by a crystal oscillator 20, generates local oscillator (LO) signals which form the carrier signal to be transmitted.
  • LO local oscillator
  • phase of the carrier signal is modulated in accordance with the state of the data signals, and can assume one of two phase states.
  • QPSK PN modulation is performed by changing the phase of the carrier signal in accordance with the state of two PN binary sequences, generated in a PN coder 22.
  • QPSK PN modulation means that the phase of the carrier can assume any of four phase states as a function of the two PN code sequences.
  • the present implementation uses staggered or offset QPSK (referred to as SQPSK or OQPSK), in which one of the code sequences is delayed by half of a "chip" interval.
  • the PN code rate is faster than the data rate by some fairly large factor, such as 512, so that there will be 512 potential changes of the PN sequence during the time that one data symbol is presented.
  • the PN code bits are referred to as "chips" and, in this example, there are 512 chips of PN code for each symbol time interval.
  • the data modulated and PN modulated carrier signal is next processed by an up/down converter 24, the purpose of which is simply to change the frequency to a convenient one for transmission from the antenna 12.
  • a power amplifier 26 may also be interposed between the up/down converter 24 and the antenna 12.
  • the power amplifier 26, together with the PN coder 22 and the timing synthesizer 18, may be controlled by common line 28.
  • the control line 28 may be connected to a push-to-talk switch on a microphone (not shown).
  • the transmitter also includes a clock counter 30 that receives clock signals from the timing synthesizer and generates timing signals for the PN coder 22 and other components of the transmitter. It will be appreciated that certain types of data may require other processing functions. For example, voice data will need to be digitized before modulation. However, the present invention pertains to any type of digital data transmission using PN modulation.
  • the receiver ( Figure 2) also includes an antenna 12', a crystal oscillator 20' and a timing synthesizer 18'. Although these are shown as independent of the corresponding components in the transmitter, it will be understood that, in a practical embodiment, the components would be shared by the transmit and receive functions.
  • the receiver includes a clock counter 30' and a PN coder 22'. PN-modulated signals received through the antenna 12' are first down-converted and subjected to intermediate-frequency amplification, as shown in block 32. Output signals from this stage of the receiver are in-phase (I) and quadrature (Q) components of the received signal, also referred to as cosine signal samples and sine signal samples.
  • a 512-chip correlator 34 which also receives locally generated PN code sequences, referred to as A and B codes, from the PN coder 22'.
  • the 512-chip correlator generates outputs of two types: two signals representative of the I and Q component samples of the received signal, still data modulated, and an amplitude signal representative of the instantaneous amplitude of the received signal and proportional to (1 2 + Q 2 ).
  • the latter signal is input to a sync detector 36, which generates timing signals indicative to the relative times of occurrence of correlation peaks detected by the correlator 34.
  • the I and Q signals are passed to a DPSK demodulator 38. Based on successive input values of I and Q, the demodulator 38 regenerates a data stream, some of which may contain values equivalent to received electromagnetic noise.
  • the data values emerging from the data demodulator 38 are subject to filtering by a sync signal generated by the sync detector 36.
  • the sync detector 36 would generate a sync signal related to a single selected correlation peak, ignoring possible other multipath peaks, and the combiner 40 could more properly be referred to as a multipath selector.
  • selected data signals may be stored temporarily in a buffer 42, before being transmitted over data line 44.
  • Figure 3 shows the 512-chip correlator 34 in more detail.
  • the sine and cosine signals are input to analog-to-digital (A/D) converters 50 and 50', which are driven by a clock signal at a rate twice the PN chip rate and produces two digital data streams at the same rate, for input to respective correlators, referred to as 64x11 correlators 52 and 52'.
  • A/D analog-to-digital
  • the receiver may have to employ a conventional technique such as phase dithering of the sampling clock to effectively eliminate the interference, or the correlation process may have to be "deepened" to include A/D samples of 3 or 4 bits instead of just the most significant bit.
  • correlator 52 Also input to the correlators 52, 52' at the same rate is a stream of locally generated PN codes, over line 54, a symbol clock rate signal, on line 56, and a clock at twice the chip rate, on line 57.
  • correlator 52 generates a pair of signals proportional to A cos 0 and B sin 0, respectively, where A and B are constants and 0 is the phase angle.
  • correlator 52' generates a pair of signals proportional to -A sin 0 and B cos 0, respectively.
  • the cosine components are added in an adder circuit 58, to produce an output signal proportional to Q on line 60.
  • the sine components are added in another adder circuit 58', to produce an output signal proportional to I on line 60'.
  • the required signal proportional to 1 2 + Q 2 is generated in accordance with an approximation, by taking the magnitude of the Q component, using circuit 62, and the magnitude of the I component, using circuit 62'; then combining these two magnitudes in another adder circuit 64, to produce the approximated 1 2 + Q 2 signal on line 66.
  • the two 64x11 correlators 52, 52' are identical in structure.
  • One of these correlators is illustrated in Figure 4, and includes a first 64-bit shift register 70 into which the sine or cosine samples are serially shifted, and a second 64-bit shift register 72 into which the two PN code sequences (A and B) are serially shifted.
  • the A and B PN code sequences are supplied to the shift register 72 in interlaced form, i.e. as alternating A and B codes. Both the interlaced PN codes and the signal samples are clocked into their respective registers 72, 70, at twice the code chip rate.
  • register 72 is filled with a new set of sixty-four code bits, the entire register is copied in parallel to a 64-bit feed register 74. This parallel transfer takes place every sixty-four half-chip cycles, i.e. at 1/32 of the chip rate.
  • Correlation also occurs at twice the chip rate, and involves a bit-by-bit comparison of the codes held stationary in register 74 and the input sample bits being shifted through register 70.
  • the odd-numbered bits in register 70 are compared with the A-code bits in register 74, using exclusive OR gates 76, which function as modulo-two correlators. That is to say, when the inputs are the same the output will be logical "0" and when the inputs are different the output will be a logical "1.”
  • the even-numbered bits in register 70 are compared with the B-code bits in register 74, using another set of exclusive OR gates 76'.
  • Each of the exclusive OR gates 76, 76' provides a one-bit match signal.
  • the outputs of the upper set of exclusive OR gates 76 are combined in a summation circuit 80, and the outputs of the lower set of exclusive OR gates 76' are combined in another summation circuit 80'. Because there are thirty-two inputs to each of the summation circuits 80 and 80', the output of each is a quantity in the range 0-32, which requires a five-bit output line from each of the summation circuits.
  • the remaining portion of the correlator performs a coherent integration function, and includes two adder circuits 82, 82', and two 64x11 shift registers 84, 84'.
  • the term "64x11” means that each of the shift registers 84, 84' has sixty-four stages or positions, and that each stage is eleven bits "wide". Thus the digital quantities shifted through the registers may be up to eleven bits long.
  • the output of each shift register 84, 84' is fed back over line 86, 86' as an input to the corresponding adder circuit 82, 82'.
  • the other inputs for the adders 82, 82' are derived from the summation circuits 80, 80', respectively.
  • Figure 8 helps provide an intuitive understanding of how the correlator of Figure 4 operates.
  • the shift registers 84, 84' are cleared, as indicated by the symbol clock signal on line 86.
  • the registers 84, 84' contain a set of sixty-four time-spaced accumulations from the summation circuits 80, 80'.
  • the time interval spanning sixty-four half-chip cycles, or thirty-two chips, is referred to as a time "segment.”
  • the shift registers 84, 84' contain digital quantities indicative of an accumulation of correlation results over all of the segments in the symbol interval processed up to that point.
  • the shift registers 84, 84' contain quantities indicative of the accumulated correlation results over all sixteen segments in the symbol interval.
  • the first "trace” of Figure 8 is an analog equivalent of these accumulated correlation results taken over sixteen segments. Each "point” in the trace represents an accumulation of sixteen sets of thirty-two correlation bits from the exclusive OR gates 76. It will be understood, however, that there is no real analog implementation corresponding to Figure 8, which is solely for purposes of explanation.
  • the accumulated correlation results in the shift registers 84, 84' are shifted out of the registers at the end of each symbol interval, for further processing.
  • This step may be accomplished by means of a "symbol modulo-16" clock signal, as shown in line 88, and a pair of multibit-wide AND gates 90, 90'.
  • the timing signal on line 88 provides an enabling signal to the AND gates only during the sixteenth and last segment of the symbol interval. Therefore, during the last segment of each symbol interval, the accumulated correlation results for that interval are gated out of the shift registers 84, 84', as well as being fed back to the adder circuits 82, 82'.
  • the accumulated correlation results are gated from the outputs of the adders 82, 82' at the end of the symbol time interval.
  • the sync detector includes an adder circuit 92, a 64-position shift register 94, a threshold compare circuit 96, and a feedback multiplier circuit 98.
  • the 1 2 + Q 2 signal on line 66 appears as a burst of sixty-four digital quantities, at the half-chip cycle rate, and in the last segment of each data symbol interval. These digital quantities are input to the adder circuit 96, the output of which feeds into the first position of the 64-position shift register 94. The last position of the register 94 feeds back to the adder circuit, through the feedback multiplier 98, and also supplies output to the threshold compare circuit 96. After the first burst of input quantities, the shift register 94 is filled with these quantities.
  • the register contains an accumulated set of data quantities. Operation of the adder circuit 92 and shift register 94 is similar to that of the 64x11 comparator, except that the multiplier 98 gives less weight to the accumulated totals than to the newly arriving values. In the presently preferred embodiment, the multiplier has a value less than unity and equal to the fraction 31/32.
  • the accumulated data quantities are gated through the threshold compare circuit 96, using a gating arrangement similar to the AND gate 90 in Figure 4, but with a timing signal that enables the gate only during the 30th data burst.
  • the accumulated data values for thirty consecutive symbols are shown by way of example in the last trace of Figure 8, in which the broken line indicates the preselected threshold imposed by the threshold compare circuit 96. What appears at the output of the threshold compare circuit 96, on line 100, is a filtered set of sync signals, corresponding only to the correlation peaks above the preselected threshold. The timing of each sync signal is indicative of a separate transmission medium multipath, and is used to select meaningful data from the data demodulation process that is performed in parallel with sync detection.
  • Data demodulation is performed using a digital implementation of a DPSK demodulator circuit 110 ( Figure 6).
  • the Q and I data quantities input on lines 60 and 60' are input to two 64-position shift registers 112, 112', clocked by bursts of timing signals at the half-chip rate, as indicated by line 114.
  • the output of each register 112, 112' is connected to a multiplier circuit 116, 116', the other input of which is derived from the Q and I input lines 60, 60'.
  • each input quantity is multiplied by its counterpart in the previous burst of inputs, i.e. associated with the previous data symbol.
  • the outputs of the multipliers are added together in an adder circuit 118.
  • the multipliers 116, 116' and the adder 118 together perform a running dot product of the two digital representations of I and Q, in accordance with the formula:
  • the final step in demodulation is to input the data values on line 120 to a gated accumulator 122, which is initially cleared by the symbol clock signal, on line 124, and is gated to receive and accumulate data only upon the occurrence of sync signals on line 100.
  • the gated accumulator gives each data value a weight corresponding to the amplitude of the signal received over a particular path.
  • the gated accumulator contains a value indicative of the data value for symbol, as derived from possible multiple signal paths. This can be converted to a binary quantity, or the data value may be used in a "soft decoding" scheme of some kind.
  • FIGS. 7A-7F depict some illustrative code waveforms and corresponding vector representations that may be helpful in understanding operation of the PN correlation process.
  • FIGS. 7A and 7B are illustrative A and B PN codes, which, it will be observed, can change state at a rate corresponding to the chip rate. Also, the B code transition times are offset from the A code transition times by one half-chip interval to achieve the phase stagger or offset required in staggered or offset QPSK (SQPSK or OQPSK).
  • Figure 7C shows the vector representation of the transmitted OQPSK signals corresponding to the A and B codes in FIGS. 7A and 7B. It will be seen that there are four phase states corresponding to the four possible combinations of the A and B code states.
  • FIGS. 7E and 7F show the correlator A products and correlator B products in vector representation.
  • An important aspect of the invention is that correlation measurements are maintained in multiple (in this case sixty-four) time bins that can indicate some degree of correlation with signals received over more than one signal path to the receiver. Further, these measurements are maintained separately, but filtered using a threshold as desired, and used to make the best determination of a data value for each received symbol.
  • the principal advantages of the technique of the invention are that multipath signals can be combined to provide a higher quality indication of data, and continuity of communication is assured because signals received over multiple paths are always being processed, rather than selectively discarded.
  • the present invention represents a significant advance in the field of data communications using PN modulation.
  • the PN correlation technique of the invention provides a measure of correlation for possible multiple signal paths, and these measures of correlation can be used to combine multipath data signals to provide higher quality and more reliable data communication.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Noise Elimination (AREA)
  • Mobile Radio Communication Systems (AREA)
EP93203204A 1992-11-20 1993-11-16 Système de communication à spectre étalé. Withdrawn EP0599391A3 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/979,123 US5237587A (en) 1992-11-20 1992-11-20 Pseudo-noise modem and related digital correlation method
US979123 1992-11-20

Publications (2)

Publication Number Publication Date
EP0599391A2 true EP0599391A2 (fr) 1994-06-01
EP0599391A3 EP0599391A3 (fr) 1994-12-14

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US (1) US5237587A (fr)
EP (1) EP0599391A3 (fr)
JP (1) JPH06296171A (fr)
KR (1) KR940012875A (fr)
CN (1) CN1073319C (fr)
AU (2) AU5181293A (fr)
CA (1) CA2103305C (fr)

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CA2103305A1 (fr) 1994-05-21
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AU5181193A (en) 1994-06-02
CA2103305C (fr) 2004-01-06
AU672443B2 (en) 1996-10-03
US5237587A (en) 1993-08-17
CN1103222A (zh) 1995-05-31
KR940012875A (ko) 1994-06-24

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