EP0493215A1 - Verteilte Rechnerarchitektur die ein CSMA/CD ähnliches locales Netwerk benutzt - Google Patents

Verteilte Rechnerarchitektur die ein CSMA/CD ähnliches locales Netwerk benutzt Download PDF

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Publication number
EP0493215A1
EP0493215A1 EP91403468A EP91403468A EP0493215A1 EP 0493215 A1 EP0493215 A1 EP 0493215A1 EP 91403468 A EP91403468 A EP 91403468A EP 91403468 A EP91403468 A EP 91403468A EP 0493215 A1 EP0493215 A1 EP 0493215A1
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European Patent Office
Prior art keywords
adapter
network
server
frames
memory
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EP91403468A
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English (en)
French (fr)
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EP0493215B1 (de
Inventor
Rémy Le Gallo
Bernard Malgogne
Gérard Lyvet
Josué Bonifas
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Bull SAS
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Bull SAS
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass

Definitions

  • the present invention relates to a distributed computer architecture using a local area network of the carrier test and collision detection access method type, a network frequently designated by its acronym CSMA / CD. It is more particularly applicable to local networks of the ETHERNET or CHEAPERNET type. These will be designated, in the following text under the global name of ETHERNET networks.
  • Communication networks are constituted by a plurality of units, generally called "terminal data processing equipment", for short, DTE (Data Terminal Equipment, in English, for short, DTE). They are also called terminals or stations for convenience of language.
  • DTE Data Terminal Equipment
  • a computer connected to a network is considered a terminal.
  • the terminals communicate with each other via a transmission medium which can for example be a coaxial cable, in the case of ETHERNET networks.
  • a message consists of a set of elementary information blocks comprising a determined number of binary information. These blocks are also called frames. Each frame is structured and includes information defining the start and the end thereof, the address of the terminal for which the message is intended, the address of the sending terminal, the length of the data, the useful data, etc.
  • Local area networks are networks limited to one geographic location of restricted area, the distances between the different stations being of the order of a few meters to tens of meters, or even up to a few kilometers.
  • Local networks of the CSMA / CD type are of frequent use in current practice. They are standardized by the IEEE Committee of the Institute of Electrical and Electronic Engineers, in the form of a so-called 802.3 standard (taken up by the ISO, International Organization for Standardization, in the form of ISO 8 802.3).
  • This standard defines a certain number of provisions establishing the mode of communication between the different terminals, as well as the format of the frames and the protocol governing the dialogue between the different stations. It is recalled that a protocol defines the rules for access to the different stations.
  • ETHERNET networks have a data transmission rate of 10 Mbits / s, and their standardized transmission medium is a coaxial cable with characteristic impedance 50 Ohms.
  • a computer consists on the one hand, of one or more central processors, input / output processors, random access memories and read only memories associated with all of these processors, input controllers / output, on the other hand from various peripheral organs such as disk memories or input / output peripherals allowing the exchange of data with the outside (screen terminals, printers, etc.), these peripheral organs being associated to peripheral controllers.
  • All of the aforementioned constituent elements are arranged on a set of cards (boards in English) whose dimensions are standardized.
  • These cards are generally connected to the same parallel type bus which provides communications between the various processors and the transport of data between the various cards as well as the power supply thereof.
  • a bus commonly used in current practice is the bus called MULTIBUS II, the mark of which is registered by the Company INTEL.
  • the architecture of such a bus is structured around a main bus of parallel type standardized according to the IEEE 1296 standard.
  • Such software which can be called communication software, is for example software called CNS used in the products of the DN-7XXX series of the Company BULL SA, and also in the products CNS-A0 and CNS-A1 of the series of computers DPS-7000 of the same Company.
  • I / O devices are synchronous or asynchronous terminals communicating with their external environment via transmission lines having bit rates ranging from 300 bits / s to 64 kbits / s.
  • These input / output terminals of a computer communicate with the outside via a wide variety of devices called Modem (contraction of the two words modulator-demodulator) whose function is to adapt the electrical signal delivered by the input / output terminal to the transmission medium which connects the terminal to its external environment.
  • Modem extension of the two words modulator-demodulator
  • Modems are for example defined by notices V-24, V-28, V-11, V-35, V-36 of the CCITT (International Telegraph and Telephone Consultative Committee). These different opinions also define the modes of transmission and the protocols on the corresponding transmission links. These are physically supported by transmission media which in fact have as many separate cables or sets of wires.
  • the communication server is then connected to the different terminals by means of a plurality of adapters whose function is to adapt the transmission speed and the transmission protocol of the ETHERNET network to the speeds and protocols used on the different lines. specific to each input / output terminal.
  • a plurality of adapters can be grouped together in the same geographic space constituted, for example, by a backplane containing several of them, for example fifteen, or even more.
  • a computer system can also be constituted by a set of servers of communication.
  • a group of adapters is called an adapter system.
  • the distributed computing architecture comprising a plurality of computer systems each connected via communication servers to a plurality of communication networks of various types, is characterized in that each system is connected to a plurality of synchronous or asynchronous terminals via at least one CSMA / CD type network and terminal adapter which can form at least one adapter system, each of which is connected on the one hand to the network and on the other hand to the at least one synchronous or asynchronous transmission link to at least one terminal, each communication server managing and transferring the frames from at least one computer system to the network and a plurality of adapters and vice versa, each adapter managing and performing the transfer frames from the network to the associated terminal (s) and vice versa by carrying out the adaptation of he protocols and transmission rates used respectively on the network and on the transmission line.
  • FIG. 1 which shows a distributed computing architecture ARCH comprising on the one hand a plurality of computer systems SI, SI1, SI2, ...., SI i , a plurality of server computer systems SIS, SIS1, .... SIS j , all part of an ETHERNET RE network, the transmission medium of which consists of a CX coaxial cable.
  • the ARCH architecture also includes a plurality of adapter systems, such as the SAD system connected via the coaxial cable CX1 to the computer system SI or the SAD adapter system j connected via the coaxial cable CX2 to the computer system SIS server j .
  • the IT systems SI1, SI2 can be linked respectively to the adapter systems SAD1, SAD2, the system SI i to the adapter system SAD i , etc.
  • the IT systems SI, SI1 ... SI i have a similar structure.
  • the system SI comprises an computer ORD and a communication server SERV
  • the computer system SI i likewise comprising a computer ORD i and a communication server SERV i .
  • the SAD, .... SAD j adapter systems all have a similar structure.
  • the SAD adapter system comprises a plurality of terminal adapters (AD, AD1 .... AD m ”) while the SAD j adapter system comprises terminal adapters (AD j1 ... AD jm ).
  • Each adapter AD, ... AD m , AD j1 ..., AD jm is associated with a plurality of synchronous input / output terminals or asynchronous, 3 in the preferred embodiment of the invention.
  • the SERV server can be, as required, that is to say according to the number of synchronous or asynchronous terminals connected to it, associated with other adapter systems than SAD, for example in particular the adapter system SAD k represents Figure 1. It is obvious that it can be the same for the server computer system SIS j which can be connected to other adapter systems than the system SAD j , according to the number of input / output terminals to which this server computer system is connected.
  • the latter shows the computer system SI which comprises at least one computer ORD connected on the one hand via the server SERV to the network ETHERNET RE and to the adapter system SAD and on the other hand for example to a set of networks of different type , (other than of ETHERNET type) namely RE1, RE2, .... RE k , via a plurality of links of different type.
  • the SERV server manages and transfers the frames sent by the ORD computer to the networks and vice versa.
  • the SERV server as a whole, is here considered as a terminal of the network RE, communicating with the other terminals SERV1, .... SERV j ...., SIS j , .... SAD.
  • the ORD computer can be connected either directly to the PSB bus, for example via an MPC 82389 coprocessor (manufactured by the company INTEL), or preferably, via a central communication coupler (CCC ), especially in the case where several computers other than ORD (not shown to simplify in Figure 2) are connected to the SERV server (CCC is shown in dashed lines in Figure 2).
  • CCC central communication coupler
  • the coupler CCC has a structure similar to CCS and is therefore connected to ORD via its peripheral part (see below).
  • the SAD adapter system includes, as has been said above, terminal adapters AD, AD1, AD2, AD3 ... AD m .
  • the AD adapter is associated with the synchronous or asynchronous input / output terminals T1, T2, T3, while the ADm adapter is associated with the input / output terminals T m1 , T m2 and T m3 .
  • the set of adapters AD, ... AD m of the SAD adapter system is preferably placed in the same physical location, constituted for example by a basket comprising a copper bus of the ETHERNET or CHEAPERNET type, namely BCE (BCEj for SADj) .
  • BCE BCEj for SADj
  • Each of the adapters of the SAD system is connected to this BCE bus.
  • the latter is also connected to the connection cable CX1.
  • Frames from the computer ORD intended for the network RE arrive via PSB at the communication controller CCS.
  • the latter divides each of these into a plurality of data packets (the English term corresponding to "data packet” is "buffer”; either of these terms will be used interchangeably in the rest of the text), forms from these buffers a plurality of ETHERNET type frames, manages and transfers these either to the SAD adapter system or to the other terminals of the RE network.
  • it receives the ETHERNET frames coming either from the SAD system or from the other network terminals RE, divides them into a plurality of buffers and from these forms frames intended for the computer ORD. It manages and transfers these from the RE network to the ORD computer.
  • each adapter receives the ETHERNET frames from the SERV server via the CX1 cable, stores them, and forms frames whose format is specific to each of the input / output terminals for which it is associated. It then transfers these frames thus formed to each of these terminals.
  • it transforms ETHERNET type frames into frames specific to each of the input / output terminals by adapting the protocol and the transmission rate specific to the ETHERNET network to the protocol and the transmission rate specific to specific links of these same terminals.
  • the same work is carried out in the other direction, that is to say from the input / output terminals to the ETHERNET network.
  • FIG. 3 shows the CCS communication controller. This includes a base unit BA and a peripheral unit PER.
  • the CONT controller actually consists of two CONT1 and CONT2 ETHERNET controllers, the first of which is connected via the physical adaptation device DAPR1 to the cable CX1 and therefore to SAD and the second of which is connected via from the physical adaptation device DAPR to the other terminals of the network RE.
  • the integrated circuit CE1 is in a preferred embodiment of the invention, constituted by a circuit of the firm NATIONAL SEMICONDUCTORS called SNIC circuit with reference 83901 from this manufacturer.
  • This integrated circuit makes it possible to transmit frames complying with the aforementioned standard 8802.3 or to receive frames from the RE network conforming to this standard.
  • an integrated circuit makes it possible to carry out the essential provisions of the standard concerning, on the one hand the problems of the transmission, and on the other hand those of the reception of frames and the detection of collisions.
  • Such a circuit therefore comprises a transmission circuit, a reception circuit, a carrier detector circuit and a collision detector circuit, as well as an encoding and decoding device which makes it possible to transmit the frames according to for example a Manchester type code, or to receive frames transmitted according to this code.
  • an encoding and decoding device which makes it possible to transmit the frames according to for example a Manchester type code, or to receive frames transmitted according to this code.
  • CE1 is connected to CX1 via a standardized CHEAPERNET type transceiver, placed on the card carrying CCS, and a standardized T connector COC1, itself connected to the cable coaxial CX1.
  • COC1 is external to the card bearing CCS.
  • the CAC1 transceiver therefore constitutes the DAPR1 physical adaptation device.
  • the DAPR physical adaptation device is identical to the DAPR1 physical adaptation device and is therefore constituted by a CHEAPERNET standardized transceiver physically placed on the card which forms the CCS communication controller. This transceiver is connected to a T connector, namely COC, to the CX coaxial cable.
  • the AD adapter comprises a base unit BAD and a peripheral part PERT.
  • the BAD base unit is strictly identical from one adapter to another, while the PERT peripheral part differs according to the type of input / output terminals with which the adapter is associated.
  • the MPA microprocessor and the 3 controllers SCC1 to SCC3 are constituted by a microcontroller 68302 from the company MOTOROLA (we know that such a microcontroller is in fact formed by the association of a 68000 type microprocessor and a peripheral part formed by serial communication controllers.
  • the 68000 microprocessor therefore constitutes the MPA microprocessor while the 3 controllers SCC1 to SCC3 constitute the peripheral part of the microcontroller 68302).
  • the PERT peripheral part consists of 3 line adapters DR1, DR2, DR3 each corresponding respectively to the terminals T1, T2, T3 and to the serial communication controllers SCC1 to SCC3.
  • the elements CEA, MPA and MVA are connected to the internal bus BIA of the microprocessor MPA, the latter being also connected to the memories MVA and MMA by a bus of the same type as BIA.
  • Line adapters DR1, DR2 and DR3 are for example constituted by elements 3487 - 3486 from the company NATIONAL SEMICONDUCTORS. Recall that line adapters ("line divers" in English) provide electrical adaptation of voltage levels used in integrated circuits of the TTL type (0 and 5 Volts) such as those constituting the AD adapter, at the level used on the connections making it possible to connect the adapters to the terminals T1, T2, T3.
  • each adapter such as AD is assigned a 48-bit ETHERNET address by its manufacturer. This address is written in the MMA memory and is therefore accessible by the microprocessor MPA.
  • each adapter as soon as it is inserted into its basket, knows, via the MPA microprocessor, its geographical location inside the basket and the number thereof which is arbitrarily assigned by the manufacturer. This constitutes its geographic address which is entered in the bottom of the basket itself by an appropriate coding device which is read by the MPA microprocessor as soon as the adapter is inserted into its basket.
  • This controller supports, in the preferred embodiment of FIG. 2, 2 data channels C1, C2 each corresponding respectively to the set of adapters AD ... AD m of the adapter system SAD on the one hand, and on the other hand to the other terminals of the RE network, i.e. SI1 ... SI i ... SIS j , ....
  • CCS supports the two channels C1 and C2 defined above.
  • the first processor MP1 controls the transfer of the frames circulating on the bus PSB intended for the terminals of the network RE, including SAD: as such, it receives them and stores them in its random access memory MV1 while waiting that they are really transferred towards the RE network. Conversely, it receives in its random access memory MV1 the frames coming from the network RE, before sending them via the bus PSB to ORD.
  • the first processor cuts each of the frames into a plurality of data packets (buffers) such as BF1, BF2, ..., BF n .
  • MP1 allocates to each of these a specific physical location in the RAM memory MV1.
  • the first processor requests the second processor MP2 perform the transfer of each of the frames, buffer by buffer, from the random access memory MV1 to the controller CONT then the network RE, in the appropriate channel, for example C1, through the internal buses BI1, BI2 and the interface IF2 , then build ETHERNET frames from the buffers and send them over the RE network.
  • the first processor manages the transfer of each of the frames it receives from PSB or from the network RE, through the two channels C1 and C2 assigned to each, both for transmission and for transmission. reception.
  • physical locations in MV1 are allocated, by MP2, to the various buffers constituting each frame, designated for example by BF101 at BF m , these locations being different from those allocated to BF1, ... BF n .
  • the second processor MP2 having received the transfer request from the first processor MP1, performs the transfer of each frame, buffer by buffer, in the channel C1, from the first memory MV1 to the peripheral part PER, where the buffers thereof are stored in one of the two random access memories RAM codes or RAM2, depending on whether the frame in question, which we will designate under the generic term of bus frame is intended, either for one of the adapters of SAD, or at any other RE terminal.
  • the second processor MP2 constitutes frames called ETHERNET frames having a length between a minimum length and a maximum length fixed by the aforementioned standard 8802.3.
  • Such a frame is formed from several buffers stored in the memory MV1 by the first processor MP1. Indeed, in a preferred embodiment of the invention, any buffer stored in the memory MV1 and formed by the first processor MP1 has a given length configurable, for example 200 bytes, while the maximum length of an ETHERNET frame is 1500 bytes.
  • An ETHERNET frame can therefore be, for example, formed by the association of eight buffers. MP2 has the sequence of these, so that they are physically arranged one after the other in RAM1 memory.
  • one or the other of the two integrated circuits CE1 or CE2 will look for the data forming said frame stored in the RAM1 or RAM2 and transfers them to SAD or the other RE terminals, respecting the provisions of the aforementioned standard 8802.3.
  • the second processor MP2 On reception, the second processor MP2 performs the transfer of the ETHERNET frame coming from the network RE into the appropriate channel by fetching it from the RAM RAM - RAM2 where it has been stored by one of the two integrated circuits CE1, CE2.
  • the second processor redistributes the ETHERNET frame received into a certain number of buffers whose maximum length is 200 bytes, these buffers being sent by the latter from one or other of the two RAMs RAM v, RAM2 to the first memory MVêt , in the slots of the latter that he allocated for this purpose.
  • the purpose of the presence of the two RAM codes or RAM2 memories is in fact to adapt the speeds between the ETHERNET speed on the RE network which is 10 Megabits / s and the speed of processing of the frames and buffers constituting them by MP1 and MP2. Ipso facto, they provide adaptation between, on the one hand the speeds on the RE network, and on the other hand on the PSB bus.
  • the first and the second processor MP1, MP2, execute their work on instructions respectively from CNS communication software (see above) and from AML firmware.
  • the CNS communication software and the AML firmware which are installed on the disk memories MD of the server SERV are loaded into each of the random access memories MV1 and MV2, respectively.
  • This loading takes place through the PSB bus. Of course, it takes place once the card corresponding to the CCS communication controller has been initialized.
  • This initialization is carried out under the supervision of a firmware program stored in a programmable memory of the PROM type located in the base unit BA and not shown in FIG. 2 and in FIG. 3 for simplicity.
  • the communication software is in fact the operating system of the CCS communication controller (it constitutes the operating system according to English terminology). This software organizes the connection work between the PSB bus and the AML firmware, which is more specifically responsible for transferring each of the frames in the channels C1, C2 both at transmission and at reception.
  • FIG. 5 shows very schematically the links existing between the CNS communication software and the AML firmware.
  • the AML firmware includes a NY core, an IC communication interface, allowing dialogue between the CNS communication software and the AML firmware, as well as a plurality of modules firmware, also called tasks, namely TC0, TC1, TC2.
  • the modules TC1, TC2 each correspond to the two channels C1, C2 defined above. They are therefore responsible for transferring the frames assigned to each of these channels from the memory MV1 to the peripheral part PER and vice versa.
  • the TC0 task is specific to the card carrying the CCS controller. It is used to reset all the components making up the CCS card to 0.
  • Each task corresponding to a channel is a task independent of the others.
  • the workflow is organized in real time by the NY core.
  • the AML firmware which receives its commands from the CNS software is seen by the latter as a set of three independent tasks. Nevertheless, the tasks TC0, TC1, TC2, can operate simultaneously under the guidance of the core NY. Each of them therefore has direct links with the latter but has none with the others.
  • the IC module manages the interface with CNS software. It acknowledges the requests from it and directs them to the different tasks corresponding to the different channels so that these are executed. Symmetrically, it is responsible for transferring status or data from the channels corresponding to each of the tasks, intended for CNS software.
  • command descriptors corresponds to a frame determined either on transmission or on reception, and defines the operations which must be performed on these (channel activation, reception and deactivation of the latter, transmission of data, purge of command when a transmission is stopped).
  • FIG. 6 shows the structure of the AMLA firmware architecture of any of the terminal adapters, for example the AD adapter.
  • This structure is similar to the AML structure of the CCS communication controller firmware architecture.
  • This operation can be broken down into 6 successive essential operations OP1 to OP6 which are as follows:
  • HELLO A1 HELLO A1
  • SERV i SERV i
  • SERV j SERV i
  • ETHERNET address stored in MMA, as mentioned above.
  • the adapter AD retransmits a HELLO A2 message identical to the previous one, T1 seconds after the transmission of the latter (this time T1 defined by an internal clock of the adapter, is enough long, on the order of a few minutes).
  • one of the servers for example the SERV server (and consequently its CCS communication controller) considers itself ready to take into account any type of subsequent message sent by the adapter AD.
  • the server sends the latter a HELLO type message, here designated HELLO S , a message whose structure is similar to that of one or the other of the two HELLO A1 -HELLO A2 messages.
  • HELLO S a message whose structure is similar to that of one or the other of the two HELLO A1 -HELLO A2 messages.
  • the server indicates who it is, its type and its ETHERNET address.
  • Such a message includes the following parts H1 to H8:
  • H1 contains 6 bytes of 8 bits. Note that in Figure 8 bits 1 to 8 of each byte occupy an arrangement such as the least bit signifier is located on the right and the most significant bit on the left.
  • H1 contains the ETHERNET address of the recipient system.
  • H1 is an ETHERNET address called "broadcast". This means that all the systems (that is to say all the servers) of the computer systems constituting the architecture ARCH receive this message of the HELLO type sent by the adapter, here AD. In other words, this "broadcast" address is a means to notify everyone that the adapter wishes to communicate with any of the servers.
  • this part H1 for a message such as HELLO A1 or HELLO A2 , all the bits of the 6 bytes constituting this part H1 are equal to 1. In the case where a server sends a message such as HELLO S to an adapter, this part H1 contains the ETHERNET address of the adapter to which this server is addressed.
  • This part contains 6 bytes of 8 bits and defines the ETHERNET address of the sending system.
  • the first 3 bytes are allocated worldwide to a given manufacturer, while the following 3 bytes are allocated by this same manufacturer to each of the systems it manufactures.
  • the manufacturer can give to each system which he manufactures, that is to say for example to each server or to each adapter, on the 3 bytes previously defined, the serial number of manufacture of this system.
  • the adapter Before sending a HELLO message, the adapter will look for this ETHERNET address in MMA and insert it into the message.
  • This part comprises 2 bytes and defines the total length in number of bytes of the message, from H3, that is to say the total length in number of bytes of the parts H4 to H8.
  • This part contains 3 bytes. Its role and structure are defined by ISO standard 8802.2 type 1. It indicates whether the manufacturer has defined a specific protocol, known as the "proprietary” protocol. In fact, the ETHERNET standards leave the possibility for each manufacturer to establish specific protocols, known as "proprietary” protocols, within the ETHERNET standard. In the case where this is the case, the value of each of the 3 bytes constituting this part H4 is determined by the standard.
  • This part imposed by the ISO 10178 standard, appendix B or the IEEE 802.1 standard, supplement A, indicates who is the owner of the "proprietary" protocol, here for example, the requesting Company, and what is the protocol number with this same owner . Indeed, the same owner can develop several protocols.
  • This part H5 therefore indicates which protocol is used for the HELLO message among all the protocols defined by the manufacturer.
  • This part consists of 2 bytes, the first indicating which version of the protocol is indicated in the H5 part (the same protocol at the same manufacturer can have several versions).
  • the second byte indicates that there is no filling byte after this to find a border between two words.
  • it was chosen to constitute a message by an integer number of words of 32 bits, that is to say 4 bytes of 8 bits.
  • words are successively sent and the border between these words must be determined.
  • the second byte of the H6 part therefore makes it possible to determine the border between two words.
  • This part contains the usual ETHERNET frame end information which is defined by the ISO 8802 standard. 3.
  • AD Upon reception by the AD adapter of the HELLO S message sent by the SERV server, AD sends back a HELLO type message, namely HELLO A3 in which the part H1 contains the address of the SERV server. As soon as the latter has received this message, it decides to take into account all the messages sent by the AD adapter. The OP2 operation then begins.
  • the SERV server (in fact the CCS controller) sends an XID1 message to AD.
  • This message is a connection message, or an identity exchange message.
  • the structure of this message and the content of each of the constituent parts are defined by ISO 8885 standard.
  • the identifier is entered of the sending system, that is to say the identifier of the SERV server, this identifier being defined above.
  • the message XID1 means that the SERV server requests the adapter to open the so-called LAP procedure defined by ISO 7776, allowing the link between layers 2 of the OSI reference model (also defined by ISO) relating to the server SERV and the AD adapter.
  • LAP procedure allows the secure exchange of information between two systems with flow control.
  • the AD adapter LAP procedure is written to MMA memory.
  • AD In response to the message XID1, AD returns a message XID2 with the same general structure as XID1. This message means that the adapter is ready to implement the LAP procedure. We then pass to the operation OP3.
  • SERV sends the adapter data transfer program from the adapter to the network and vice versa, that is to say the AMLA firmware set consisting of the NYA kernel and the tasks TCT1 to TCT3. These are stored in the MVA memory.
  • the LAP procedure the operation of the upper layers of the OSI model, conforming to the DSA 77 specifications, as well as the AMLA firmware package, as defined above, are transferred from the disk memory MD to the adapter where they are loaded. in MVA.
  • sub-operation 3 begins: the SERV server sends a DISC disconnection message to the adapter AD.
  • This message means on the one hand that the loading of program is finished and on the other hand that the adapter AD can from now on implement the LAP procedure contained in its RAM MVA. In other words, this means that the LAP procedure contained in the MMA ROM is no longer used by the adapter AD as soon as the latter receives this DISC message.
  • the AD adapter sends a UA message to the server. It can therefore be seen that for the adapter AD, all the operations OP1 to OP3 included, are carried out implementing (via the microprocessor MPA) the LAP procedure written in the read-only memory MMA. We now move on to the OP4 operation.
  • the AD adapter waits for the server to ask it to implement the LAP procedure contained in its MVA RAM.
  • SERV puts an end to this wait by sending a message XID3 indicating that it asks AD to establish the LAP procedure contained in MVA.
  • the adapter responds by sending an XID2 message (identical to the message sent during the OP2 operation). We then pass to the operation OP5.
  • SERV sends a SABME message (see operation OP3) to the adapter which returns a UA message. From the start of operation OP1 until this instant, the work of AD is carried out by MPA under the supervision of the task ADM.
  • SERV and AD then exchange information between the computer system and the three terminals T1, T2 T3.
  • the way in which the server, through its CCS controller, manages and transfers information from the ORD computer to the network and vice versa has been described above.
  • the way in which the adapter AD manages and carries out the transfer of information from the network to the terminals and vice versa is described below (under the guidance of tasks TCT1 to TCT3).
  • the SERV server sends a message DISC disconnection (see above at the end of the OP3 operation) to the AD adapter which returns the UA message to the server (see also above, end of the OP3 operation).
  • the SERV server sends an ETHERNET information frame intended for the terminal T1.
  • TE be this frame. It goes through the IFC transceiver then through the CEA integrated circuit which verifies that the main provisions of the ETHERNET standard are respected. Once this has been done, it sends the frame, through the bus BIA into the random access memory MVA where it is then taken into account by the microprocessor MPA, under the supervision of the task TCT1.
  • the microprocessor MPA examines the framing data of the frame TE, notes that the data thereof is intended for the terminal T1, extracts the useful data from the frame (excluding framing data specific to ETHERNET standards) and adds to these useful data framing data specific to the nature of the link associated with the terminal T1. Once this has been done, it transmits the data to the serial communication controller SCC1 which transmits this data in series to the terminal T1 via the line adapter DR1.
  • the operation of the adapter AD is broadly analogous to the operation of the CCS controller, the memory MVA alone playing a role analogous to that of all the memories MV1, MV2 and RAM1-RAM2, the microprocessor MPA playing alone a role analogous to that of all the microprocessors MP1 and MP2, the circuit CEA playing a role analogous to that of CE1 or CE2.
  • the role played by the LAP procedure registered in MVA is similar to that of CNS software and the role of AMLA is similar to that of AML.
  • the microprocessor MPA defines command descriptors for each frame received or to be sent, and divides each of these into a plurality of buffers to which it allocates perfectly defined locations in MVA memory.
  • the microprocessor MPA defines command descriptors for each frame received or to be sent, and divides each of these into a plurality of buffers to which it allocates perfectly defined locations in MVA memory.
  • FIG. 9 shows a SIS j server computer system making it possible to transfer information from an SAD j adapter system to the RE network with maximum security, without at any time transferring the network frame. to the adapter system or vice versa can be interrupted for any reason whatsoever (disabling of a server, maintenance operation, etc.).
  • the server computer system SIS j comprises two servers SERV j1 and SERV j2 .
  • the SERV j1 server comprises two communication controllers CCS1 and CCS2, while the SERV j2 server comprises two communication controllers CCS3 and CCS4.
  • the four communication controllers CCS1 to CCS4 are identical to the CCS communication controller shown in Figure 3.
  • the CCS1 controller comprises a base BA1 and a peripheral part PER1, the controller CCS2 a base BA2 and a peripheral part PER2.
  • the CCS3 and CCS4 controllers respectively include the bases BA3 and BA bases and the peripheral parts PER3 and PER4.
  • the four bases BA1 to BA4 are connected together to the network RE while the four peripheral parts PER1 to PER4 are connected together to the coaxial CX2 which connects the server computer system SIS j to the adapter system SAD j .
  • the bases BA1 to BA4 are connected to the network RE via an ETHERNET communication controller of the type described in the aforementioned application No. 90.12826.
  • the four bases BA1 to BA4 and the base of this ETHERNET controller are therefore interconnected by the same MULTIBUS II while the peripheral part of the latter is connected to the RE network.
  • a frame TE coming from the network RE normally passing through the controller CCS1 can, if the latter is defective or absent, pass through the controller CCS2. If the latter is in turn defective, the TE frame can pass either by CCS3 or CCS4. An identical reasoning can be held for one or the other of the two controllers CCS3 or CCS4, in the case where the TE frame passes normally through one or the other of these two latter.

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  • Engineering & Computer Science (AREA)
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  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
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EP91403468A 1990-12-20 1991-12-19 Verteilte Rechnerarchitektur die ein CSMA/CD ähnliches lokales Netzwerk benutzt Expired - Lifetime EP0493215B1 (de)

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FR9016031 1990-12-20
FR9016031A FR2670925B1 (fr) 1990-12-20 1990-12-20 Architecture informatique distribuee utilisant un reseau local de type csma/cd.

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EP0493215A1 true EP0493215A1 (de) 1992-07-01
EP0493215B1 EP0493215B1 (de) 2000-04-26

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US6047319A (en) * 1994-03-15 2000-04-04 Digi International Inc. Network terminal server with full API implementation

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DE69132136D1 (de) 2000-05-31
US5408609A (en) 1995-04-18
DE69132136T2 (de) 2000-09-21
FR2670925A1 (fr) 1992-06-26
JPH07123254B2 (ja) 1995-12-25
EP0493215B1 (de) 2000-04-26
JPH04276939A (ja) 1992-10-02
FR2670925B1 (fr) 1995-01-27

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