EP0459038B1 - Prozessor für ein adaptives Antennensystem - Google Patents

Prozessor für ein adaptives Antennensystem Download PDF

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Publication number
EP0459038B1
EP0459038B1 EP19900305494 EP90305494A EP0459038B1 EP 0459038 B1 EP0459038 B1 EP 0459038B1 EP 19900305494 EP19900305494 EP 19900305494 EP 90305494 A EP90305494 A EP 90305494A EP 0459038 B1 EP0459038 B1 EP 0459038B1
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EP
European Patent Office
Prior art keywords
weight
tapped delay
filter means
signals
outputs
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Expired - Lifetime
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EP19900305494
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English (en)
French (fr)
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EP0459038A1 (de
Inventor
Christopher Robert Ward
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Nortel Networks Ltd
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Northern Telecom Ltd
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Publication date
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Priority to DE1990616409 priority Critical patent/DE69016409T2/de
Publication of EP0459038A1 publication Critical patent/EP0459038A1/de
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q3/00Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
    • H01Q3/26Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture
    • H01Q3/2605Array of radiating elements provided with a feedback control over the element weights, e.g. adaptive arrays

Definitions

  • This invention relates to an off-line processor for a broadband accelerated convergence adaptive antenna array.
  • an adaptive antenna is to combine the signals received by the elements in an array to produce a far-field pattern that, in some sense, optimises the reception of a desired signal in the presence of jamming and noise.
  • the substantial improvements in anti-jam performance offered by this form of array signal processing have meant that it is now becoming an essential requirement for many military radar, communication and navigation systems.
  • FIG. 1 A known type of combining circuit for a broadband adaptive array is shown in Fig. 1.
  • Signals from the antenna array elements are received on individual channels which are identified as 'PRIMARY CHANNEL' and 'AUX CHANNELS'.
  • the primary channel is applied via a time delay T D to a beamforming network BFN.
  • the auxiliary channels 1 to N-1 are applied to respective tapped delay lines T, the outputs of which are fed through respective weighting networks to the beamforming network.
  • Time delay T D in the PRIMARY channel compensates for the associated signal delay through the tapped delay line auxiliary weighting.
  • Weights W 1,1 W 1,2 W 1,3 ...W n-1,1 W n-1,2 ....W n-1,m-1 W n-1,m are applied to the weighting networks.
  • the weighted outputs of the tapped delay lines are combined in the beamforming network BFN together with the primary channel signal to form the output response of the array.
  • the weights are calculated (by a signal processor not shown in Fig. 1) to form a beam pattern with broadband spatial nulls in the directions of the jammer sources.
  • the array can be arranged for the array to adapt to null the jamming signal(s) during intervals when the desired signal is absent.
  • the weights are then frozen while the desired signal is present and then recalculated during any pauses in the desired signal.
  • Other schemes can be devised which prevent cancellation of the wanted signal.
  • Known forms of signal processing to calculate the required weights include the Widrow Least Mean Squares (LMS) algorithm or the least squares algorithm to minimise the output power of the beamformer.
  • LMS Widrow Least Mean Squares
  • Known forms of signal processing to calculate the required weights include the Widrow Least Mean Squares (LMS) algorithm or the least squares algorithm to minimise the output power of the beamformer. See for example, B Widrow et al, "Comparison of Adaptive Algorithms Based on the Methods of Steepest Descent and Random Search", IEEE Trans., 1976, AP-24, pp 615-637, and the time shared arrangement described in British patent GB 2 188 782 B.
  • an off-line processor arrangement for a broadband accelerated convergence adaptive antenna array wherein signals from a plurality of auxiliary antenna elements are applied to respective identical tapped delay lines (T) the outputs of which are fed through respective individual signal weighting means (W 1,1 - W n-1,m ) to a beamforming network (BFN) and then combined with the signal from a primary antenna element which is delayed via a delay line (TD) whereby the auxiliary signals from the tapped delay lines are applied together with the output response of the beamforming network to compute sets of weight correction vectors, characterised in that the arrangement includes one or more least squares lattice filter means (LF) together with an associated weight impulse response calculation means (PC) with which to update the weight coefficients and means for storing (WS) said updated coefficients, said stored coefficients being applied to the individual signal weighting means to weight the outputs of the tapped delay lines.
  • LF lattice filter means
  • PC weight impulse response calculation means
  • separate identical lattice filter means are provided for each of the antenna element signal to compute weight vectors for updating the weight coefficients for the outputs of the respective tapped delay line.
  • each lattice filter is constructed of a number of identical stages or sections LS (Fig.4) in cascade.
  • the signal from the appropriate antenna element, i.e. auxiliary channel, is fed to the two inputs X, Y of the basic lattice structure.
  • a typical lattice section LS is shown in Fig. 5.
  • Input X is applied via a time delay T and then the X and Y signals are applied to the appropriate cross multiplier structure.
  • each section provides two outputs, X1 and Y1.
  • the X1 outputs of each lattice section are subjected to a scaling factor and then combined with the output response from the beamformer BFN.
  • the operation of the m-stage lattice filters is controlled by a process controller PC which produces, for example, weight flush control signals to cause the weight correction vectors to be flushed out of the filters at the correct time intervals.
  • the weight flush control calculates impulse response of the lattice filter.
  • the flushed out impulse coefficients from the filters (represented in vector notation by * W i (P) for the i th lattice filter at the p th recursion) are applied to update the weights in respective stores WS1...WS n-1 where the weights to be applied to the tapped delay line outputs are held.
  • a single lattice filter LF is used in a time-shared mode.
  • the auxiliary channel signals from the antenna elements are applied to a time division multiplexer MUX from which the multiplexed signals are fed to the filter LF.
  • the weight correction vectors * W i are supplied to the weight update-and-store circuit WS for all the tapped delay lines.
  • off-line lattice filters to produce weight correction vectors offers various levels of reduced circuit complexity while retaining a significant improvement in convergence compared with more conventional adaptive weight control techniques e.g. the Widrow LMS technique.

Claims (3)

  1. Offline-Prozessoranordnung für eine adaptive Breitband-Antennengruppe mit beschleunigter Konvergenz, bei der Signale von einer Vielzahl von Hilfsantennenelementen jeweiligen identischen angezapften Verzögerungsleitungen (T) zugeführt werden, deren Ausgänge über jeweilige einzelne Signalbewertungseinrichtungen (W1,1 bis Wn-1m) einem Strahlfformungsnetzwerk (BFN) zugeführt und dann mit dem Signal von einem primären Antennenelement kombiniert werden, das über eine Verzögerungsleitung (TD) verzögert ist, wodurch die Hilfssignale von den angezapften Verzögerungsleitungen zusammen mit der Ausgangsantwort des Strahlformungsnetzwerkes zugeführt werden, um Sätze von Bewertungs-Korrekturvektoren zu berechnen, dadurch gekennzeichnet, daß die Anordnung ein oder mehrere Fehlerquadrat-Brückenfiltereinrichtungen (LF) zusammmen mit einer zugehörigen Bewertungs-Impulsantwort- Berechnungseinrichtung (PC), mit der die Bewertungskoeffizienten auf einen neuen Wert gebracht werden, und Einrichtungen zur Speicherung (WS) der in ihrem Wert erneuerten Koeffizienten einschließt, wobei die gespeicherten Koeffizienten den einzelnen Signalbewertungseinrichtungen zugeführt werden, um die Ausgänge der angezapften Verzögerungsleitungen zu bewerten.
  2. Anordnung nach Anspruch 1, bei der getrennte identische Brückenfiltereinrichtungen (LF₁ bis LFn-1) für jedes der Hilfsantennenelementsignale vorgesehen sind, um Bewertungsvektoren zur Werterneuerung der Bewertungskoeffizienten für die Ausgänge der jeweiligen angezapften Verzögerungsleitung zu berechnen.
  3. Anordnung nach Anspruch 1, bei der eine einzige Brückenfiltereinrichtung (LF) und Einrichtungen zur Zeitmultiplexierung (MUX) der Antennenelementsignale an die Filtereinrichtungen vorgesehen sind, wodurch die Filtereinrichtung in einer Zeitteilungs-Betriebsart betrieben wird.
EP19900305494 1989-02-08 1990-05-21 Prozessor für ein adaptives Antennensystem Expired - Lifetime EP0459038B1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE1990616409 DE69016409T2 (de) 1990-05-21 1990-05-21 Prozessor für ein adaptives Antennensystem.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8902801A GB2229580B (en) 1989-02-08 1989-02-08 Adaptive array processor

Publications (2)

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EP0459038A1 EP0459038A1 (de) 1991-12-04
EP0459038B1 true EP0459038B1 (de) 1995-01-25

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GB (1) GB2229580B (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19950577A1 (de) * 1999-10-20 2001-05-10 Siemens Ag Komplexwertige CORDIC-ähnliche Verfahren für Signalverarbeitungsaufgaben

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2242268B (en) * 1990-03-22 1993-07-21 Stc Plc Adaptive antenna
US5028931A (en) * 1990-05-24 1991-07-02 Stc Plc Adaptive array processor
CN1086847C (zh) * 1994-09-14 2002-06-26 皇家菲利浦电子有限公司 无线电接收设备
CN1092847C (zh) * 1994-09-14 2002-10-16 皇家菲利浦电子有限公司 无线电传输系统和供这种系统使用的无线电设备
CA2255674C (en) * 1996-05-20 2003-11-25 Post Und Telekom Austria Aktiengesellschaft Process and device for reception with directional resolution
EP0948081A1 (de) * 1998-04-03 1999-10-06 Lucent Technologies Inc. Antennensystem mit Diversity
EP0948082A1 (de) * 1998-04-03 1999-10-06 Lucent Technologies Inc. Adaptive Antenne

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985003359A1 (en) * 1984-01-23 1985-08-01 The Commonwealth Of Australia Care Of The Secretar Method of processing sensor elements
US4578676A (en) * 1984-04-26 1986-03-25 Westinghouse Electric Corp. Delay lattice filter for radar doppler processing
GB2188782B (en) * 1985-07-18 1989-08-23 Stc Plc Adaptive antenna

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19950577A1 (de) * 1999-10-20 2001-05-10 Siemens Ag Komplexwertige CORDIC-ähnliche Verfahren für Signalverarbeitungsaufgaben
DE19950577C2 (de) * 1999-10-20 2002-08-22 Siemens Ag Komplexwertiges CORDIC-Verfahren für Signalverarbeitungsaufgaben sowie Funkkommunikationssystem zur Durchführung des Verfahrens

Also Published As

Publication number Publication date
GB2229580A (en) 1990-09-26
GB2229580B (en) 1993-07-21
GB8902801D0 (en) 1990-06-20
EP0459038A1 (de) 1991-12-04

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