EP0439240B1 - Electronic ballast - Google Patents

Electronic ballast Download PDF

Info

Publication number
EP0439240B1
EP0439240B1 EP91250009A EP91250009A EP0439240B1 EP 0439240 B1 EP0439240 B1 EP 0439240B1 EP 91250009 A EP91250009 A EP 91250009A EP 91250009 A EP91250009 A EP 91250009A EP 0439240 B1 EP0439240 B1 EP 0439240B1
Authority
EP
European Patent Office
Prior art keywords
voltage
circuit
electronic ballast
transistor
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP91250009A
Other languages
German (de)
French (fr)
Other versions
EP0439240A3 (en
EP0439240A2 (en
Inventor
Dieter Dipl.-Ing. Albert
Peter Prof. Dr.-Ing. Marx
Burkhard Prof. Dr.-Ing. Karstädt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semperlux GmbH
Original Assignee
Semperlux GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19904001549 external-priority patent/DE4001549A1/en
Application filed by Semperlux GmbH filed Critical Semperlux GmbH
Publication of EP0439240A2 publication Critical patent/EP0439240A2/en
Publication of EP0439240A3 publication Critical patent/EP0439240A3/en
Application granted granted Critical
Publication of EP0439240B1 publication Critical patent/EP0439240B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B41/00Circuit arrangements or apparatus for igniting or operating discharge lamps
    • H05B41/14Circuit arrangements
    • H05B41/26Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc
    • H05B41/28Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters
    • H05B41/282Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices
    • H05B41/2825Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices by means of a bridge converter in the final stage
    • H05B41/2828Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices by means of a bridge converter in the final stage using control circuits for the switching elements

Definitions

  • the invention relates to an electronic ballast for low-pressure discharge lamps supplied from direct and alternating voltage networks according to the preamble of the main claim.
  • an electronic ballast which has an inverter in a half-bridge circuit which feeds at least one lamp, a capacitive reactance connected in parallel with the lamp and an inductive resistor connected in series with the lamp and capacitive reactance.
  • the power transistors of the inverter in a half-bridge circuit are controlled digitally by a control circuit having two control circuits, two control voltages offset by a half-period, between which a pulse gap is present, being generated.
  • the DC voltage is supplied via an isolating transformer with two galvanically isolated ones Secondary windings.
  • a circuit known as a step-up converter is used, which essentially consists of a memory inductor with two windings, a switching transistor, a diode, a charging capacitor and a sine control unit.
  • a ballast is known from DE 39 13 033 A1, in which in the switch-on phase the DC supply voltage for the control circuit via a a high-resistance resistor causing permanent power dissipation is supplied by the rectifier connected upstream of the inverter. After switching on, the supply voltage is generated by a current transformer arranged in the load circuit and a second inverter.
  • EP 0 059 064 discloses a ballast which has an inverter which receives a direct current and supplies an alternating current.
  • a control circuit controls the inverter to operate at a frequency above the resonant frequency of the lamp when it is turned on. Then it is changed in frequency in the direction of the resonance frequency, whereby the lamp ignites due to the amplified voltage.
  • the invention has for its object to provide a dimmable electronic ballast for low-pressure discharge lamps with good efficiency, which is suitable for both DC and AC operation and enables the lamps to be started quickly and safely.
  • the step-up choke of the harmonic filter has an additional auxiliary winding which is connected to a rectifier circuit and the capacitor of the DC voltage supply circuit for the digital drive circuit, the capacitor constantly charged and stabilized to the necessary supply voltage for the control circuit.
  • the DC voltage supply circuit connected to the harmonic filter has a first transistor which becomes conductive immediately after the supply voltage of the electronic ballast is switched on and charges the capacitor to the supply voltage of the control circuit, wherein the first transistor is blocked by a blocking circuit after charging the capacitor. In this way, the voltage required for supplying the control circuit is made available immediately after the start in both direct voltage and alternating voltage operation.
  • the inductive reactance of the at least one lamp has two auxiliary windings which are electrically isolated from one another and are each connected to the electrodes of the lamp. This measure improves the dimming behavior compared to that of the prior art, since there the lamp electrodes were not sufficiently heated.
  • the circuit arrangement shown in FIG. 1 for an electronic ballast for low-pressure discharge lamps, in which the lamps are supplied with a high-frequency current in order to achieve a better light yield consists of an inverter 1 in a half-bridge circuit, a control circuit 2 for controlling the inverter, and a DC voltage supply circuit 3 , which supplies the supply voltage for the control circuit 2, and a harmonic filter 4, which limits the mains current harmonics.
  • the harmonic filter 4 designed as a step-up converter or step-up converter essentially consists of a step-up converter choke L3 with two windings N2, N3, each of which is connected to the connections of a bridge rectifier D5-D8, the other terminals 5, 6 of which are connected to a mains voltage or an HF -Filters are made of a semiconductor switch designed as a switching transistor T3, a diode D9 connected to both the winding N3 of the step-up converter choke L3 and to the drain of the switching transistor T3 and a charging capacitor C5 connected to the diode D9, which is connected to ground and has a charging voltage of U Br has.
  • the switching transistor T3 is controlled via its gate connection by control logic IC2, which receives information regarding the input voltage
  • the step-up converter enables the continuous transformation of a DC input voltage
  • the control logic is designed such that a low harmonic, almost sinusoidal current is taken from the power supply network, wherein the power factor is almost 1 and a regulated DC voltage is available at the output.
  • the DC voltage supply circuit 3 has a trained as a self-locking N-channel MOS-FET transistor T4, the drain connection via a resistor R4 for current limitation to the terminal U Br and its source connection is connected to a capacitor C3, one designed as a Z diode Stabilizing diode D11 is connected to the gate terminal of transistor T4 and to the collector of a transistor T5, which is connected to terminal U Br via a resistor R5.
  • the emitter of the transistor T5, the Zener diode D11 and the capacitor C3 are connected to ground with their other connections.
  • the base of transistor T5 is connected via a resistor R6 to the connection between bridge rectifier D5-D8 and winding N3, and a parallel RC element C4, R7 is located parallel to the base-emitter path.
  • the capacitor C3 supplies at its terminal U V the direct voltage for supplying the control circuit 2.
  • the step-up converter choke L3 has an additional auxiliary winding N1, which is connected to the terminal U V via a resistor R3 and a bridge arm of the bridge rectifier D1 to D4, whereby a further Z diode D10 is connected in parallel with the capacitor C3.
  • the control circuit 2 consists of an integrated pulse width modulation component IC1 and an integrated high-voltage half-bridge driver HVIC, which is explained in more detail below.
  • the PWM module IC1 eg IC 3525 A
  • the control circuit 2 is connected to the inverter 1, which in a known manner has two half-bridge transistors T1, T2 and, in the second bridge branch, the capacitive voltage divider C1, C2.
  • DE-OS 38 05 159 For the structure and function of the inverter, reference is also made to DE-OS 38 05 159.
  • the diodes D1 to D4 of the bridge circuit, the winding N3 of the step-up choke L3 and the diode D9 of the charging capacitor C5 reach approximately the peak value of the Mains voltage charged.
  • the charging voltage U Br at the charging capacitor C5 causes a positive voltage of 15 V to develop at the gate of the transistor T4 via the resistor R5 and the Zener diode D11, as a result of which the transistor T4 becomes conductive and the capacitor C3 switches to the voltage U V , namely about +15 V is charged. Since the transistor T4 is designed as a normally-off N-channel MOS field-effect transistor, it blocks again immediately, because the voltage at the source and gate is approximately the same.
  • the transistor T4 If the transistor T4 has become conductive, the second transistor T5 is still blocked since the Capacitor C4 of the RC element is uncharged. After a time constant determined by the dimensioning of the resistors R6, R7 and C4, the transistor T5 becomes conductive and thereby blocks the transistor T4.
  • the capacitor C4 discharges through the resistor R7, the time constant of this RC element C4, R7 being selected such that the transistor T5 is ready to start again within one second after the mains voltage has been switched off is, ie is in the non-conductive state. This enables the electronic ballast to be switched on again quickly.
  • other connection options for the resistor R6 and the RC element R7, C4 are also conceivable, which ensure a controlled charging and discharging of the capacitor 4.
  • the arrangement described serves as a starting circuit so that a safe start is made possible when operating on direct or alternating voltage networks.
  • control circuit When the control circuit is supplied with the voltage U V via the start circuit just described, it begins to work and, as will be described further below, supplies two signals arranged offset to one another at its outputs. At the same time, the control circuit supplies 2 trigger signals to the control logic IC2, which switches the transistor T3, as a result of which the actual current flowing through the choke L3 (or N3) is superimposed by a high-frequency ripple current. This applies to both AC and DC voltage supply at terminals 5,6.
  • the capacitor C3 is charged during operation, specifically via the auxiliary winding N1, the resistor R3 and the bridge circuit D1 to D4.
  • the alternating voltage generated on the auxiliary winding N1 is rectified in two-way fashion via the resistor R3 with the bridge circuit D1 to D4.
  • the voltage on the capacitor C3 is stabilized to approximately 15 V with the Zener diode D10.
  • the pulse width modulation module, PWM module, IC1 essentially consists of a square-wave generator with a variable pulse duty factor and a downstream logic circuit which is designed in such a way that two pulses offset in time are delivered to the outputs, a pulse gap being provided between the pulses, by which it is prevented that the downstream half-bridge transistors T1, T2 become conductive at the same time.
  • the pulse duty factor of the PWM module IC1 is changed by applying a DC voltage of variable size to the dimming input 7, i.e. the pulse gap between the two output signals of the PWM module IC1 is changed.
  • the output signals of the PWM module IC1 go to the high-voltage half-bridge driver HVIC, the structure and function of which is explained in more detail with reference to the circuit diagram in FIG. 3.
  • the integrated high-voltage bridge driver HVIC With the integrated high-voltage bridge driver HVIC, a so-called bootstrap circuit is used, which can be externally connected or integrated with different bridge drivers currently on the market.
  • the driver Tr2 is connected to the supply voltage U V
  • the driver Tr1 requires a supply voltage which takes into account that the load point between two transistors T1, T2 fluctuates between the voltages of approximately U Br and approximately OV.
  • the bootstrap circuit is provided, which consists of the diode D12, the protective resistor R8 connected in series and the capacitor C7, the capacitor C7 being connected on the one hand to the load point and on the other hand to the resistor R8, which is connected to the charging voltage U Br lies.
  • the diode D12 is connected to the supply voltage U V.
  • capacitor C7 can charge to approximately U V since the load point is approximately at ground. If T2 blocks and then T1 conducts, the load point is approximately at U Br , and a voltage of approximately U Br + U V is present at the capacitor, which results in a floating supply voltage for driver Tr1.
  • the switching signal for the transistor 1 supplied by the PWM module IC1 must also be adapted to the level differences between the voltage U Br and approximately 0 V.
  • the voltage level shift circuit S which lies between the signal output of the PWM module IC1 and the input of the driver Tr1, is used for this purpose. This level shift is used in the commercial HVICs Realized in different ways, for example the switching signal can be modulated or superimposed on a pulse signal with the level of U Br .
  • FIG. 5 shows a circuit in which the bootstrap circuit D12, R8 and C7 as in FIG. 3 are also used.
  • an optocoupler OC is provided which controls the driver Tr3 for the transistor T1 using potential isolation.
  • the driver Tr4 receives the switching signal directly from the PWM module IC1.
  • the voltage U Br which is halved in each case by the capacitors, is present at the capacitors C1, C2 of the inverter 1.
  • the transistors T1, T2 are mutually switched to the conductive or the blocked state, and the circuit of the discharge lamps is driven with a high-frequency square-wave voltage.
  • this discharge lamp circuit 8 consists of at least one discharge lamp LL, to which a capacitor C is connected in parallel, the parallel connection being in series with an inductance L. Of course, several such arrangements can be provided in parallel.
  • an attenuator is connected in parallel with the lamp electrodes a resistor R and a diode D, wherein the resistor R can be an ohmic or complex resistor or another resistor or a combination.
  • This damping element improves the dimming behavior of the discharge lamp LL, since so-called "running layers", ie visually disturbing instabilities of the arc discharge, are avoided with lamps dimmed very far, ie below 10% of the maximum brightness.
  • FIG. 2 shows a further exemplary embodiment, the harmonic filter 4 and the DC voltage supply circuit 3 according to FIG. 1 being omitted for the sake of simplicity.
  • the discharge lamp circuit 8 in this case consists of two fluorescent lamps LL1 and LL2 with correspondingly connected capacitors C7, C8 and the attenuators R, D and the inductors L1 and L2 connected in series.
  • two galvanically isolated auxiliary windings L1 'and L1 L2 as well as L2' and L2 galvan are provided.
  • the auxiliary windings L1 'and L1 ⁇ or L2', L2 ⁇ are connected to the two electrodes of each fluorescent lamp LL1, LL2, whereby an improvement in the heating of the electrodes is achieved. These measures therefore sufficiently heat the electrodes even when dimming.
  • the capacitors C1, C2 according to FIG. 1 are replaced by capacitors C. each lying in series with the lamp and the inductors.
  • the pulse duty factor of the PWM module IC1 is usually changed via a variable DC voltage at the dimming input 7.
  • the disadvantage here is that there is no electrical isolation between the dimmer or brightness controller and the lamp. 2, therefore, an optocoupler IC3 with a downstream low-pass filter R1, C6 is used, the light-emitting diode of the optocoupler being led via a resistor R2 to the terminals 9, 10 of the electronic ballast EVG1 for connection to the dimmer transmitter.
  • the external dimmer is also provided as a PWM module 11, whose duty cycle is changed for brightness control.
  • the pulse signals supplied by the PWM module 11 are transmitted by the optocoupler IC3 and smoothed by the low-pass filter R1, C6, so that a variable DC voltage is again present at the dimming input.
  • several electronic ballasts EVGn can be dimmed by the PWM module 11 by connecting the terminals 9, 10 in parallel.
  • rectifier bridges can be provided in the ballasts, which are connected to the terminals 9, 10.
  • the external dimmer 11 can also be used with an integrated PWM control module for brightness control, wherein, as indicated in FIG. 2, several electronic ballasts can also be dimmed by connecting the terminals 9, 10 in parallel.

Abstract

An electronic ballast for low-pressure discharge lamps supplied from DC or AC voltage networks, having an invertor (1) which supplies at least one lamp (8) via a capacitive reactance (6) connected in parallel with it and an inductive reactance (2) connected in series with it, an electronic harmonic filter (4) with a step-up inductor (L3) and a digital control circuit (2) for the invertor, which control circuit is connected to a DC voltage supply circuit (3). The DC voltage supply circuit is connected to the harmonic filter and has a capacitor (C3) which can be charged to the supply voltage of the control circuit via a first transistor (T4). The first transistor switches on immediately after the supply voltage of the electronic ballast has switched on. A blocking circuit (R6, R7, C4, T5) switches the first transistor off once the capacitor is charged and the latter is continuously recharged via an additional auxiliary winding (N1) of the step-up inductor and a rectifier circuit (D1-D4) connected thereto. In consequence, the voltage required to supply the control circuit is made available immediately after the start, in the case of both DC and AC voltage operation. <IMAGE>

Description

Die Erfindung betrifft ein elektronisches Vorschaltgerät für aus Gleich- und Wechselspannungsnetzen versorgte Niederdruckentladungslampen nach dem Oberbegriff des Hauptanspruchs.The invention relates to an electronic ballast for low-pressure discharge lamps supplied from direct and alternating voltage networks according to the preamble of the main claim.

Aus der DE-OS 38 05 159 ist ein elektronisches Vorschaltgerät bekannt, das einen Wechselrichter in Halbbrückenschaltung aufweist, der mindestens eine Lampe speist, wobei ein kapazitiver Blindwiderstand parallel zur Lampe liegt und ein induktiver Widerstand in Reihe zur Lampe und kapazitivem Blindwiderstand geschaltet ist. Die Leistungstransistoren des Wechselrichters in Halbbrückenschaltung werden von einer zwei Steuerkreise aufweisenden Ansteuerschaltung digital angesteuert, wobei zwei um eine Halbperiode versetzte Ansteuerspannungen, zwischen denen eine Pulslücke vorhanden ist, erzeugt werden. Die Gleichspannungsversorgung geschieht über einen Trenntransformator mit zwei galvanisch getrennten Sekundärwicklungen. Dieses bekannte elektronische Vorschaltgerät weist aber den Nachteil auf, daß der Betrieb an einem Gleichspannungsnetz nicht möglich ist, da zur Versorgung der Ansteuerschaltung ein Hilfstransformator nötig ist.From DE-OS 38 05 159 an electronic ballast is known which has an inverter in a half-bridge circuit which feeds at least one lamp, a capacitive reactance connected in parallel with the lamp and an inductive resistor connected in series with the lamp and capacitive reactance. The power transistors of the inverter in a half-bridge circuit are controlled digitally by a control circuit having two control circuits, two control voltages offset by a half-period, between which a pulse gap is present, being generated. The DC voltage is supplied via an isolating transformer with two galvanically isolated ones Secondary windings. However, this known electronic ballast has the disadvantage that operation on a DC voltage network is not possible, since an auxiliary transformer is required to supply the control circuit.

Aus der Literatur (PWM-Controller-Chip - Fixes Power Factor, Frank Goodenough, ELECTRONIC DESIGN - INTERNATIONAL, June 1989) ist es bekannt, bei modernen elektronischen Vorschaltgeräten sogenannte elektronsiche Oberschwingungsfilter zur Erhöhung des Leistungsfaktors und gleichzeitiger Reduzierung von Oberschwingungen des Netzstroms zu verwenden. Dabei wird eine als Hochsetzsteller bekannte Schaltung angewendet, die im wesentlichen aus einer Speicherinduktivität mit zwei Wicklungen, einem Schalttransistor, einer Diode, einem Ladekondensator und einer Sinus-Steuereinheit besteht.From the literature (PWM controller chip - Fixes Power Factor, Frank Goodenough, ELECTRONIC DESIGN - INTERNATIONAL, June 1989) it is known to use so-called electronic harmonic filters in modern electronic ballasts to increase the power factor and at the same time reduce harmonics of the mains current. A circuit known as a step-up converter is used, which essentially consists of a memory inductor with two windings, a switching transistor, a diode, a charging capacitor and a sine control unit.

Ein Vorschaltgerät ist aus der DE 39 13 033 A1 bekannt, bei der in der Einschaltphase die Versorgungsgleichspannung für die Steuerschaltung über einen eine Dauerverlustleistung bewirkenden hochohmigen Widerstand von dem dem Wechselrichter vorgeschalteten Gleichrichter geliefert wird. Nach dem Einschalten wird die Versorgungsspannung von einem im Lastkreis angeordneten Stromwandler und einem zweiten Wechselrichter erzeugt.A ballast is known from DE 39 13 033 A1, in which in the switch-on phase the DC supply voltage for the control circuit via a a high-resistance resistor causing permanent power dissipation is supplied by the rectifier connected upstream of the inverter. After switching on, the supply voltage is generated by a current transformer arranged in the load circuit and a second inverter.

Die EP 0 059 064 offenbart ein Vorschaltgerät, das einen Inverter aufweist, der einen Gleichstrom empfängt und einen Wechselstom liefert. Ein Steuerkreis steuert den Inverter in der Weise, daß er bei einer Frequenz über der Resonanzfrequenz der Lampe arbeitet, wenn eingeschaltet wird. Dann wird er in der Frequenz in Richtung der Resonanzfrequenz geändert, wodurch die Lampe aufgrund der verstärkten Spannung zündet.EP 0 059 064 discloses a ballast which has an inverter which receives a direct current and supplies an alternating current. A control circuit controls the inverter to operate at a frequency above the resonant frequency of the lamp when it is turned on. Then it is changed in frequency in the direction of the resonance frequency, whereby the lamp ignites due to the amplified voltage.

Ausgehend von diesem bekannten Stand der Technik liegt der Erfindung die aufgabe zugrunde, ein dimmbares elektronisches Vorschaltgerät für Niederdruck-Entladungslampen mit gutem Wirkungsgrad zu schaffen, das sowohl für Gleichspannungs- als auch Wechselspannungsbetrieb geeignet ist und sicher und schnell das Starten der Lampen ermöglicht.Based on this known prior art, the invention has for its object to provide a dimmable electronic ballast for low-pressure discharge lamps with good efficiency, which is suitable for both DC and AC operation and enables the lamps to be started quickly and safely.

Diese Aufgabe wird erfindungsgemäß durch die kennzeichnenden Merkmale des Hauptanspruchs in Verbindung mit den Merkmalen des Oberbegriffs gelöst.This object is achieved by the characterizing features of the main claim in conjunction with the features of the preamble.

Dadurch, daß die Hochsetzstellerdrossel des Oberschwingungsfilters eine zusätzliche Hilfswicklung aufweist, die mit einer Gleichrichterschaltung und dem Kondensator der Gleichspannungsversorgungsschaltung für die digitale Ansteuerschaltung verbundn ist, wird der Kondensator ständig aufgeladen und auf die notwendige Versorgungsspannung für die Ansteuerschaltung stabilisiert. Damit die eine oder die mehreren Lampen sowohl beim Betrieb an Gleichspannungsals auch Wechselspannungsnetzen sicher starten, weist die mit dem Oberschwingungsfilter verbundene Gleichspannungsversorgungsschaltung einen ersten Transistor auf, der sofort nach Einschalten der Versorgungsspannung des elektronischen Vorschaltgerätes leitend wird und den Kondensator auf die Versorgungsspannung der Ansteuerschaltung auflädt, wobei der erste Transistor nach Aufladen des Kondensators von einer Sperrschaltung gesperrt wird. Auf diese Weise wird sowohl bei Gleichspannungs- als auch bei Wechselspannungsbetrieb sofort nach dem Start die für die Versorgung der Ansteuerschaltung notwendige Spannung zur Verfügung gestellt.Characterized in that the step-up choke of the harmonic filter has an additional auxiliary winding which is connected to a rectifier circuit and the capacitor of the DC voltage supply circuit for the digital drive circuit, the capacitor constantly charged and stabilized to the necessary supply voltage for the control circuit. So that the one or more lamps start reliably when operating on DC voltage as well as AC voltage networks, the DC voltage supply circuit connected to the harmonic filter has a first transistor which becomes conductive immediately after the supply voltage of the electronic ballast is switched on and charges the capacitor to the supply voltage of the control circuit, wherein the first transistor is blocked by a blocking circuit after charging the capacitor. In this way, the voltage required for supplying the control circuit is made available immediately after the start in both direct voltage and alternating voltage operation.

Durch die in den Unteransprüchen angegebenen Maßnahmen sind vorteilhafte Weiterbildungen und Verbesserungen möglich. Besonders vorteilhaft ist, daß der induktive Blindwiderstand der mindestens einen Lampe zwei voneinander galvanisch getrennte Hilfswicklungen aufweist, die jeweils mit den Elektroden der Lampe verbunden sind. Durch diese Maßnahme wird das Dimmverhalten gegenüber dem des Standes der Technik verbessert, da dort die Lampenelektroden nicht ausreichend geheizt wurden.Advantageous further developments and improvements are possible through the measures specified in the subclaims. It is particularly advantageous that the inductive reactance of the at least one lamp has two auxiliary windings which are electrically isolated from one another and are each connected to the electrodes of the lamp. This measure improves the dimming behavior compared to that of the prior art, since there the lamp electrodes were not sufficiently heated.

Weiterhin vorteilhaft ist, parallel zu den Lampenelektroden ein Dämpfungsglied, vorzugsweise aus einer Reihenschaltung eines Widerstandes, beispielsweise eines ohmschen oder komplexen oder nichtlinearen Widerstandes oder dgl., und einer Diode, zu schalten, da dadurch sogenannte "laufende Schichten", die durch Instabilitäten der Bogenentladung insbesondere bei sehr weit heruntergedimmten Lampen (unterhalb von 10 % der maximalen Helligkeit) entstehen und visuelle Störungen erzeugen, nicht mehr auftreten.It is also advantageous to connect an attenuator in parallel with the lamp electrodes, preferably from a series connection of a resistor, for example an ohmic or complex or non-linear resistor or the like, and a diode, since this causes so-called "Running layers", which arise due to instabilities in the arc discharge, particularly with lamps dimmed very far (below 10% of the maximum brightness) and produce visual disturbances, no longer occur.

Wenn ein externer Dimmgeber,beispielsweise ein PWM-Baustein vorgesehen ist, ist es vorteilhaft, diesen mit der Ansteuerschaltung über einen Optokoppler zu verbinden, da damit eine galvanische Trennung vorgegeben wird.
Ausführungsbeispiele der Erfindung sind in der Zeichnung dargestellt und werden in der nachfolgenden Beschreibung näher erläutert.
Es zeigen:

Fig. 1
die schaltungsgemäße Ausgestaltung eines elektronischen Vorschaltgerätes nach einem ersten Ausführungsbeispiel,
Fig. 2
die schaltungsgemäße Ausgestaltung eines elektronischen Vorschaltgerätes nach einem zweiten Ausführungsbeispiel mit externem Dimmgeber und optischer Kopplung zur galvanischen Trennung,
Fig. 3
eine Schaltungsanordnung für einen integrierten Hochvolt-Halbbrückentreiber (sogenannter HVIC),
Fig. 4
ein zweites Ausführungsbeispiel für eine bei der Erfindung verwendete Steuerschaltung, und
Fig. 5
ein drittes Ausführungsbeispiel für eine bei der Erfindung verwendete Steuerschaltung
If an external dimming transmitter, for example a PWM module, is provided, it is advantageous to connect it to the control circuit via an optocoupler, since this specifies electrical isolation.
Exemplary embodiments of the invention are shown in the drawing and are explained in more detail in the following description.
Show it:
Fig. 1
the circuit design of an electronic ballast according to a first embodiment,
Fig. 2
the circuit configuration of an electronic ballast according to a second embodiment with external dimmer and optical coupling for electrical isolation,
Fig. 3
a circuit arrangement for an integrated high-voltage half-bridge driver (so-called HVIC),
Fig. 4
a second embodiment of a control circuit used in the invention, and
Fig. 5
a third embodiment of a control circuit used in the invention

Die in Fig. 1 dargestellte Schaltungsanordnung für ein elektronisches Vorschaltgerät für Niederdruck-Entladungslampen, bei dem die Lampen zur Erzielung einer besseren Lichtausbeute mit einem Hochfreguenzstrom versorgt werden, besteht aus einem Wechselrichter 1 in Halbbrückenschaltung, einer Steuerschaltung 2 zur Ansteuerung des Wechselrichters, einer Gleichspannungsversorgungsschaltung 3, die die Versorgungsspannung für die Steuerschaltung 2 liefert,und einem Oberschwingungsfilter 4, das die Netzstrom-Oberschwingungen begrenzt. Das als Hochsetzsteller oder Aufwärts-Wandler ausgebildete Oberschwingungsfilter 4 besteht im wesentlichen aus einer Hochsetzstellerdrossel L3 mit zwei Wicklungen N2, N3, die jeweils mit den Anschlüssen eines Brückengleichrichters D5-D8 verbunden sind, dessen andere Klemmen 5, 6 an einer Netzspannung bzw. einem HF-Filter liegen, aus einem als Schalttransistor T3 ausgeildeten Halbleiterschalter, einer sowohl mit der Wicklung N3 der Hochsetzstellerdrossel L3 als auch mit dem Drainanschluß des Schalttransistors T3 verbundenen Diode D9 und einem an die Diode D9 angeschlossenen Ladekondensator C5, der an Masse liegt und eine Ladespannung von UBr aufweist. Der Schalttransistor T3 wird über seinen Gateanschluß von Steuerlogik IC2 gesteuert, die über entsprechende Verbindungsleitungen Informationen hinsichtlich der Eingangsspannung |UE|, der Ladespannung UBr und des Iststromes erhält und außerdem mit der Steuereinheit 2 verbunden ist. Der Hochsetzsteller ermöglicht die stufenlose Transformation einer Eingangsgleichspannung |UE| auf ein höheres Ausgangsgleichspannungsniveau (UBr) mit hohem Wirkungsgrad. Die Steuerlogik ist derart gestaltet, daß dem Stromversorgungsnetz ein oberwellenarmer nahezu sinusförmiger Strom entnommen wird, wobei der Leistungsfaktor fast 1 beträgt und am Ausgang eine geregelte Gleichspannung zur Verfügung steht. Die Gleichspannungsversor gungsschaltung 3 weist einen als selbstsperrender N-Kanal MOS-FET ausgebildeten Transistor T4 auf, dessen Drainanschluß über einen Widerstand R4 zur Strom begrenzung mit der Klemme UBr und dessen Sourceanschluß mit einem Kondensator C3 verbunden ist, wobei eine als Z-Diode ausgebildete Stabilisierungsdiode D11 am Gateanschluß des Transistors T4 und an dem Kollektor eines Transistors T5 liegt, der über einen Widerstand R5 mit der Klemme UBr verbunden ist. Der Emitter des Transistors T5, die Z-Diode D11 und der Kondensator C3 liegen mit ihren anderen Anschlüssen an Masse. Die Basis des Transistors T5 ist über einen Widerstand R6 mit der Verbindung zwischen Brückengleichrichter D5-D8 und Wicklung N3 verbunden,und parallel zur Basis-Emitterstrecke liegt ein paralleles RC-Glied C4, R7.
Der Kondensator C3 liefert an seiner Klemme UV die Gleichspannung für die Versorgung der Steuerschaltung 2. Die Hochsetzstellerdrossel L3 weist eine zusätzliche Hilfswicklung N1 auf, die über einen Widerstand R3 und einen Brückenzweig des Brückengleichrichters D1 bis D4 mit der Klemme UV verbunden ist, wobei parallel zum Kondensator C3 eine weitere Z-Diode D10 liegt.
The circuit arrangement shown in FIG. 1 for an electronic ballast for low-pressure discharge lamps, in which the lamps are supplied with a high-frequency current in order to achieve a better light yield, consists of an inverter 1 in a half-bridge circuit, a control circuit 2 for controlling the inverter, and a DC voltage supply circuit 3 , which supplies the supply voltage for the control circuit 2, and a harmonic filter 4, which limits the mains current harmonics. The harmonic filter 4 designed as a step-up converter or step-up converter essentially consists of a step-up converter choke L3 with two windings N2, N3, each of which is connected to the connections of a bridge rectifier D5-D8, the other terminals 5, 6 of which are connected to a mains voltage or an HF -Filters are made of a semiconductor switch designed as a switching transistor T3, a diode D9 connected to both the winding N3 of the step-up converter choke L3 and to the drain of the switching transistor T3 and a charging capacitor C5 connected to the diode D9, which is connected to ground and has a charging voltage of U Br has. The switching transistor T3 is controlled via its gate connection by control logic IC2, which receives information regarding the input voltage | U E |, the charging voltage U Br and the actual current via corresponding connecting lines and is also connected to the control unit 2. The step-up converter enables the continuous transformation of a DC input voltage | U E | to a higher DC output level (U Br) with high efficiency. The control logic is designed such that a low harmonic, almost sinusoidal current is taken from the power supply network, wherein the power factor is almost 1 and a regulated DC voltage is available at the output. The DC voltage supply circuit 3 has a trained as a self-locking N-channel MOS-FET transistor T4, the drain connection via a resistor R4 for current limitation to the terminal U Br and its source connection is connected to a capacitor C3, one designed as a Z diode Stabilizing diode D11 is connected to the gate terminal of transistor T4 and to the collector of a transistor T5, which is connected to terminal U Br via a resistor R5. The emitter of the transistor T5, the Zener diode D11 and the capacitor C3 are connected to ground with their other connections. The base of transistor T5 is connected via a resistor R6 to the connection between bridge rectifier D5-D8 and winding N3, and a parallel RC element C4, R7 is located parallel to the base-emitter path.
The capacitor C3 supplies at its terminal U V the direct voltage for supplying the control circuit 2. The step-up converter choke L3 has an additional auxiliary winding N1, which is connected to the terminal U V via a resistor R3 and a bridge arm of the bridge rectifier D1 to D4, whereby a further Z diode D10 is connected in parallel with the capacitor C3.

Die Steuerschaltung 2 besteht aus einem integrierten Pulsweitenmodulations-Baustein IC1 und einem integrierten Hochvolt-Halbbrückentreiber HVIC, der weiter unten näher erläutert wird. Der PWM-Baustein IC1 (z.B. IC 3525 A) weist einen Dimmeingang 7 auf, der beispielsweise mit einem Dimmgeber verbunden sein kann, der eine der gewünschten Helligkeit entsprechende variable Gleichspannung liefert. Die Steuerschaltung 2 ist mit dem Wechselrichter 1 verbunden, der in bekannter Weise zwei Halbbrücken-Transistoren T1, T2 und in dem zweiten Brückenzweig den kapazitiven Spannungsteiler C1, C2 aufweist. In der Brückendiagonale liegt die Lampenanordnung 8, die weiter unten näher beschrieben wird. Zu dem Aufbau und der Funktion des Wechselrichters wird ergänzend auf die DE-OS 38 05 159 Bezug genommen.The control circuit 2 consists of an integrated pulse width modulation component IC1 and an integrated high-voltage half-bridge driver HVIC, which is explained in more detail below. The PWM module IC1 (eg IC 3525 A) has a dimming input 7, which can be connected to a dimmer, for example, which delivers a variable DC voltage corresponding to the desired brightness. The control circuit 2 is connected to the inverter 1, which in a known manner has two half-bridge transistors T1, T2 and, in the second bridge branch, the capacitive voltage divider C1, C2. The lamp arrangement 8, which is described in more detail below, lies in the bridge diagonal. For the structure and function of the inverter, reference is also made to DE-OS 38 05 159.

Im folgenden wird die Funktionsweise insbesondere der Gleichspannungsversorgungsschaltung 3 in Zusammenhang mit dem Oberschwingungsfilter 4 beschrieben.The mode of operation of the DC voltage supply circuit 3 in connection with the harmonic filter 4 is described below.

Beim Einschalten der Netzspannung an den Klemmen 5, 6, beispielsweise bei 230 V Wechselspannung oder 230 V Gleichspannung, wird über die Dioden D1 bis D4 der Brückenschaltung, die Wicklung N3 der Hochsetzstellerdrossel L3 und über die Diode D9 der Ladekondensator C5 auf etwa den Scheitelwert der Netzspannung aufgeladen. Die Ladespannung UBr an dem Ladekondensator C5 bewirkt, daß am Gate des Transistors T4 über den Widerstand R5 und die Z-Diode D11 eine positive Spannung von 15 V entsteht, wodurch der Transistor T4 leitend wird und der Kondensator C3 auf die Spannung UV, nämlich ungefähr +15 V aufgeladen wird. Da der Transistor T4 als selbstsperrender N-Kanal MOS-Feldeffekttransistor ausgebildet ist, sperrt er sofort wieden, denn die Spannung an Source und Gate ist etwa gleich.When switching on the mains voltage at terminals 5, 6, for example with 230 V AC or 230 V DC, the diodes D1 to D4 of the bridge circuit, the winding N3 of the step-up choke L3 and the diode D9 of the charging capacitor C5 reach approximately the peak value of the Mains voltage charged. The charging voltage U Br at the charging capacitor C5 causes a positive voltage of 15 V to develop at the gate of the transistor T4 via the resistor R5 and the Zener diode D11, as a result of which the transistor T4 becomes conductive and the capacitor C3 switches to the voltage U V , namely about +15 V is charged. Since the transistor T4 is designed as a normally-off N-channel MOS field-effect transistor, it blocks again immediately, because the voltage at the source and gate is approximately the same.

Wenn der Transistor T4 leitend geworden ist, ist der zweite Transistor T5 noch gesperrt, da der Kondensator C4 des RC-Gliedes ungeladen ist. Nach einer durch die Dimensionierung der Widerstände R6, R7 und C4 bestimmten Zeitkonstanten wird der Transistor T5 leitend und sperrt dadurch den Transistor T4. Wenn die Netzspannung an den Klemmen 5, 6 ausgeschaltet wird, entlädt sich der Kondensator C4 über den Widerstand R7, wobei die Zeitkonstante dieses RC-Gliedes C4, R7 so gewählt ist, daß der Transistor T5 innerhalb einer Sekunde nach dem Ausschalten der Netzspannung wieder startbereit ist, d.h. sich im nichtleitenden Zustand befindet. Dadurch wird ein schnelles Wiedereinschalten des elektronischen Vorschaltgerätes ermöglicht. Selbstverständlich sind auch andere Anschlußmöglichkeiten für den Widerstand R6 und das RC-Glied R7, C4 denkbar, die ein kontrolliertes Auf- und Entladen des Kondensators 4 sicherstellen.If the transistor T4 has become conductive, the second transistor T5 is still blocked since the Capacitor C4 of the RC element is uncharged. After a time constant determined by the dimensioning of the resistors R6, R7 and C4, the transistor T5 becomes conductive and thereby blocks the transistor T4. When the mains voltage at the terminals 5, 6 is switched off, the capacitor C4 discharges through the resistor R7, the time constant of this RC element C4, R7 being selected such that the transistor T5 is ready to start again within one second after the mains voltage has been switched off is, ie is in the non-conductive state. This enables the electronic ballast to be switched on again quickly. Of course, other connection options for the resistor R6 and the RC element R7, C4 are also conceivable, which ensure a controlled charging and discharging of the capacitor 4.

Die beschriebene Anordnung dient als Startschaltung, damit beim Betrieb an Gleich- oder Wechselspannungsnetzen ein sicherer Start ermöglicht wird.The arrangement described serves as a starting circuit so that a safe start is made possible when operating on direct or alternating voltage networks.

Wenn die Steuerschaltung über die eben beschriebene Startschaltung mit der Spannung UV versorgt wird, fängt sie an zu arbeiten und liefert, wie weiter unten beschrieben wird, an ihren Ausgängen zwei versetzt zueinander angeordnete Signale. Gleichzeitig liefert die Steuerschaltung 2 Triggersignale an die Steuerlogik IC2, die den Transistor T3 schaltet, wodurch der eigentliche durch die Drossel L3 (bzw. N3) fließende Strom durch einen Hochfrequenz-Rippelstrom überlagert wird. Dies gilt sowohl für Wechselspannungs- als auch Gleichspannungsversorgung an den Klemmen 5,6.When the control circuit is supplied with the voltage U V via the start circuit just described, it begins to work and, as will be described further below, supplies two signals arranged offset to one another at its outputs. At the same time, the control circuit supplies 2 trigger signals to the control logic IC2, which switches the transistor T3, as a result of which the actual current flowing through the choke L3 (or N3) is superimposed by a high-frequency ripple current. This applies to both AC and DC voltage supply at terminals 5,6.

Dadurch wird während des Betriebes der Kondensator C3 aufgeladen, und zwar über die Hilfswicklung N1, den Widerstand R3 und die Brückenschaltung D1 bis D4.
Die an der Hilfswicklung N1 entstehende Wechselspannung wird über den Widerstand R3 mit der Brückenschaltung D1 bis D4 zweiweg-gleichgerichtet. Die Spannung an dem Kondensator C3 wird mit der Z-Diode D10 auf ca. 15 V stabilisiert.
As a result, the capacitor C3 is charged during operation, specifically via the auxiliary winding N1, the resistor R3 and the bridge circuit D1 to D4.
The alternating voltage generated on the auxiliary winding N1 is rectified in two-way fashion via the resistor R3 with the bridge circuit D1 to D4. The voltage on the capacitor C3 is stabilized to approximately 15 V with the Zener diode D10.

Der Pulsweitenmodulations-Baustein, PWM-Baustein, IC1 besteht im wesentlichen aus einem Rechteckgenerator mit variablem Tastverhältnis und einer nachgeschalteten Logikschaltung, die derart ausgebildet ist, daß an den Ausgängen zwei zeitlich zueinander versetzte Impulse geliefert werden, wobei zwischen den Impulsen eine Impulslücke vorgesehen wird, durch die verhindert wird, daß die nachgeschalteten Halbbrücken-Transistoren T1, T2 gleichzeitig leitend werden. Durch Anlegen einer Gleichspannung veränderlicher Größe an den Dimmeingang 7 wird das Tastverhältnis des PWM-Bausteins IC1 verändert, d.h. die Pulslücke zwischen den zwei Ausgangssignalen des PWM-Bausteins IC1 wird verändert.The pulse width modulation module, PWM module, IC1 essentially consists of a square-wave generator with a variable pulse duty factor and a downstream logic circuit which is designed in such a way that two pulses offset in time are delivered to the outputs, a pulse gap being provided between the pulses, by which it is prevented that the downstream half-bridge transistors T1, T2 become conductive at the same time. The pulse duty factor of the PWM module IC1 is changed by applying a DC voltage of variable size to the dimming input 7, i.e. the pulse gap between the two output signals of the PWM module IC1 is changed.

Die Ausgangssignale des PWM-Bausteins IC1 gelangen auf den Hochvolt-Halbbrückentreiber HVIC, dessen Aufbau und Funktion anhand des Schaltbildes nach Fig. 3 näher erläutert wird.The output signals of the PWM module IC1 go to the high-voltage half-bridge driver HVIC, the structure and function of which is explained in more detail with reference to the circuit diagram in FIG. 3.

Bei dem integrierten Hochvolt-Brückentreiber HVIC wird eine sogenannte Bootstrap-Schaltung verwendet, die bei unterschiedlichen im Handel befindlichen Brückentreibern extern beschaltet werden können oder integriert sind.
In dem HVIC sind zwei Treiber Tr1, Tr2, die die Transistoren T1, T2 ansteuern. Der Treiber Tr2 liegt an der Versorgungsspannung UV, während der Treiber Tr1 eine Versorgungsspannung benötigt, die berücksichtigt, daß der Lastpunkt zwischen zwei Transistoren T1, T2 zwischen den Spannungen von ungefähr UBr und ungefähr O V schwankt. Dazu ist die Bootstrap-Schaltung vorgesehen, die aus der Diode D12, dem in Reihe dazu geschalteten Schutzwiderstand R8 und dem Kondensator C7 besteht, wobei der Kondensator C7 einerseits an dem Lastpunkt und andererseits an dem Widerstand R8 angeschlossen ist, der an der Ladespannung UBr liegt. Die Diode D12 ist mit der Versorgungsspannung UV verbunden. Wenn der Transistor T2 leitet, kann sich der Kondensator C7 auf etwa UV aufladen, da der Lastpunkt etwa auf Masse liegt. Wenn T2 sperrt und anschließend T1 leitet, liegt der Lastpunkt etwa auf UBr, und am Kondensator liegt eine Spannung von etwa UBr + UV an, wodurch eine schwebende Versorgungsspannung für den Treiber Tr1 erzielt wird.
With the integrated high-voltage bridge driver HVIC, a so-called bootstrap circuit is used, which can be externally connected or integrated with different bridge drivers currently on the market.
In the HVIC are two drivers Tr1, Tr2, which drive the transistors T1, T2. The driver Tr2 is connected to the supply voltage U V , while the driver Tr1 requires a supply voltage which takes into account that the load point between two transistors T1, T2 fluctuates between the voltages of approximately U Br and approximately OV. For this purpose, the bootstrap circuit is provided, which consists of the diode D12, the protective resistor R8 connected in series and the capacitor C7, the capacitor C7 being connected on the one hand to the load point and on the other hand to the resistor R8, which is connected to the charging voltage U Br lies. The diode D12 is connected to the supply voltage U V. When transistor T2 conducts, capacitor C7 can charge to approximately U V since the load point is approximately at ground. If T2 blocks and then T1 conducts, the load point is approximately at U Br , and a voltage of approximately U Br + U V is present at the capacitor, which results in a floating supply voltage for driver Tr1.

Das von dem PWM-Baustein IC1 gelieferte Schaltsignal für den Transistor 1 muß ebenfalls an die Pegelunterschiede zwischen der Spannung UBr und etwa 0 V angepaßt werden. Dazu dient die Spannungspegelverschiebungsschaltung S, die zwischen dem Signalausgang des PWM-Bausteins IC1 und dem Eingang des Treibers Tr1 liegt. In den im Handel befindlichen HVICs wird diese Pegelverschiebung auf unterschiedliche Weise realisiert, beispielsweise kann das Schaltsignal auf ein Impulssignal mit dem Pegel von UBr aufmoduliert oder überlagert werden.The switching signal for the transistor 1 supplied by the PWM module IC1 must also be adapted to the level differences between the voltage U Br and approximately 0 V. The voltage level shift circuit S, which lies between the signal output of the PWM module IC1 and the input of the driver Tr1, is used for this purpose. This level shift is used in the commercial HVICs Realized in different ways, for example the switching signal can be modulated or superimposed on a pulse signal with the level of U Br .

Zwei weitere Ausführungsbeispiele für die Steuerschaltung 2 sind in Fig. 4 und Fig. 5 dargestellt, wobei in Fig. 4 die Ausgänge des PWM-Bausteins an einen Impulstransformator 12 mit einer Primärwicklung N4 und zwei Sekundärwicklungen N5, N6, die mit den Transistoren T1, T2 verbunden sind und die Schaltsignale liefern, angeschlossen sind.
Fig. 5 zeigt eine Schaltung,in der ebenfalls die Bootstrap-Schaltung D12, R8 und C7 wie in Fig. 3 verwendet werden. Darüberhinaus ist ein Optokoppler OC vorgesehen, der unter Ausnutzung einer Potentialtrennung den Treiber Tr3 für den Transistor T1 ansteuert. Der Treiber Tr4 erhält das Schaltsignal direkt vom PWM-Baustein IC1.
4 and 5, two outputs of the PWM module to a pulse transformer 12 with a primary winding N4 and two secondary windings N5, N6, which are connected to the transistors T1, T2 are connected and the switching signals deliver, are connected.
FIG. 5 shows a circuit in which the bootstrap circuit D12, R8 and C7 as in FIG. 3 are also used. In addition, an optocoupler OC is provided which controls the driver Tr3 for the transistor T1 using potential isolation. The driver Tr4 receives the switching signal directly from the PWM module IC1.

An den Kondensatoren C1, C2 des Wechselrichters 1 liegt die Spannung UBr, die jeweils durch die Kondensatoren halbiert wird. Die Transistoren T1, T2 werden wechselseitig in den leitenden bzw. in den gesperrten Zustand geschaltet, und der Schaltkreis der Entladungslampen wird mit einer hochfrequenten Rechteckspannung angesteuert. Üblicherweise besteht dieser Entladungslampenschaltkreis 8 aus mindestens einer Entladungslampe LL, der ein Kondensator C parallelgeschaltet ist, wobei die Parallelschaltung in Reihe mit einer Induktivität L liegt. Selbstverständlich können mehrere solcher Anordnungen parallel zueinander vorgesehen sein. Im dargestellten Ausführungsbeispiel ist parallel zu den Lampenelektroden ein Dämpfungsglied geschaltet, das aus einem Widerstand R und einer Diode D besteht, wobei der Widerstand R ein ohmscher oder komplexer Widerstand oder ein anderer Widerstand oder eine Kombination sein kann. Durch dieses Dämpfungsglied wird das Dimmverhalten der Entladungslampe LL verbessert, da sogenannte "laufende Schichten", d.h. visuell störende Instabilitäten der Bogenentladung, bei sehr weit heruntergedimmten Lampen, d.h. unterhalb von 10 % der maximalen Helligkeit, vermieden werden.The voltage U Br , which is halved in each case by the capacitors, is present at the capacitors C1, C2 of the inverter 1. The transistors T1, T2 are mutually switched to the conductive or the blocked state, and the circuit of the discharge lamps is driven with a high-frequency square-wave voltage. Usually, this discharge lamp circuit 8 consists of at least one discharge lamp LL, to which a capacitor C is connected in parallel, the parallel connection being in series with an inductance L. Of course, several such arrangements can be provided in parallel. In the exemplary embodiment shown, an attenuator is connected in parallel with the lamp electrodes a resistor R and a diode D, wherein the resistor R can be an ohmic or complex resistor or another resistor or a combination. This damping element improves the dimming behavior of the discharge lamp LL, since so-called "running layers", ie visually disturbing instabilities of the arc discharge, are avoided with lamps dimmed very far, ie below 10% of the maximum brightness.

In Fig. 2 ist ein weiteres Ausführungsbeispiel dargestellt, wobei das Oberschwingungsfilter 4 und die Gleichspannungsversorgungsschaltung 3 gemäß Fig. 1 der Einfachheit halber weggelassen sind.FIG. 2 shows a further exemplary embodiment, the harmonic filter 4 and the DC voltage supply circuit 3 according to FIG. 1 being omitted for the sake of simplicity.

Der Entladungslampenschaltkreis 8 besteht in diesem Fall aus zwei Leuchtstofflampen LL1 und LL2 mit entsprechend parallelgeschalteten Kondensatoren C7, C8 und dem Dämpfungsglied R,D und den dazu in Reihe geschalteten Induktivitäten L1 und L2. Zusätzlich zu den Induktivitäten L1, L2 sind je zwei voneinander galvanisch getrennte Hilfswicklungen L1′ und L1˝ sowie L2′ und L2˝ vorgesehen. Die Hilfswicklungen L1′ und L1˝ bzw. L2′, L2˝ sind mit den zwei Elektroden jeder Leuchtstofflampe LL1, LL2 verbunden, wodurch eine Verbesserung der Heizung der Elektroden erzielt wird. Durch diese Maßnahmen werden daher die Elektroden auch beim Dimmen ausreichend geheizt. Die Kondensatoren C1, C2 nach Fig. 1 werden ersetzt durch jeweils in Reihe mit der Lampe und den Induktivitäten liegende Kondensatoren C.The discharge lamp circuit 8 in this case consists of two fluorescent lamps LL1 and LL2 with correspondingly connected capacitors C7, C8 and the attenuators R, D and the inductors L1 and L2 connected in series. In addition to the inductors L1, L2 two galvanically isolated auxiliary windings L1 'and L1 L2 as well as L2' and L2 galvan are provided. The auxiliary windings L1 'and L1˝ or L2', L2˝ are connected to the two electrodes of each fluorescent lamp LL1, LL2, whereby an improvement in the heating of the electrodes is achieved. These measures therefore sufficiently heat the electrodes even when dimming. The capacitors C1, C2 according to FIG. 1 are replaced by capacitors C. each lying in series with the lamp and the inductors.

Wie in Zusammenhang mit Fig. 1 oben erläutert, wird das Tastverhältnis des PWM-Bausteins IC1 üblicherweise über eine variable Gleichspannung am Dimmeingang 7 verändert. Dabei ist nachteilig, daß keine galvanische Trennung zwischen dem Dimmgeber oder Helligkeitsregler und der Lampe besteht. Gemäß Fig. 2 wird daher ein Optokoppler IC3 mit einem nachgeschalteten Tiefpaßfilter R1, C6 verwendet, wobei die Leuchtdiode des Optokopplers über einen Widerstand R2 zu den Klemmen 9, 10 des elektronischen Vorschaltgerätes EVG1 zum Anschluß an den Dimmgeber geführt wird. Dabei ist der externe Dimmgeber ebenfalls als PWM-Baustein 11 vorgesehen, dessen Tastverhältnis zur Helligkeitssteuerung verändert wird. Die vom PWM-Baustein 11 gelieferten Impulssignale werden vom Optokoppler IC3 übertragen und durch den Tiefpaß R1, C6 geglättet, so daß an dem Dimmeingang wieder eine veränderliche Gleichspannung anliegt.
Wie in Fig. 2 angedeutet, können auch mehrere elektronische Vorschaltgeräte EVGn durch Parallelschalten der Klemmen 9, 10 von dem PWM-Baustein 11 gedimmt werden.
Für einen Verpolschutz beim Anschluß der Klemmen 9,10 an den PWM-Baustein 11 können in den Vorschaltgeräten Gleichrichterbrücken vorgesehen sein, die mit den Klemmen 9, 10 verbunden sind.
As explained in connection with FIG. 1 above, the pulse duty factor of the PWM module IC1 is usually changed via a variable DC voltage at the dimming input 7. The disadvantage here is that there is no electrical isolation between the dimmer or brightness controller and the lamp. 2, therefore, an optocoupler IC3 with a downstream low-pass filter R1, C6 is used, the light-emitting diode of the optocoupler being led via a resistor R2 to the terminals 9, 10 of the electronic ballast EVG1 for connection to the dimmer transmitter. The external dimmer is also provided as a PWM module 11, whose duty cycle is changed for brightness control. The pulse signals supplied by the PWM module 11 are transmitted by the optocoupler IC3 and smoothed by the low-pass filter R1, C6, so that a variable DC voltage is again present at the dimming input.
As indicated in FIG. 2, several electronic ballasts EVGn can be dimmed by the PWM module 11 by connecting the terminals 9, 10 in parallel.
For reverse polarity protection when connecting the terminals 9, 10 to the PWM module 11, rectifier bridges can be provided in the ballasts, which are connected to the terminals 9, 10.

Der externe Dimmgeber 11 kann auch mit einem integrierten PWM-Steuerbaustein zur Helligkeitssteuerung eingesetzt werden, wobei, wie in Fig. 2 angedeutet, auch mehrere elektronische Vorschaltgeräte durch Parallelschalten der Klemmen 9, 10 gedimmt werden können.The external dimmer 11 can also be used with an integrated PWM control module for brightness control, wherein, as indicated in FIG. 2, several electronic ballasts can also be dimmed by connecting the terminals 9, 10 in parallel.

Selbstverständlich können auch andere Verfahren zum Dimmen von Entladungslampen anstelle der Änderung des Tastverhältnisses bei der Pulsweitenmodulation der Halbbrücken-Transistoren, wie im Ausführungsbeispiel beschrieben, verwendet werden. Beispielsweise kann die Frequenz des PWM-Bausteins IC1 geändert werden, die eine Änderung des induktiven Drosselwiderstandes hervorruft, wodurch sich die Lampenhelligkeit ändert.Of course, other methods for dimming discharge lamps can also be used instead of Change of the duty cycle in the pulse width modulation of the half-bridge transistors, as described in the exemplary embodiment, can be used. For example, the frequency of the PWM module IC1 can be changed, which causes a change in the inductive choke resistance, as a result of which the lamp brightness changes.

Claims (11)

  1. Electronic ballast for low-pressure discharge lamps supplied from d.c. or a.c. voltage networks with a d.c.- a.c. converter, which supplies at least one lamp via a capacitive reactance switched in parallel thereto and an inductive reactance switched in series thereto, and with a digital control circuit for the d.c.- a.c. converter connected to a d.c. voltage supply circuit, characterised in that said d.c. voltage supply circuit (3) is connected to an electronic harmonic filter (4) constructed in the form of an up converter and provided with an up converter choke, and has a capacitor (C3), which may be charged via a first transistor (T4) to the supply voltage of the control circuit (2), said first transistor (T4) being conductive immediately after the supply voltage of the electronic ballast has been switched on; that an inhibiting circuit (R6, R7, C4, T5) is provided which inhibits the first transistor (T4) after the capacitor (C3) has been charged; and that the capacitor (C3) is constantly recharged via an additional auxiliary winding (N1) of the choke (L3) and a rectifier circuit (D1-D4) connected thereto.
  2. Electronic ballast according to Claim 1, characterised in that the inhibiting circuit has a second transistor (T5) connected to the first transistor (T4) and an RC-section (C4, R7, R6) connected thereto, said second transistor (T5) is conductive after a time predetermined by the RC-section (C4, R7, R6) after the supply voltage of the ballast has-been switched on, and thus constantly inhibits the first transistor (T4).
  3. Electronic ballast according to Claim 1 or 2, characterised in that the control circuit (2) comprises a dimming device, by means of which the pulse duty cycle or frequency of the control signals for the rectifier can be changed.
  4. Electronic ballast according to one of Claims 1 to 3, characterised in that to improve the dimming behaviour of the at least one lamp (LL1, LL2), the inductive reactance (L1, 12) has two auxiliary windings (L1′, L1˝, L2′, L2˝) electrically isolated from one another, each being connected to the electrodes of the lamp (LL1, LL2).
  5. Electronic ballast according to one of Claims 1 to 4, characterised in that to prevent instabilities in the arc discharge during dimming, an attenuator (R, D) in the form of a series circuit comprising a diode and a resistance is switched in parallel to the electrodes of the lamp (L).
  6. Electronic ballast according to one of Claims 1 to 5, characterised in that the control circuit (2) is connected via an optical coupler (IC3) to a dimming emitter preferably in the form of a PWM module (11).
  7. Electronic ballast according to one of Claims 1 to 6, characterised in that the control circuit (2) has a pulse-width modulator (IC1).
  8. Electronic ballast according to one of Claims 1 to 7, characterised in that the control circuit (2) has an integrated high-voltage bridge driver (HVIC) with bootstrap circuit (D12, R8, C7).
  9. Electronic ballast according to one of Claims 1 to 7, characterised in that the control circuit (2) has a pulse transformer (12) connected to the pulse-width modulator (IC1).
  10. Electronic ballast according to one of Claims 1 to 7, characterised in that the control circuit (2) has two drivers (Tr3, Tr4), of which one (Tr4) is actuated directly by the pulse-width modulator and the other (Tr3) is actuated via an optical coupler (OC), said optical coupler (OC) and the corresponding driver (Tr3) being supplied with voltage by a bootstrap circuit (D12, R8, C7).
  11. Electronic ballast according to one of Claims 1 to 10, characterised in that a rectifying bridge is provided for reversed polarity protection at the input terminals (9, 10) for the external dimming emitter (11).
EP91250009A 1990-01-20 1991-01-17 Electronic ballast Expired - Lifetime EP0439240B1 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE19904001549 DE4001549A1 (en) 1990-01-20 1990-01-20 Electronic starter circuit for discharge lamps - has PWM integrated circuit with frequency varied to adjust brightness
DE4001549 1990-01-20
DE4018865A DE4018865A1 (en) 1990-01-20 1990-06-13 ELECTRONIC CONTROL UNIT FOR THE OPERATION OF DISCHARGE LAMPS
DE4018865 1990-06-13

Publications (3)

Publication Number Publication Date
EP0439240A2 EP0439240A2 (en) 1991-07-31
EP0439240A3 EP0439240A3 (en) 1992-08-19
EP0439240B1 true EP0439240B1 (en) 1995-06-21

Family

ID=25889237

Family Applications (1)

Application Number Title Priority Date Filing Date
EP91250009A Expired - Lifetime EP0439240B1 (en) 1990-01-20 1991-01-17 Electronic ballast

Country Status (3)

Country Link
EP (1) EP0439240B1 (en)
AT (1) ATE124202T1 (en)
DE (2) DE4018865A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8098022B2 (en) 2007-04-23 2012-01-17 Osram Ag Circuit configuration for operating at least one discharge lamp and method for generating an auxiliary voltage

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3257561B2 (en) * 1991-09-30 2002-02-18 東芝ライテック株式会社 Discharge lamp lighting device and lighting equipment
CH683219A5 (en) * 1992-04-06 1994-01-31 Starkstrom Elektronik Ag Electronic ballast for a low-pressure gas discharge lamp.
EP0620700A1 (en) * 1993-04-15 1994-10-19 Heinrich Korte Electronic ballast
JP2750072B2 (en) * 1993-07-27 1998-05-13 松下電工株式会社 Power converter
DE4328306A1 (en) * 1993-08-23 1994-03-17 Spindler Bernhard Dipl Ing Circuit for HF operation for low presence discharge lamps - has rectifier and inverter and several opto-couplers, with controlled load circuit
DE4406000A1 (en) * 1994-02-24 1995-08-31 Hilite Lighting And Electronic Dimmer for gas-discharge lamps driven off converter producing HF voltage
DE19543419A1 (en) * 1995-11-21 1997-05-22 Patent Treuhand Ges Fuer Elektrische Gluehlampen Mbh Method and circuit arrangement for operating cold cathode fluorescent lamps
DE29605087U1 (en) * 1996-03-19 1996-08-08 Trilux Lenze Gmbh & Co Kg Fluorescent ballast with step-up converter
US5719472A (en) * 1996-05-13 1998-02-17 General Electric Company High voltage IC-driven half-bridge gas discharge ballast
DE29609839U1 (en) * 1996-06-04 1996-08-22 Trilux Lenze Gmbh & Co Kg Fluorescent ballast
JP4252117B2 (en) 1997-05-16 2009-04-08 株式会社デンソー Discharge lamp device
DE10106438A1 (en) * 2001-02-09 2002-08-14 Patent Treuhand Ges Fuer Elektrische Gluehlampen Mbh Ballast for operating electric lamps
DE10134566A1 (en) * 2001-07-16 2003-02-06 Tridonicatco Gmbh & Co Kg Electronic ballast with preheating mode
DE102007058982A1 (en) * 2007-12-07 2009-06-10 Tridonicatco Gmbh & Co. Kg Operating device for e.g. gas-discharge lamp in emergency light device, has interface formed as input port, and control unit designed to switch interface such that interface serves for voltage supply for illuminating unit i.e. LED
JP2014512794A (en) 2011-04-22 2014-05-22 コーニンクレッカ フィリップス エヌ ヴェ Power supply circuit for PFC converter
JP6233568B2 (en) * 2013-09-27 2017-11-22 東芝ライテック株式会社 Power supply circuit and lighting device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0059064B1 (en) * 1981-02-21 1985-10-02 THORN EMI plc Lamp driver circuits
NL8702847A (en) * 1987-11-27 1989-06-16 Philips Nv DC-AC BRIDGE SWITCH.
DE3888675D1 (en) * 1988-04-20 1994-04-28 Zumtobel Ag Dornbirn Ballast for a discharge lamp.
FR2644314A1 (en) * 1989-03-10 1990-09-14 Harel Jean Claude ELECTRONIC STARTING AND SUPPLY DEVICE FOR FLUORESCENT TUBES WITH PREHEATABLE ELECTRODES

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8098022B2 (en) 2007-04-23 2012-01-17 Osram Ag Circuit configuration for operating at least one discharge lamp and method for generating an auxiliary voltage

Also Published As

Publication number Publication date
EP0439240A3 (en) 1992-08-19
EP0439240A2 (en) 1991-07-31
DE4018865A1 (en) 1991-12-19
ATE124202T1 (en) 1995-07-15
DE59105746D1 (en) 1995-07-27

Similar Documents

Publication Publication Date Title
EP0439240B1 (en) Electronic ballast
EP0264765B1 (en) Circuit arrangement for operating low-voltage halogen incandescent lamps
DE60024215T2 (en) MODULAR HIGH FREQUENCY BALLAST
EP0800335B1 (en) Circuit for operating electric lamps
WO1993012631A1 (en) Circuit for operating one or more low-pressure discharge lamps
EP1231821B1 (en) Ballast for electrical lamps
EP2089961A1 (en) Self-oscillating dc-dc converter and method therefor
DE102010029100A1 (en) Circuit arrangement for operating at least one discharge lamp and at least one LED
DE3829388A1 (en) CIRCUIT ARRANGEMENT FOR OPERATING A LOAD
EP1465330A2 (en) Method for varying the power consumption of capacitive loads
EP1467474A2 (en) Interface circuit for operation of capacitive loads
DE19640028A1 (en) Controlled-frequency device for operation of e.g. fluorescent lamp
EP0973359B1 (en) Electronic ballast with inrush current limitation
DE19517950A1 (en) Power supply facility
DE4005776C2 (en) Circuit arrangement for starting and operating a gas discharge lamp
EP0389847B1 (en) Circuit
EP0682464B1 (en) Circuit for operating electric lamps
EP0331157B1 (en) Switching power supply
DE19715341C1 (en) Electronic ballast with automatic restart
WO2005011338A1 (en) Circuit for operating high-pressure discharge lamps
DE4335375B4 (en) Power supply unit for supplying a gas discharge lamp
DE102004044180A1 (en) Electronic ballast with pumping circuit for discharge lamp with preheatable electrodes
DE102007052669B4 (en) Ballast for a gas discharge lamp, e.g. an HID lamp
EP0671867B1 (en) Circuit for operating a discharge lamp
EP0682465B1 (en) Circuit for operating incandescent lamps

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT CH DE FR IT LI

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AT CH DE FR IT LI

17P Request for examination filed

Effective date: 19921111

17Q First examination report despatched

Effective date: 19940419

ITF It: translation for a ep patent filed

Owner name: DE DOMINICIS & MAYER S.R.L.

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AT CH DE FR IT LI

REF Corresponds to:

Ref document number: 124202

Country of ref document: AT

Date of ref document: 19950715

Kind code of ref document: T

REF Corresponds to:

Ref document number: 59105746

Country of ref document: DE

Date of ref document: 19950727

ET Fr: translation filed
PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20000103

Year of fee payment: 10

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: AT

Payment date: 20000128

Year of fee payment: 10

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: CH

Payment date: 20000330

Year of fee payment: 10

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20010117

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20010131

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20010131

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20010928

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20011220

Year of fee payment: 12

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20030801

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES;WARNING: LAPSES OF ITALIAN PATENTS WITH EFFECTIVE DATE BEFORE 2007 MAY HAVE OCCURRED AT ANY TIME BEFORE 2007. THE CORRECT EFFECTIVE DATE MAY BE DIFFERENT FROM THE ONE RECORDED.

Effective date: 20050117