EP0410427A1 - Plug-in connection for circuit boards - Google Patents

Plug-in connection for circuit boards Download PDF

Info

Publication number
EP0410427A1
EP0410427A1 EP90114278A EP90114278A EP0410427A1 EP 0410427 A1 EP0410427 A1 EP 0410427A1 EP 90114278 A EP90114278 A EP 90114278A EP 90114278 A EP90114278 A EP 90114278A EP 0410427 A1 EP0410427 A1 EP 0410427A1
Authority
EP
European Patent Office
Prior art keywords
conductors
printed circuit
circuit boards
potential
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP90114278A
Other languages
German (de)
French (fr)
Other versions
EP0410427B1 (en
Inventor
Peter Dipl. Ing. Klimke
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wincor Nixdorf International GmbH
Original Assignee
Siemens AG
Wincor Nixdorf International GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Wincor Nixdorf International GmbH filed Critical Siemens AG
Priority to AT90114278T priority Critical patent/ATE95642T1/en
Publication of EP0410427A1 publication Critical patent/EP0410427A1/en
Application granted granted Critical
Publication of EP0410427B1 publication Critical patent/EP0410427B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/50Fixed connections
    • H01R12/59Fixed connections for flexible printed circuits, flat or ribbon cables or like structures
    • H01R12/62Fixed connections for flexible printed circuits, flat or ribbon cables or like structures connecting to rigid printed circuits or like structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/70Coupling devices
    • H01R12/77Coupling devices for flexible printed circuits, flat or ribbon cables or like structures
    • H01R12/777Coupling parts carrying pins, blades or analogous contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/70Coupling devices
    • H01R12/77Coupling devices for flexible printed circuits, flat or ribbon cables or like structures
    • H01R12/79Coupling devices for flexible printed circuits, flat or ribbon cables or like structures connecting to rigid printed circuits or like structures

Definitions

  • the invention relates to a connector for printed circuit boards, in particular data technology.
  • the object of the present invention is to create a connector for printed circuit boards with defined electrical properties, such as impedance, crosstalk and wave resistance.
  • the connector according to the invention is designed in such a way that at one end of a multilayer flexible printed circuit board has alternating levels for signal conductors and potential conductors, which are in a fixed geometrical configuration to one another in a particular geometrical resistance value to be achieved, in each case two superimposed ones Stiffening plates are laminated on, the first of which contains plated-through holes into which pins or soldering lugs are soldered, and the second are provided with cutouts for receiving solder at the locations where the holes of the first printed circuit board are located, and that the conductor tracks of the individual layers at the other end of the flexible film are exposed.
  • a solution to achieve a defined characteristic impedance provides that the conductors in the signal planes run parallel and in the longitudinal direction to the flexible conductor film, that the conductors in the potential planes are designed as a lattice work and that the conductor tracks running longitudinally to the film are arranged such that they are under or run above the spaces between the conductors of the signal planes.
  • the connector can also be designed such that the signal conductor level with its individual conductor paths is located between two planar potential conductor levels.
  • the conductors of the signal position and the longitudinal conductors of the potential position in the individual levels can also be congruent with one another. Another possibility is that the grid spacing of the potential conductors is greater than the grid spacing of the signal conductors.
  • a layer protrude laterally and forward over the flexible film 1 and to form it as a metal surface.
  • FIG. 1 shows the structure of a plug according to the invention, the flexible film 1 producing the connection from the printed circuit board 4 to the plug contacts, which are designed as pins 2.
  • the pins 2 are held in the laminated stiffening strips 8 and 9, respectively.
  • the plug part itself is held in a housing designed as a protective collar 3 via a cross member 30.
  • the third stiffening strip 6, which is attached to the other end of the film, is fastened with a notch nail 7 in the printed circuit board 4 and serves there as strain relief. At the solder joint 5, the contacts of the film are exposed and can be soldered to the conductor tracks of the circuit board there.
  • FIG. 2 shows a signal position of the flexible film 1 in the stretched state, the signal conductors 10 being guided to the bores 15 in which the connector pins 7 are located.
  • further conductors 11 are arranged at the rear end of the film between the signal conductors, which bring the potential via vias 16 from the potential level below into the signal plane, so that potential and signal conductors can be attached to the printed circuit board 4 in a simple manner .
  • Another layer is also designed as a shield plate 12.
  • FIG. 3 A potential position is shown in FIG. 3, where the potential conductors 17 are designed as lattice work, the lattice in the rear being denser than in the front.
  • the holes 15 for the signal conductor connections and the holes 18 for the potential conductor connections can also be seen in the upper part of the film.
  • the signal conductors 10 and the potential conductors 17 are arranged next to one another in one plane.
  • the signal conductors are in one level, the potential conductors in a second level, but offset such that they come to lie in the spaces between the signal conductors 10.
  • the signal conductors are arranged in one plane, while the potential conductors are designed as a metallic surface 20.
  • FIG 8 Another configuration is shown in FIG 8, in which the signal conductors are arranged in a separate plane between two flat potential planes.
  • FIG. 9 shows an arrangement in which signal conductors 10 and potential conductors 17 are located in two planes, but the signal and potential conductors are arranged congruently one above the other
  • FIG. 10 shows an arrangement in which the rasterization of signal and potential conductors are of different sizes, but the potential conductors are also always in a space between two signal conductors.

Landscapes

  • Structure Of Printed Boards (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Paper (AREA)

Abstract

The invention relates to a plug connector for printed-circuit boards, in particular in data technology. Since data processing installations are operated at ever higher clock frequencies, care must be taken above all to ensure that there is a defined characteristic impedance, which cannot be achieved with previous plug connections, at junction points between printed-circuit boards and plug connectors. The invention solves this problem in that a multilayer, flexible conductor film (1) has alternating planes (20) for signal conductors (10) and potential conductors (17), the conductors of the individual planes being in a fixed geometrical configuration with respect to one another for a specific characteristic impedance value which it to be achieved in each case. Laminated onto one end of the conductor film (1) are, in addition, two reinforcing plates (8, 9), resting one on top of the other, the first (8) of which contains through-plated holes into which pins (2) or solder tabs are soldered and the second (9) of which is provided with recesses for holding solder tin at the points at which the holes in the first printed-circuit board are located. The conductor tracks are additionally exposed at the other end of the film so that they can be soldered directly to a printed-circuit board. <IMAGE>

Description

Die Erfindung betrifft einen Steckverbinder für Leiterplatten, insbesondere der Datentechnik.The invention relates to a connector for printed circuit boards, in particular data technology.

Datenverarbeitungsanlagen werden mit immer höheren Taktfrequen­zen betrieben. Dadurch werden Signallaufzeiten, Übersprechen, Induktivitäten, Kapazitäten und Reflexionen an elektromechani­schen Schnittstellen, wie Steckverbindern immer kritischer. Die bisher eingesetzten Steckverbinder stellen die Verbindung zur Leiterplatte mit Anschlußbeinchen her und haben daher lange Signalwege und hohen Platzbedarf. Die meisten Steckverbinder weisen für hohe Taktfrequenzen ungeeignete Kennwert auf, da sie gewisse elektrische Eigenschaften, wie kontrollierten Wellenwi­derstand, in den geforderten Werten nicht erfüllen können.Data processing systems are operated at ever higher clock frequencies. As a result, signal propagation times, crosstalk, inductances, capacitances and reflections at electromechanical interfaces, such as connectors, are becoming increasingly critical. The connectors used up to now establish the connection to the printed circuit board with connecting pins and therefore have long signal paths and a large amount of space. Most connectors have an unsuitable characteristic value for high clock frequencies because they cannot meet certain electrical properties, such as controlled characteristic impedance, in the required values.

Aufgabe der vorliegende Erfindung ist es, einen Steckverbinder für Leiterplatten mit definierten elektrichen Eigenschaften, wie Impedanz, Übersprechen und Wellenwiderstand zu schaffen.The object of the present invention is to create a connector for printed circuit boards with defined electrical properties, such as impedance, crosstalk and wave resistance.

Zur Lösung dieser Aufgabe wird der Steckverbinder gemäß der Er­findung derart ausgebildet, daß am einen Ende einer mehrlagigen flexiblen Leiterplatte die abwechselnd Ebenen für Signalleiter und Potantialleiter aufweist, die in einer für einen jeweils zu erzielenden bestimmten Wellenwiderstandswert in einer festen geometrischen Konfiguration zueinander stehen, zwei aufeinan­derliegende Versteifungsplatten auflaminiert sind, von denen die erste durchkontaktierte Bohrungen enthält, in die Stifte oder Lötfahnen eingelötet sind, und die zweite mit Aussparungen zur Aufnahme von Lötzinn an den Stellen, an denen sich die Boh­rungen der ersten Leiterplatte befinden, versehen sind, und daß die Leiterbahnen der einzelnen Ebenen am anderen Ende der fle­xiblen Folie freigelegt sind.To achieve this object, the connector according to the invention is designed in such a way that at one end of a multilayer flexible printed circuit board has alternating levels for signal conductors and potential conductors, which are in a fixed geometrical configuration to one another in a particular geometrical resistance value to be achieved, in each case two superimposed ones Stiffening plates are laminated on, the first of which contains plated-through holes into which pins or soldering lugs are soldered, and the second are provided with cutouts for receiving solder at the locations where the holes of the first printed circuit board are located, and that the conductor tracks of the individual layers at the other end of the flexible film are exposed.

Durch diese Maßnahmen wird ein in seinen elektrischen Werten definierter Steckverbinder erhalten, wobei je nach geometri­scher Konfiguration sich die Wellenwiderstände ändern.These measures result in a connector defined in its electrical values, the wave resistances changing depending on the geometric configuration.

Vorteilhaft ist es auch am anderen Ende der flexiblen Folie einen dritten Versteifungsbügel aufzulaminieren, der im Bereich der freigelegten Enden der Leiterbahnen eine Aussparung be­sitzt.It is also advantageous to laminate a third stiffening bracket on the other end of the flexible film, which has a recess in the area of the exposed ends of the conductor tracks.

Eine Lösung zur Erzielung eines definierten Wellenwiderstandes sieht vor, daß die Leiter in den Signalebenen parallel und in Längsrichtung zur flexiblen Leiterfolie verlaufen, daß die Lei­ter in den Potentialebenen als Gitterwerk ausgebildet sind und die längs zur Folie verlaufenden Leiterbahnen so angeordnet sind, daß sie unter oder überhalb der Zwischenräume der Leiter der Signalebenen verlaufen.A solution to achieve a defined characteristic impedance provides that the conductors in the signal planes run parallel and in the longitudinal direction to the flexible conductor film, that the conductors in the potential planes are designed as a lattice work and that the conductor tracks running longitudinally to the film are arranged such that they are under or run above the spaces between the conductors of the signal planes.

Eine andere Lösung ergibt sich dadurch, daß die Leiter für die Signal- und die Potentialübertragung in einer Ebene und zwar abwechselnd nebeneinander angeordnet sind.Another solution results from the fact that the conductors for signal and potential transmission are arranged in one plane, alternately next to one another.

Wieder andere Werte des Wellenwiderstandes werden erhalten, wenn man die flexible Leiterfolie derart ausbildet, daß die Po­tentailleiter aus einer flächigen Metallage bestehen.Still other values of the wave resistance are obtained if the flexible conductor foil is formed in such a way that the potential conductors consist of a flat metal layer.

Weiterhin kann der Steckverbinder auch so ausgebildet sein, daß sich die Signalleiterebene mit ihren Einzelleiterbahnen zwi­schen zwei flächenhaft ausgebildeten Potentialleiterebenen be­findet.Furthermore, the connector can also be designed such that the signal conductor level with its individual conductor paths is located between two planar potential conductor levels.

Die Leiter der Signallage und die Längsleiter der Potentaillage in den einzelnen Ebenen können auch deckungsgleich untereinan­derliegen. Eine weitere Möglichkeit besteht darin, daß der Ra­sterabstand der Potentialleiter größer ist als der Rasterab­stand der Signalleiter.The conductors of the signal position and the longitudinal conductors of the potential position in the individual levels can also be congruent with one another. Another possibility is that the grid spacing of the potential conductors is greater than the grid spacing of the signal conductors.

Zur Schirmung ist es vorteilhaft, eine Lage seitlich und nach vorn über die flexible Folie 1 herausragen zu lassen und diese als Metallfläche auszubilden.For shielding, it is advantageous to have a layer protrude laterally and forward over the flexible film 1 and to form it as a metal surface.

Anhand der Ausführungsbeispiele nach den FIG 1 bis 10 wird die Erfindung näher erläutert.The invention is explained in more detail using the exemplary embodiments according to FIGS. 1 to 10.

Es zeigen

  • FIG 1 einen kompletten Steckverbinder, der an einer Leiterplat­te befestigt ist,
  • FIG 2 eine Signalebene der flexiblen Folie,
  • FIG 3 eine Potentailebene der flexiblen Folie,
  • FIG 4 Signal- und Potantialebene der flexiblen Folie übereinan­der dargestellt,
  • FIG 5 eine Ebene der flexiblen Folie der Signal- und Potential­leiter, die abwechselnd nebeneinander in einer Ebene angeordnet sind,
  • FIG 6 die Anordnung von Signalleitern und Potentialleitern in zwei Ebenen untereinander mit den einen Leitern in den jeweili­gen Zwischenräumen der anderen Leiter,
  • FIG 7 eine Anordnung mit Signalleitern in der einen und Poten­tialfläche in der darunterliegenden Ebene,
  • FIG 8 die Anordnung von Signalleitern zwischen zwei flächig an­geordneten Potentialebenen,
  • FIG 9 die Anordnung der Leiter der Signal- und der Potential­ebene sind in zwei Ebenen, aber unmittelbar untereinander,
  • FIG 10 eine Anordnung, bei der die Rasterung zwichen Signal- und Potentialleiterbahnen unterschiedlich groß ist.
Show it
  • 1 shows a complete connector that is attached to a circuit board,
  • 2 shows a signal level of the flexible film,
  • 3 shows a potential level of the flexible film,
  • 4 shows the signal and potential levels of the flexible film one above the other,
  • 5 shows a plane of the flexible film of the signal and potential conductors, which are arranged alternately next to one another in one plane,
  • 6 shows the arrangement of signal conductors and potential conductors in two levels with one another with the one conductors in the respective spaces between the other conductors,
  • 7 shows an arrangement with signal conductors in one level and potential area in the level below,
  • 8 shows the arrangement of signal conductors between two planar potential levels,
  • 9 shows the arrangement of the conductors of the signal and potential levels in two levels, but directly below one another,
  • 10 shows an arrangement in which the grid between signal and potential conductor tracks is of different sizes.

FIG 1 zeigt den Aufbau eines Steckers nach der Erfindung, wobei die flexible Folie 1 die Verbindung von der Leiterplatte 4 zu den Steckkontakten, die als Stifte 2 ausgebildet sind, her­stellt. Die Stifte 2 sind in den auflaminierten Versteifungs­leisten 8 bzw. 9 gehalten. Das Steckerteil selbst ist in einem als Schutzkragen 3 ausgebildeten Gehäuse über eine Traverse 30 gehalten. Die dritte Versteifungsleiste 6, die am anderen Ende der Folie angebracht ist, wird mit einem Kerbnagel 7 in der Leiterplatte 4 befestigt und dient dort als Zugentlastung. An der Lötstelle 5 sind die Kontakte der Folie freigelegt und kön­nen dort an den Leiterbahnen der Leiterplatte festgelötet wer­den.1 shows the structure of a plug according to the invention, the flexible film 1 producing the connection from the printed circuit board 4 to the plug contacts, which are designed as pins 2. The pins 2 are held in the laminated stiffening strips 8 and 9, respectively. The plug part itself is held in a housing designed as a protective collar 3 via a cross member 30. The third stiffening strip 6, which is attached to the other end of the film, is fastened with a notch nail 7 in the printed circuit board 4 and serves there as strain relief. At the solder joint 5, the contacts of the film are exposed and can be soldered to the conductor tracks of the circuit board there.

FIG 2 zeigt eine Signallage der flexiblen Folie 1 in gestreck­tem Zustand, wobei die Signalleiter 10 an die Bohrungen 15, in denen sich die Steckerstifte 7 befinden, geführt sind. Gleich­zeitig sind am hinteren Ende der Folie zwischen den Signallei­tern weitere Leiter 11 angeordnet, die das Potential über Durchkontaktierungen 16 aus der darunterliegenden Potentialebe­ne in die Signalebene bringen, so daß Potential- und Signallei­ter in einer Ebene liegend in einfacher Weise auf der Leiter­platte 4 befestigt werden können. Eine weitere Lage ist außer­dem als Schirmblech 12 ausgebildet.2 shows a signal position of the flexible film 1 in the stretched state, the signal conductors 10 being guided to the bores 15 in which the connector pins 7 are located. At the same time, further conductors 11 are arranged at the rear end of the film between the signal conductors, which bring the potential via vias 16 from the potential level below into the signal plane, so that potential and signal conductors can be attached to the printed circuit board 4 in a simple manner . Another layer is also designed as a shield plate 12.

Eine Potentiallage ist in FIG 3 dargestellt, wobei dort die Po­tentailleiter 17 als Gitterwerk ausgebildet sind, wobei im hin­teren Teil das Gitter dichter ist als im vorderen. Auch die Bohrungen 15 für die Signalleiteranschlüsse sowie die Bohrungen 18 für die Potentialleiteranschlüsse sind im oberen Teil der Folie zu erkennen.A potential position is shown in FIG. 3, where the potential conductors 17 are designed as lattice work, the lattice in the rear being denser than in the front. The holes 15 for the signal conductor connections and the holes 18 for the potential conductor connections can also be seen in the upper part of the film.

Wenn man beide Lagen übereinander legt, so zeigt sich ein Bild nach FIG 4, wobei jeweils Signalleiter 10 der einen Ebene neben den Potentialleitern 17 der anderen Ebene zu liegen kommen. Die Potentialleiter sind, wie bereits erläutert, über Durchkontak­tierungen an die Leiter 11 geführt, so daß Potential- und Sig­nalleiter in einer Ebene verlötbar sind.If the two layers are placed one on top of the other, an image according to FIG. 4 is shown, signal conductors 10 on one level each lying next to the potential conductors 17 on the other level. As already explained, the potential conductors are led through contacts to the conductors 11, so that the potential and signal conductors can be soldered in one plane.

Verschiedene Möglichkeiten der geometrischen Anordnung von Sig­nal- und Potentialleitern sind in den nachfolgenden Figuren ge­zeigt. So sind beispielsweise in FIG 5 die Signalleiter 10 und die Potentialleiter 17 nebeneinander in einer Ebene angeordnet. Bei der Anordnung nach FIG 6 befinden sich die Signalleiter in der einen Ebene, die Potentialleiter in einer zweiten Ebene, aber so versetzt, daß sie in den Zwischenräumen zwischen den Signalleitern 10 zu liegen kommen. In der Anordnung nach FIG 7 sind die Signalleiter in der einen Ebene angeordnet, während die Potentialleiter als metallische Fläche 20 ausgebildet sind. Eine andere Konfiguration zeigt FIG 8, bei der zwischen zwei flächig ausgebildeten Potentialebenen die Signalleiter in einer eigenen Ebene angeordnet sind.Different possibilities of the geometrical arrangement of signal and potential conductors are shown in the following figures. In FIG. 5, for example, the signal conductors 10 and the potential conductors 17 are arranged next to one another in one plane. In the arrangement according to FIG. 6, the signal conductors are in one level, the potential conductors in a second level, but offset such that they come to lie in the spaces between the signal conductors 10. In the arrangement according to FIG. 7, the signal conductors are arranged in one plane, while the potential conductors are designed as a metallic surface 20. Another configuration is shown in FIG 8, in which the signal conductors are arranged in a separate plane between two flat potential planes.

Die Anordnung nach FIG 9 zeigt eine Anordnung, bei der sich Signalleiter 10 und Potentialleiter 17 in zwei Ebenen befinden, wobei jedoch die Signal- und Potentialleiter deckungsgleich übereinander angeordnet sind, und in FIG 10 ist eine Anordnung gezeigt, bei der die Rasterung von Signal- und Potentialleitern unterschiedlich groß ist, wobei aber auch die Potentialleiter immer in einem Zwischenraum zwischen zwei Signalleitern liegen.The arrangement according to FIG. 9 shows an arrangement in which signal conductors 10 and potential conductors 17 are located in two planes, but the signal and potential conductors are arranged congruently one above the other, and FIG. 10 shows an arrangement in which the rasterization of signal and potential conductors are of different sizes, but the potential conductors are also always in a space between two signal conductors.

Je nach Ausbildung erhält man einen anderen Wellenwiderstand, so daß dadurch praktisch jeder gewünschte Wellenwiderstand her­stellbar ist. Über die Potentialverbindungen lassen sich dyna­mische und statische Ströme führen.Depending on the training you get a different wave resistance, so that practically any desired wave resistance can be produced. Dynamic and static currents can be conducted via the potential connections.

Claims (9)

1. Steckverbinder für Leiterplatten, insbesondere der Daten­technik, dadurch gekennzeichnet, daß am einen Ende einer mehrlagigen flexiblen Leiterplatte die abwechselnd Ebenen (20) für Signalleiter (10) und Potentiallei­ter (17) aufweist, die in einer für einen jeweils zu erzielen­den bestimmten Wellenwiderstandswert in einer festen geometri­schen Konfiguration zueinander stehen, zwei aufeinanderliegende Versteifungsplatten (8,9) auflaminiert sind, von denen die er­ste (8) durchkontaktierte Bohrungen enthält, in die Stifte (2) oder Lötfahnen eingelötet sind, und die zweite (9) mit Ausspa­rungen zur Aufnahme von Lötzinn an den Stellen, an denen sich die Bohrungen der ersten Leiterplatte (8) befinden, versehen sind, und daß die Leiterbahnen der einzelnen Ebenen am anderen Ende der flexiblen Folie (1) freigelegt sind.1. Plug connector for printed circuit boards, in particular data technology, characterized in that at one end of a multilayer flexible printed circuit board, the alternating levels (20) for signal conductors (10) and potential conductors (17), in a for a particular characteristic impedance value to be achieved in have a fixed geometric configuration, two stiffening plates (8,9) lying on top of each other are laminated on, of which the first (8) contains plated-through holes into which pins (2) or soldering tags are soldered, and the second (9) with recesses for receiving of solder at the locations where the holes of the first printed circuit board (8) are provided, and that the conductor tracks of the individual levels at the other end of the flexible film (1) are exposed. 2. Steckverbinder für Leiterplatten, insbesondere der Daten­technik nach Anspruch 1, dadurch gekenn­zeichnet, daß am anderen Ende der flexiblen Folie ein dritter Versteifungsbügel (6) auflaminiert ist, der im Bereich der freigelegten Enden (5) der Leiterbahnen (10,17) eine Aus­sparung besitzt.2. Connector for printed circuit boards, in particular the data technology according to claim 1, characterized in that a third stiffening bracket (6) is laminated on the other end of the flexible film, which has a recess in the region of the exposed ends (5) of the conductor tracks (10, 17) owns. 3. Steckverbinder für Leiterplatten, insbesondere der Daten­technik nach Anspruch 1, dadurch gekenn­zeichnet, daß die Leiter (10) in den Signalebenen parallel und in Längsrichtung zur flexiblen Leiterfolie (1) verlaufen, daß die Leiter (17) in den Potentialebenen als Git­terwerk ausgebildet sind und die längs zur Folie verlaufenden Leiterbahnen so angeordnet sind, daß sie unter oder überhalb der Zwischenräume der Leiter (10) der Signalebenen verlaufen.3. Connector for printed circuit boards, in particular data technology according to claim 1, characterized in that the conductors (10) in the signal planes run parallel and in the longitudinal direction to the flexible conductor film (1), that the conductors (17) are formed in the potential levels as a lattice work and the conductor tracks running longitudinally to the film are arranged such that they run below or above the spaces between the conductors (10) of the signal planes. 4. Steckverbinder für Leiterplatten, insbesondere der Daten­technik nach den Ansprüchen 1 oder 2, dadurch gekennzeichnet, daß die Leiter (10,17) für die Signal- und die Potentialübertragung in einer Ebene und zwar abwechselnd nebeneinander angeordnet sind.4. Connector for printed circuit boards, in particular data technology according to claims 1 or 2, characterized in that the conductors (10, 17) for the signal and the potential transmission are arranged in one plane, alternately next to one another. 5. Steckverbinder für Leiterplatten, insbesondere der Daten­technik nach den Ansprüchen 1 oder 2, dadurch gekennzeichnet, daß die Potentailleiter (17) aus einer flächigen Metallage bestehen.5. Connector for printed circuit boards, in particular data technology according to claims 1 or 2, characterized in that the potentiometer (17) consist of a flat metal layer. 6. Steckverbinder für Leiterplatten, insbesondere der Daten­technik nach den Ansprüchen 1 oder 2, dadurch gekennzeichnet, daß sich die Signalleiterebene mit ihren Einzelleiterbahnen zwischen zwei flächenhaft ausge­bildeten Potentialleiterebenen befindet.6. Connector for printed circuit boards, in particular data technology according to claims 1 or 2, characterized in that the signal conductor level is with its individual conductor tracks between two flat potential conductor levels. 7. Steckverbinder für Leiterplatten, insbesondere der Daten­technik nach einem der Ansprüche 1 oder 2, dadurch gekennzeichnet, daß die Leiter (10) der Signal­lage und die Längsleiter der Potentiallagen in den einzelnen Ebenen deckungsgleich untereinander liegen.7. Connector for printed circuit boards, in particular the data technology according to one of claims 1 or 2, characterized in that the conductors (10) of the signal layer and the longitudinal conductor of the potential layers are congruent with each other in the individual levels. 8. Steckverbinder für Leiterplatten, insbesondere der Daten­technik nach einem der Ansprüche 1 oder 2, dadurch gekennzeichnet, daß der Rasterabstand der Po­tentialleiter (17) größer ist als der Rasterabstand der Signal­leiter (10).8. Connector for printed circuit boards, in particular data technology according to one of claims 1 or 2, characterized in that the grid spacing of the potential conductors (17) is greater than the grid spacing of the signal conductors (10). 9. Steckverbinder für Leiterplatten, insbesondere der Daten­technik nach einem der vorhergehenden Ansprüche, da­durch gekennzeichnet, daß eine Lage seit­lich und nach vorn über die flexible Folie (1) herausragt und als Metallfläche (12) ausgebildet ist.9. Connector for printed circuit boards, in particular data technology according to one of the preceding claims, characterized in that a layer protrudes laterally and forwards over the flexible film (1) and is designed as a metal surface (12).
EP19900114278 1989-07-28 1990-07-25 Plug-in connection for circuit boards Expired - Lifetime EP0410427B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT90114278T ATE95642T1 (en) 1989-07-28 1990-07-25 CONNECTORS FOR CIRCUIT BOARDS.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3925157A DE3925157A1 (en) 1989-07-28 1989-07-28 CONNECTORS FOR PCB
DE3925157 1989-07-28

Publications (2)

Publication Number Publication Date
EP0410427A1 true EP0410427A1 (en) 1991-01-30
EP0410427B1 EP0410427B1 (en) 1993-10-06

Family

ID=6386123

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19900114278 Expired - Lifetime EP0410427B1 (en) 1989-07-28 1990-07-25 Plug-in connection for circuit boards

Country Status (3)

Country Link
EP (1) EP0410427B1 (en)
AT (1) ATE95642T1 (en)
DE (2) DE3925157A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001082416A1 (en) * 2000-04-20 2001-11-01 Vladimir Nikolaevich Davidov Pressure actuated zero insertion force socket
DE202012002352U1 (en) 2011-05-17 2012-04-18 Erni Electronics Gmbh Arrangement of plug connector and circuit board
CN107123883A (en) * 2013-05-20 2017-09-01 矢崎总业株式会社 Connector

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4365856A (en) * 1980-07-09 1982-12-28 Hirose Electric Co., Ltd. Electric connector for coaxial ribbon cable
EP0145083A2 (en) * 1983-12-02 1985-06-19 E.I. Du Pont De Nemours And Company Electrical connector using a flexible circuit having an impedance control arrangement thereon
EP0162124A1 (en) * 1984-05-22 1985-11-27 Nippon Mektron, Ltd. Apparatus and method for connecting flexible printed foils electrically and mechanically
US4755147A (en) * 1986-05-20 1988-07-05 Control Data Corporation Flex head connector with ground plane

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1867468U (en) * 1961-07-18 1963-02-21 Krone Kg WITH A PRINTED OR ETCHED CIRCUIT AS WELL AS AN INSULATING MATERIAL SUPPORT PLATE.
GB1241169A (en) * 1967-09-21 1971-07-28 Elliott Brothers London Ltd Improvements relating to printed circuits
FR2076471A5 (en) * 1970-01-16 1971-10-15 Bull General Electric
DE2142214B1 (en) * 1971-08-23 1973-02-15 Siemens AG, 1000 Berlin u 8000 München HIGH FREQUENCY COMPONENT IN STRIP LINE TECHNOLOGY
DE3405804A1 (en) * 1984-02-17 1985-08-22 Siemens AG, 1000 Berlin und 8000 München Film wiring for electrical engineering apparatuses, especially for electrical information technology
US4716500A (en) * 1985-10-18 1987-12-29 Tektronix, Inc. Probe cable assembly
DE3544125A1 (en) * 1985-12-13 1987-06-19 Allied Corp CONNECTOR FOR SURFACE MOUNTING
DE8703527U1 (en) * 1987-03-10 1987-05-21 Nonnengässer Elektro-Schalttechnik GmbH, 7410 Reutlingen Plug-in contact strip for electrical circuit boards

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4365856A (en) * 1980-07-09 1982-12-28 Hirose Electric Co., Ltd. Electric connector for coaxial ribbon cable
EP0145083A2 (en) * 1983-12-02 1985-06-19 E.I. Du Pont De Nemours And Company Electrical connector using a flexible circuit having an impedance control arrangement thereon
EP0162124A1 (en) * 1984-05-22 1985-11-27 Nippon Mektron, Ltd. Apparatus and method for connecting flexible printed foils electrically and mechanically
US4755147A (en) * 1986-05-20 1988-07-05 Control Data Corporation Flex head connector with ground plane

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001082416A1 (en) * 2000-04-20 2001-11-01 Vladimir Nikolaevich Davidov Pressure actuated zero insertion force socket
DE202012002352U1 (en) 2011-05-17 2012-04-18 Erni Electronics Gmbh Arrangement of plug connector and circuit board
WO2012155891A1 (en) 2011-05-17 2012-11-22 Erni Electronics Gmbh Assembly of plug connector and circuit board
US9022796B2 (en) 2011-05-17 2015-05-05 Erni Production Gmbh & Co. Kg Assembly of plug connector and circuit board
CN107123883A (en) * 2013-05-20 2017-09-01 矢崎总业株式会社 Connector
CN107123883B (en) * 2013-05-20 2019-05-03 矢崎总业株式会社 Connector

Also Published As

Publication number Publication date
EP0410427B1 (en) 1993-10-06
DE3925157A1 (en) 1991-02-07
ATE95642T1 (en) 1993-10-15
DE3925157C2 (en) 1993-01-28
DE59002990D1 (en) 1993-11-11

Similar Documents

Publication Publication Date Title
DE2233578A1 (en) MULTI-LAYER PRINTED CIRCUIT BOARD
DE3535923C2 (en)
DE1069236B (en)
DE3812021A1 (en) FLEXIBLE CIRCUIT WITH CONNECTING BODIES AND METHOD FOR THEIR PRODUCTION
DE3447556A1 (en) Multilayer conductor connection
EP0955691A2 (en) Contacting device
DE2843710B2 (en) Multi-layer flexible printed circuit board and method for making same
DE2453843A1 (en) CONNECTOR ARRANGEMENT
AT398676B (en) PCB ARRANGEMENT
DE60013659T2 (en) Circuit board with side connections
EP0410427B1 (en) Plug-in connection for circuit boards
DE68915259T2 (en) System for increasing the transmission capacity of printed circuit boards.
EP0026839B1 (en) Flexible printed circuit
DE3031103C2 (en) Procedure for checking the positional misalignment in multi-layer printed circuit boards
EP0402739A1 (en) Device for electrical connecting of sliding electrical assemblies
DE1930642A1 (en) Circuit board for receiving and connecting electrical components
EP0158876A2 (en) Multilayer printed circuit board produced in multilayer- or piling technique
DE2627297C2 (en) Multi-layer printed circuit board
DE3220044C2 (en)
DE9203996U1 (en) Electronic module
DE3045236C2 (en)
DE3209699C2 (en) Universal circuit board
DE3435773A1 (en) Rear-wall wiring for push-in electrical assemblies
EP0418508A1 (en) Electrical connector
DE2326545C2 (en) Methods and devices for soldering multi-core flat cables to printed circuits

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 19901128

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE CH DE FR GB IT LI NL

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: SIEMENS NIXDORF INFORMATIONSSYSTEME AG

17Q First examination report despatched

Effective date: 19921117

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AT BE CH DE FR GB IT LI NL

REF Corresponds to:

Ref document number: 95642

Country of ref document: AT

Date of ref document: 19931015

Kind code of ref document: T

REF Corresponds to:

Ref document number: 59002990

Country of ref document: DE

Date of ref document: 19931111

RAP4 Party data changed (patent owner data changed or rights of a patent transferred)

Owner name: SIEMENS NIXDORF INFORMATIONSSYSTEME AG

ITF It: translation for a ep patent filed
GBT Gb: translation of ep patent filed (gb section 77(6)(a)/1977)

Effective date: 19931215

ET Fr: translation filed
PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 19950915

Year of fee payment: 6

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: CH

Payment date: 19951017

Year of fee payment: 6

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 19960621

Year of fee payment: 7

Ref country code: AT

Payment date: 19960621

Year of fee payment: 7

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: NL

Payment date: 19960716

Year of fee payment: 7

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: BE

Payment date: 19960717

Year of fee payment: 7

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 19960719

Year of fee payment: 7

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Effective date: 19960731

Ref country code: CH

Effective date: 19960731

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Effective date: 19970402

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19970725

Ref country code: AT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19970725

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19970731

BERE Be: lapsed

Owner name: SIEMENS NIXDORF INFORMATIONSSYSTEME A.G.

Effective date: 19970731

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19980201

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 19970725

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19980331

NLV4 Nl: lapsed or anulled due to non-payment of the annual fee

Effective date: 19980201

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES;WARNING: LAPSES OF ITALIAN PATENTS WITH EFFECTIVE DATE BEFORE 2007 MAY HAVE OCCURRED AT ANY TIME BEFORE 2007. THE CORRECT EFFECTIVE DATE MAY BE DIFFERENT FROM THE ONE RECORDED.

Effective date: 20050725