EP0405824A2 - Decoding apparatus for digital signals - Google Patents
Decoding apparatus for digital signals Download PDFInfo
- Publication number
- EP0405824A2 EP0405824A2 EP90306732A EP90306732A EP0405824A2 EP 0405824 A2 EP0405824 A2 EP 0405824A2 EP 90306732 A EP90306732 A EP 90306732A EP 90306732 A EP90306732 A EP 90306732A EP 0405824 A2 EP0405824 A2 EP 0405824A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- data
- signal
- decoding
- rom
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
Definitions
- This invention relates to decoding apparatus for digital signals, for example, for decoding data reproduced from a compact disc-read only memory (CD-ROM) on which sequential data have been recorded.
- CD-ROM compact disc-read only memory
- a CD-ROM comprising an optical disc of a shape similar to a compact disc for music has been attracting attention as a large-capacity recording medium for data.
- a CD-ROM is suitable for real-time applications providing sequential data such as music data or picture data, since a CD-ROM can record a long period of sequential data.
- CD-I and CD-ROM XA standards for recording music data or picture data using a CD-ROM, for example, CD-I and CD-ROM XA have been proposed.
- a man-machine interface can be improved using a voice or an animated picture, and voice mail or picture mail using a computer can be achieved.
- the realization of various services using CD-I or CD-ROM XA has been expected.
- a CD-ROM disc driver and a CD-ROM decoder for reproducing the CD-ROM are needed, in addition to a host computer.
- the CD-ROM disc driver capable of using real-time application programs is generally connected to the CD-ROM decoder using a special standard interface. This is because the speed of the reproduced data and the speed of the decoded data must be strictly equal in real-time applications.
- SCSI small computer system interface
- the SCSI bus cannot transmit a signal corresponding to the read-out speed of reproduced data from a recording medium. Therefore, it is difficult to make the speeds of reproduced and decoded data equal. For this reason, it has been thought that an SCSI bus cannot be used to connect a CD-ROM disc driver and a CD-ROM decoder.
- the CD-ROM disc driver and the CD-ROM decoder operate with their own clock signals. In this case it is impossible to make the playback time of the CD-ROM and the decoding time of the CD-ROM decoder exactly equal.
- Figure 2 shows a case where there is an error between the reproduced data speed and the decoding speed.
- Figure 2A when the disc which has recorded thereon the compressed audio data A and the graphic data G is reproduced, the reproduced and time-base expanded audio signal a does not coincide with the corresponding reproduced picture, as shown in Figure 2B, if there is an error between the reproduced data speed and the decoding speed.
- the error e accumulates with increased playback time.
- a decoding apparatus for a digital signal, the apparatus comprising: detecting means for detecting a leading edge of a request signal which requests transmission of sequential data as a digital signal; a clock generator for generating a clock signal in response to an output signal from said detecting means; and a decoding circuit for decoding sequential data in accordance with the clock signal.
- a decoding system for digital data comprising: a recording medium driver comprising: playback means for playing back digital data from a recording medium; and means for generating a request signal requesting transmission of the digital data; decoding means comprising: detecting means for detecting a leading edge of the request signal; a clock generator for generating a clock signal in response to an output signal from said detecting means; and a decoding circuit for decoding the sequential data in accordance with the clock signal; and an interface line for connecting said recording medium driver to said decoding means, and for transmitting the digital data and the request signal.
- the embodiment is suitable for use in a CD-ROM decoder of the CD-ROM XA standard, for example.
- CD-ROM XA voice data are recorded by adaptive differential pulse-code modulation (ADPCM).
- ADPCM adaptive differential pulse-code modulation
- the embodiment comprises a host computer 1 and a CD-ROM decoder 2 which are connected to each other.
- a CRT display 3 is connected to the host computer 1.
- a CD-ROM disc driver 4 operates under control of a clock from a clock generating circuit 5.
- the CD-ROM driver in and the CD-ROM decoder 2 are connected through an SCSI bus 6.
- a clock developing circuit 7 is provided at the CD-ROM decoder 2, and develops a clock using an REQ signal sent from the CD-ROM driver 4.
- a decoding operation is performed using a clock signal formed by the clock developing circuit 7. With the clock signal so developed, the disc reproduction speed of the CD-ROM driver 4 and the decoding speed of the CD-ROM decoder 2 can be made completely equal.
- the CD-ROM driver 4 can be constructed as shown in Figure 4, for example, in which a reproduced signal from a disc 11 is supplied to a playback circuit 12. At the playback circuit 12, processing such as EFM modulation, error correction, etc. is effected to decode reproduced data.
- the output of the playback circuit 12 is supplied to buffer memories 14A and 14B through a switch circuit 13, which is switched at 75 Hz, for example.
- the buffer memories 14A and 14B are controlled so that when one is in a write-in state, the other is in a read-out state. Data are written into the buffer memories 14A and 14B at the data rate of reproduced data (for instance, 170 kilobytes/second), and data are read out therefrom at the data rate of the SCSI bus 6 (for example, 1 megabyte/second). Data transfer rate conversion is effected by the buffer memories 14A and 4B.
- the outputs of the buffer memories 14A and 14B are fed to a buffer memory 16 through a switch circuit 15, which is switched at 75 Hz, for example.
- the output of the buffer memory 16 is supplied to an SCSI controller 17, from which data are sent through an SCSI port 18.
- Figure 5 shows an information transfer phase in the SCSI bus 6.
- the kind of information transfer phase to be performed is designated.
- the transfer is done in an asynchronous mode in the SCSI bus 6, the transfer is performed while confirming an REQ signal ( Figure 5B) and an ACK signal ( Figure 5C).
- the REQ signal is sent after establishing the status of a data bus ( Figure 5D).
- the ACK signal ( Figure 5C) is sent back. The status of the data bus is held until the ACK signal is received on the side of the CD-ROM driver 4.
- the SCSI bus has not transferred a signal corresponding to the read-out speed from a disc. For this reason, it has not been possible to connect the CD-ROM driver 4 and the CD-ROM decoder 2 through the SCSI bus 6.
- a clock is developed using the REQ signal at the clock developing circuit 7 of the CD-ROM decoder 2.
- Data rate conversion is executed in the buffer memories 14A and 14B ( Figure 4) of the CD-ROM driver 4, and the transmission rate of data sent through the SCSI bus 6 is higher than the playback transmission rate at the CD-ROM disc driver 4.
- Figure 6A there occurs an interval TA where data are sent via the SCSI bus 6, and an interval TB, where the data transfer is stopped.
- the REQ signal is sent each time data are transferred in the interval TA where data are sent via the SCSI bus 6. Therefore, in response to a detection of the REQ signal, the interval TA where the data are sent and the interval TB where the data transfer is stopped can be detected.
- the interval TA where the data are sent and the interval TB where the data transfer is stopped are switched by a signal based on the clock on the side of the CD-ROM disc driver 4. Namely, the interval TA where the data are sent and the interval TB where the data transfer is stopped are set by the signal of 75 Hz for switching the switching circuits 13 and 15 on the side of the CD-ROM driver 4. From this, by the detection of the interval TA where the data are sent and the interval TB where the data transfer is stopped, information based on the playback speed on the side of the CD-ROM disc driver 4 can be provided.
- the clock developing circuit 7 at the CD-ROM decoder 2 is formed as shown in Figure 7, to detect the REQ signal and so develop a clock.
- the output of the monostable multivibrator 21 is supplied to a PLL 22.
- a clock signal with a predetermined frequency, which is in synchronism with the output of the monostable multivibrator 21 is derived by the PLL 22 as shown in Figure 6C.
- the clock signal is supplied to a CD-ROM decoder 23, and corresponds to an operating clock signal of the CD-ROM disc driver 4. Consequently, if the decoding operation of the CD-ROM decoder 2 is controlled by the clock signal from the clock developing circuit 7, the disc playback speed of the CD-ROM driver 4 and the decoding speed of the CD-ROM decoder 2 can be made completely equal.
- the invention is not limited to the case of the use of the SCSI and is applicable to the case where another interface is employed to send a signal for requesting a data transfer in the transmission of data.
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Signal Processing (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
Description
- This invention relates to decoding apparatus for digital signals, for example, for decoding data reproduced from a compact disc-read only memory (CD-ROM) on which sequential data have been recorded.
- A CD-ROM comprising an optical disc of a shape similar to a compact disc for music has been attracting attention as a large-capacity recording medium for data. A CD-ROM is suitable for real-time applications providing sequential data such as music data or picture data, since a CD-ROM can record a long period of sequential data.
- For this reason, standards for recording music data or picture data using a CD-ROM, for example, CD-I and CD-ROM XA have been proposed. With such recording of music data or picture data onto a CD-ROM, a man-machine interface can be improved using a voice or an animated picture, and voice mail or picture mail using a computer can be achieved. Thus, the realization of various services using CD-I or CD-ROM XA has been expected.
- For handling CD-ROM application programs, a CD-ROM disc driver and a CD-ROM decoder for reproducing the CD-ROM are needed, in addition to a host computer.
- The CD-ROM disc driver capable of using real-time application programs is generally connected to the CD-ROM decoder using a special standard interface. This is because the speed of the reproduced data and the speed of the decoded data must be strictly equal in real-time applications.
- In recent years, a small computer system interface (SCSI) has frequently been employed for connections between a computer and peripheral equipment. Based on this, there is a demand for the connection of a CD-ROM disc driver and a CD-ROM decoder using an SCSI bus.
- However, in principle, the SCSI bus cannot transmit a signal corresponding to the read-out speed of reproduced data from a recording medium. Therefore, it is difficult to make the speeds of reproduced and decoded data equal. For this reason, it has been thought that an SCSI bus cannot be used to connect a CD-ROM disc driver and a CD-ROM decoder.
- When a signal corresponding to the speed of reproduced data cannot be transmitted, the CD-ROM disc driver and the CD-ROM decoder operate with their own clock signals. In this case it is impossible to make the playback time of the CD-ROM and the decoding time of the CD-ROM decoder exactly equal.
- Data are continuously reproduced from the CD-ROM, and the continuous data are decoded by the CD-ROM decoder. Consequently, even if there is only a slight speed error between the speed of the reproduced data and the decoding speed, the error will accumulate as the playback time increases.
- As a result, when a CD-ROM which has recorded music data and picture data is played back, sound jumps or a time difference between the reproduced picture and the reproduced sound may occur.
- For example, as shown in Figure 1A, it is assumed that a disc which has recorded compressed audio data A and graphic data G is reproduced. If the speed of the reproduced data and the decoding speed coincide with each other, a reproduced and time-base expanded audio signal a coincides with a corresponding reproduced picture as shown in Figure 1B.
- On the other hand, Figure 2 shows a case where there is an error between the reproduced data speed and the decoding speed. As indicated in Figure 2A, when the disc which has recorded thereon the compressed audio data A and the graphic data G is reproduced, the reproduced and time-base expanded audio signal a does not coincide with the corresponding reproduced picture, as shown in Figure 2B, if there is an error between the reproduced data speed and the decoding speed. The error e accumulates with increased playback time.
- According to the present invention there is provided a decoding apparatus for a digital signal, the apparatus comprising:
detecting means for detecting a leading edge of a request signal which requests transmission of sequential data as a digital signal;
a clock generator for generating a clock signal in response to an output signal from said detecting means; and
a decoding circuit for decoding sequential data in accordance with the clock signal. - According to the present invention there is also provided a decoding system for digital data, the system comprising:
a recording medium driver comprising:
playback means for playing back digital data from a recording medium; and
means for generating a request signal requesting transmission of the digital data;
decoding means comprising:
detecting means for detecting a leading edge of the request signal;
a clock generator for generating a clock signal in response to an output signal from said detecting means; and
a decoding circuit for decoding the sequential data in accordance with the clock signal; and
an interface line for connecting said recording medium driver to said decoding means, and for transmitting the digital data and the request signal. - The invention will now be described by way of example with reference to the accompanying drawings, throughout which like parts are referred to by like references, and in which:
- Figures 1 and 2 are timing diagrams for previously proposed decoders;
- Figure 3 is a block diagram of one embodiment of this invention;
- Figure 4 is a block diagram of one example of a CD-ROM disc driver in an embodiment of the invention;
- Figures 5 and 6 are timing diagrams; and
- Figure 7 is a block diagram of one example of a clock signal generating circuit.
- The embodiment is suitable for use in a CD-ROM decoder of the CD-ROM XA standard, for example. In CD-ROM XA, voice data are recorded by adaptive differential pulse-code modulation (ADPCM). The embodiment comprises a
host computer 1 and a CD-ROM decoder 2 which are connected to each other. ACRT display 3 is connected to thehost computer 1. A CD-ROM disc driver 4 operates under control of a clock from aclock generating circuit 5. The CD-ROM driver in and the CD-ROM decoder 2 are connected through anSCSI bus 6. - A
clock developing circuit 7 is provided at the CD-ROM decoder 2, and develops a clock using an REQ signal sent from the CD-ROM driver 4. At the CD-ROM decoder 2, a decoding operation is performed using a clock signal formed by theclock developing circuit 7. With the clock signal so developed, the disc reproduction speed of the CD-ROM driver 4 and the decoding speed of the CD-ROM decoder 2 can be made completely equal. - The CD-
ROM driver 4 can be constructed as shown in Figure 4, for example, in which a reproduced signal from a disc 11 is supplied to aplayback circuit 12. At theplayback circuit 12, processing such as EFM modulation, error correction, etc. is effected to decode reproduced data. The output of theplayback circuit 12 is supplied tobuffer memories switch circuit 13, which is switched at 75 Hz, for example. - The
buffer memories buffer memories buffer memories 14A and 4B. - The outputs of the
buffer memories buffer memory 16 through aswitch circuit 15, which is switched at 75 Hz, for example. - The output of the
buffer memory 16 is supplied to anSCSI controller 17, from which data are sent through anSCSI port 18. - Figure 5 shows an information transfer phase in the
SCSI bus 6. By a combination of each signal (Figure 5A) of C/D, I/O and MSG, the kind of information transfer phase to be performed is designated. When the transfer is done in an asynchronous mode in theSCSI bus 6, the transfer is performed while confirming an REQ signal (Figure 5B) and an ACK signal (Figure 5C). Clearly, on the side of the CD-ROM driver 4, the REQ signal is sent after establishing the status of a data bus (Figure 5D). When data are received on the side of the CD-ROM decoder 2, the ACK signal (Figure 5C) is sent back. The status of the data bus is held until the ACK signal is received on the side of the CD-ROM driver 4. - Basically, the SCSI bus has not transferred a signal corresponding to the read-out speed from a disc. For this reason, it has not been possible to connect the CD-
ROM driver 4 and the CD-ROM decoder 2 through theSCSI bus 6. - In one embodiment of the invention, a clock is developed using the REQ signal at the
clock developing circuit 7 of the CD-ROM decoder 2. With this, the disc reproduction speed of the CD-ROM driver 4 and the decoding speed of the CD-ROM decoder 2 can be made completely equal. For this reason, it is possible to connect the CD-ROM driver 4 and the CD-ROM decoder 2 through theSCSI bus 6. - Data rate conversion is executed in the
buffer memories ROM driver 4, and the transmission rate of data sent through theSCSI bus 6 is higher than the playback transmission rate at the CD-ROM disc driver 4. As a result, as shown in Figure 6A, there occurs an interval TA where data are sent via theSCSI bus 6, and an interval TB, where the data transfer is stopped. The REQ signal is sent each time data are transferred in the interval TA where data are sent via theSCSI bus 6. Therefore, in response to a detection of the REQ signal, the interval TA where the data are sent and the interval TB where the data transfer is stopped can be detected. The interval TA where the data are sent and the interval TB where the data transfer is stopped are switched by a signal based on the clock on the side of the CD-ROM disc driver 4. Namely, the interval TA where the data are sent and the interval TB where the data transfer is stopped are set by the signal of 75 Hz for switching the switchingcircuits ROM driver 4. From this, by the detection of the interval TA where the data are sent and the interval TB where the data transfer is stopped, information based on the playback speed on the side of the CD-ROM disc driver 4 can be provided. - The
clock developing circuit 7 at the CD-ROM decoder 2 is formed as shown in Figure 7, to detect the REQ signal and so develop a clock. - In Figure 7, the REQ signal (Figure 6A) is sent from the CD-
ROM driver 4 through theSCSI bus 6. The REQ signal is supplied to amonostable multivibrator 21 which is triggered by the REQ signal. As a result, signals corresponding to the interval TA where the data are sent and the interval TB where the data transfer is stopped are provided from themonostable multivibrator 21 as shown in Figure 6B. - The output of the
monostable multivibrator 21 is supplied to aPLL 22. A clock signal with a predetermined frequency, which is in synchronism with the output of themonostable multivibrator 21 is derived by thePLL 22 as shown in Figure 6C. The clock signal is supplied to a CD-ROM decoder 23, and corresponds to an operating clock signal of the CD-ROM disc driver 4. Consequently, if the decoding operation of the CD-ROM decoder 2 is controlled by the clock signal from theclock developing circuit 7, the disc playback speed of the CD-ROM driver 4 and the decoding speed of the CD-ROM decoder 2 can be made completely equal. - The invention is not limited to the case of the use of the SCSI and is applicable to the case where another interface is employed to send a signal for requesting a data transfer in the transmission of data.
Claims (8)
detecting means (21) for detecting a leading edge of a request signal which requests transmission of sequential data as a digital signal;
a clock generator (22) for generating a clock signal in response to an output signal from said detecting means (21); and
a decoding circuit (23) for decoding sequential data in accordance with the clock signal.
a recording medium driver (4) comprising:
playback means (12) for playing back digital data from a recording medium (11); and
means (17) for generating a request signal requesting transmission of the digital data;
decoding means (2) comprising:
detecting means (21) for detecting a leading edge of the request signal;
a clock generator (22) for generating a clock signal in response to an output signal from said detecting means (2); and
a decoding circuit (23) for decoding the sequential data in accordance with the clock signal; and
an interface line (6) for connecting said recording medium driver (4) to said decoding means (2), and for transmitting the digital data and the request signal.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP165030/89 | 1989-06-27 | ||
JP89165030A JPH0330521A (en) | 1989-06-27 | 1989-06-27 | Digital signal decoder |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0405824A2 true EP0405824A2 (en) | 1991-01-02 |
EP0405824A3 EP0405824A3 (en) | 1992-07-29 |
EP0405824B1 EP0405824B1 (en) | 1996-12-18 |
Family
ID=15804511
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP90306732A Expired - Lifetime EP0405824B1 (en) | 1989-06-26 | 1990-06-20 | Decoding apparatus for digital signals |
Country Status (5)
Country | Link |
---|---|
US (1) | US5019816A (en) |
EP (1) | EP0405824B1 (en) |
JP (1) | JPH0330521A (en) |
CA (1) | CA2019079A1 (en) |
DE (1) | DE69029435T2 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2993052B2 (en) * | 1990-05-30 | 1999-12-20 | ソニー株式会社 | Disk drive device |
JP3277507B2 (en) * | 1990-11-28 | 2002-04-22 | ソニー株式会社 | Data search method and data search / playback device |
JPH04236589A (en) * | 1991-01-18 | 1992-08-25 | Fujitsu Ltd | Data processing system provided with cd-rom drive |
GB9205932D0 (en) * | 1992-03-18 | 1992-04-29 | Philips Electronics Uk Ltd | Method and apparatus for editing an audio signal |
BE1008964A3 (en) * | 1994-11-18 | 1996-10-01 | Philips Electronics Nv | Method for transfer of information, an information carrier, and a device for receiving and a device for sending information. |
US5633634A (en) * | 1995-09-29 | 1997-05-27 | Ag Communication Systems Corporation | Data rate conversion circuit |
US9547609B2 (en) * | 2013-10-25 | 2017-01-17 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Data interface for point-to-point communications between devices |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0248478A1 (en) * | 1986-06-04 | 1987-12-09 | Koninklijke Philips Electronics N.V. | Sequential buffer device |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3916107A (en) * | 1972-10-06 | 1975-10-28 | Bell Telephone Labor Inc | Digital system for reclocking pulse code modulation circuits |
US3916314A (en) * | 1974-04-08 | 1975-10-28 | Ibm | Non-linear filter for delta modulator output using shift register and table lookup |
JPS55153159A (en) * | 1979-05-15 | 1980-11-28 | Sony Corp | Digital signal recorder |
DE3376037D1 (en) * | 1982-12-27 | 1988-04-21 | Telefunken Fernseh & Rundfunk | Apparatus for reproducing a digital signal recorded with several heads |
JPS59218620A (en) * | 1983-05-16 | 1984-12-08 | Mitsubishi Electric Corp | Absorbing circuit of time base variation |
US4825403A (en) * | 1983-05-16 | 1989-04-25 | Data General Corporation | Apparatus guaranteeing that a controller in a disk drive system receives at least some data from an invalid track sector |
JPS61114673A (en) * | 1984-11-08 | 1986-06-02 | Canon Inc | Signal record reproducing method |
JPS62164276A (en) * | 1986-01-13 | 1987-07-20 | Matsushita Electric Ind Co Ltd | Information recording and reproducing device |
-
1989
- 1989-06-27 JP JP89165030A patent/JPH0330521A/en active Pending
-
1990
- 1990-06-15 CA CA002019079A patent/CA2019079A1/en not_active Abandoned
- 1990-06-20 DE DE69029435T patent/DE69029435T2/en not_active Expired - Fee Related
- 1990-06-20 EP EP90306732A patent/EP0405824B1/en not_active Expired - Lifetime
- 1990-06-26 US US07/543,445 patent/US5019816A/en not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0248478A1 (en) * | 1986-06-04 | 1987-12-09 | Koninklijke Philips Electronics N.V. | Sequential buffer device |
Non-Patent Citations (2)
Title |
---|
COMPUTER SYSTEMS. vol. 8, no. 2, February 1988, BROMLEY GB pages 25 - 26; S. CORNISH: 'EXPLOITING THE SCSI BUS' * |
ELEKTRONIK. vol. 35, no. 9, May 1986, MUNCHEN DE pages 119 - 122; R. WILSON: 'MASSENSPEICHER-STEUERCHIPS FUER PROBLEMLOSE SUBSYSTEMKONZEPTE' * |
Also Published As
Publication number | Publication date |
---|---|
DE69029435D1 (en) | 1997-01-30 |
EP0405824B1 (en) | 1996-12-18 |
US5019816A (en) | 1991-05-28 |
JPH0330521A (en) | 1991-02-08 |
CA2019079A1 (en) | 1990-12-27 |
EP0405824A3 (en) | 1992-07-29 |
DE69029435T2 (en) | 1997-04-03 |
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