EP0404246B1 - Halbleiteranordnung zum Erzeugen eines Elektronenstromes - Google Patents

Halbleiteranordnung zum Erzeugen eines Elektronenstromes Download PDF

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Publication number
EP0404246B1
EP0404246B1 EP19900201575 EP90201575A EP0404246B1 EP 0404246 B1 EP0404246 B1 EP 0404246B1 EP 19900201575 EP19900201575 EP 19900201575 EP 90201575 A EP90201575 A EP 90201575A EP 0404246 B1 EP0404246 B1 EP 0404246B1
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EP
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Prior art keywords
semiconductor device
type
semiconductor
region
thickness
Prior art date
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Expired - Lifetime
Application number
EP19900201575
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English (en)
French (fr)
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EP0404246A1 (de
Inventor
Gerardus Gegorius Petrus Van Gorkom
Aart Adrianus Van Gorkum
Gerjan Franciscus Arthur Van De Walle
Petrus Arthur Marie Van Der Heide
Arthur Marie Eugène Hoeberechts
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Koninklijke Philips Electronics NV
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Publication of EP0404246A1 publication Critical patent/EP0404246A1/de
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Publication of EP0404246B1 publication Critical patent/EP0404246B1/de
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J1/00Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
    • H01J1/02Main electrodes
    • H01J1/30Cold cathodes, e.g. field-emissive cathode
    • H01J1/308Semiconductor cathodes, e.g. cathodes with PN junction layers

Definitions

  • the invention relates to a semiconductor device for generating an electron current, comprising a cathode having a semiconductor body with at least an n-type semiconductor region and a first p-type semiconductor region, in which electrons leaving the semiconductor body at a surface can be generated in said body by giving the n-type region a positive bias with respect to the p-type region.
  • the invention also relates to a pick-up tube and a display device provided with such a semiconductor device.
  • thermionic cathodes are used, inter alia, in cathode ray tubes in which they replace the conventional thermionic cathode in which electron emission is generated by heating. In addition they are used in, for example, apparatus for electron microscopy.
  • thermionic cathodes have the drawback that they are not immediately ready for operation because they have to be heated sufficiently before emission occurs. Moreover, the cathode material is eventually lost due to evaporation, so that these cathodes have a limited lifetime.
  • the cold cathodes known from the above-mentioned Patent Application are based on the emission of electrons from the semiconductor body when a pn junction is operated in the reverse direction in such a manner that avalanche multiplication occurs. Some electrons may then obtain as much kinetic energy as is required to exceed the electron work function; these electrons are then liberated on the surface and thus supply an electron current.
  • the cathodes described in said Patent Application are provided with an acceleration or gate electrode.
  • the aim is to have a maximum possible efficiency, which can be achieved, inter alia, by a minimum possible work function for the electrons.
  • the latter is realised, for example, by providing the surface of the cathode with a layer of material which decreases the work function.
  • Cesium is preferably used for this purpose because it produces a maximum decrease of the electron work function.
  • cesium may have drawbacks.
  • cesium is very sensitive to the presence (in its ambience) of oxidising gases (water vapour, oxygen, CO2).
  • cesium is fairly volatile, which may be detrimental in those uses in which substrates or compounds are present in the vicinity of the cathode such as may be the case, for example, in electron lithography or electron microscopy. The evaporated cesium may then precipitate on these objects.
  • Netherlands Patent Application no. 8600675 (PHN 11.670) in the name of the Applicant proposes to provide an intrinsic semiconductor layer between the p-type region and the n-type region.
  • the substantially intrinsic layer introduces in the semiconductor device a region which in the operating condition is completely depleted and in which a maximum field strength prevails substantially throughout this region.
  • the electrons are generated earlier and at a higher potential energy, while the generated electrons in the intrinsic part undergo a slight scattering of ionised dopant atoms so that the effective free path length is increased.
  • a semiconductor device is characterized in that the n-type region has a thickness of at most 4 nanometers. This thickness is preferably smaller than 2 nanometers.
  • the invention is based, inter alia, on the recognition that quantisation effects occur at such a small thickness (one or several atomic layers) so that the effective work function is decreased.
  • n-type (or p-type) layer may comprise a partly intrinsic top layer due to the special way of providing the structures.
  • n-type or p-type layers such a double layer of an n-type or p-type layer and a thin intrinsic layer is also included.
  • An intrinsic layer is then understood to mean a ⁇ -type or ⁇ -type layer with a doping of at most 5.1016 atoms/cm3.
  • the thin n-type layer may also be deliberately separated from the p-type region by an intrinsic semiconductor layer, similarly as described in Netherlands Patent Application no. 8600675 (PHN 11.670) in the name of the Applicant.
  • a preferred embodiment of the invention is therefore characterized in that the n-type region is present between the first p-type region and a second p-type surface region.
  • This second p-type surface region has preferably also a thickness of at most 4 nanometers.
  • An additional advantage of such a device is that, notably for silicon, the distance between the bottom of the conduction band and the vacuum level at some distance from the surface is lower for p-type silicon than for n-type silicon.
  • the second p-type surface region preferably has a thickness of at most 2 micrometers, for example, by forming it again as a "Planar Doping" structure. A part of the first p-type region may also be realised in such a manner.
  • a semiconductor device is characterized in that the surface has an electrically insulating layer in which at least one aperture is provided, while at least one acceleration electrode is arranged on the insulating layer at the edge of the aperture, and the semiconductor structure, at least within the aperture, locally has a lower breakdown voltage than the other part of the semiconductor structure.
  • a cathode according to the invention may be advantageously used in a pick-up tube, while there are also various uses for a display device comprising a semiconductor cathode according to the invention.
  • a display device comprising a semiconductor cathode according to the invention.
  • One use is, for example, a display tube having a fluorescent screen which is activated by the electron current originating from the semiconductor device.
  • the advantages of a semiconductor device according to the invention will now be described with reference to Figs. 1 to 3 and compared with those as described in Netherlands Patent Application no. 7905470.
  • the device described in this Application (Fig. 1a) comprises at a main surface 2 of a semiconductor body 1 an n-type surface region 3 constituting a pn junction 8 with a p-type region 4.
  • the regions 3 and 4 may be biased in the reverse direction with respect to each other so that avalanche multiplication occurs. A part of the electrons which are then liberated may then obtain as much energy as is required to be emitted from the semiconductor body.
  • the n-type surface region 3 has a thickness of at most 4 nanometers (for example, 2 nanometers).
  • the p-type region 4 is completely depleted during use.
  • the p-type regions are possibly contacted via a p+ region 5.
  • Fig. 2 shows diagrammatically the variation of the field strength for the two devices.
  • a maximum field occurs at the area of the pn junction 8, which field decreases to the value of zero on both sides of the junction at the edges of the depletion zone (line a, b).
  • Such a field variation leads to an electron energy diagram as is shown by means of drawn lines in Fig. 3a for the device of Fig. 1a.
  • a similar curve for the device of Fig. 1b differs from that of Fig. 3a in that the electron work function will steeply increase at approximately 2 nanometers from the surface (see Fig. 3b) due to the small thickness of the n-type region 3.
  • the electrons To be able to reach the vacuum, the electrons must have an energy which is at least equal to the emission energy ⁇ .
  • d b in the device according to the invention is small with respect to the thickness d a in the device of Fig. 1, it holds that d b ⁇ d a , while ⁇ a ⁇ ⁇ b so that P b > P a .
  • n-type region 3 is present between a p-type region 4 and a p-type surface region 7.
  • the n-type region 3 is only several atomic layers thick so that quantisation effects occur of the energy levels and the (quasi) Fermi level comes above the bottom of the conduction band of the n-type region 3 (Fig. 5a).
  • the electron work function in the region 3 increases until the quasi Fermi level coincides with the bottom of the conduction band of the (preferably highly doped) p-type surface region 7.
  • Electrons which are generated by simultaneous occurrence of avalanche breakdown of the pn junction 8 fill up the energy levels and cross, as it were, the p-type surface region.
  • a small layer thickness ( ⁇ 4 nanometers) and a high doping is preferably chosen for this p-type region.
  • the p+-type surface layer 7 may alternatively be provided by means of techniques resulting in " ⁇ -doping" or "Planar Doping" structures, i.e. techniques which in addition to other suitable techniques (molecular beam epitaxy) can also be used for manufacturing the n-type surface layer 3 in the device of Fig. 1b. In this respect it may be advantageous to manufacture the p-type layer 4 and/or possible intermediate intrinsic layers by means of this technique.
  • a semiconductor cathode according to the invention may have an insulating layer at its surface 2 on which acceleration electrodes are arranged around apertures for the purpose of emission; the possible forms of the emitting regions and the acceleration electrodes have been described in greater detail in the above-mentioned Netherlands Patent Application no. 7905470.
  • the aperture may be slit-shaped or circular with a gap width or circle diameter of the same order of magnitude as the thickness of the insulating layer.
  • the semiconductor structure usually has a lower breakdown voltage at the area of such apertures.
  • the acceleration electrode (of, for example polycrystalline silicon) may be split up in different manners in which, for example, a part is located inside and another part is located outside a circular gap.
  • the surface may be coated, if desired, with a work function-decreasing material such as cesium or barium.
  • a work function-decreasing material such as cesium or barium.
  • silicon it is alternatively possible to choose an A3-B5 semiconductor material (gallium ar
  • Semiconductor cathodes according to the invention can be used in pick-up tubes as well as display tubes, but also, for example in electron microscopy.

Landscapes

  • Cold Cathode And The Manufacture (AREA)
  • Electrodes For Cathode-Ray Tubes (AREA)

Claims (21)

  1. Halbleiteranordnung zum Erzeugen eines Elektronenstroms, mit einer Kathode mit einem Halbleiterkörper mit wenigstens einem n-Typ-Halbleitergebiet und einem ersten p-Typ-Halbleitergebiet, in denen aus dem Halbleiterkörper entweichende Elektronen an einer Oberfläche im Körper erzeugt werden können, indem in bezug auf das p-Typ-Gebiet dem n-Typ-Gebiet eine positive Vorspannung erteilt wird, dadurch gekennzeichnet, daß das n-Gebiet eine Dicke von höchstens 4 nm hat.
  2. Halbleiteranordnung nach Anspruch 1, dadurch gekennzeichnet, daß die Dicke des n-Typ-Gebiets höchstens 2 nm beträgt.
  3. Halbleiteranordnung nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß zwischen dem ersten p-Gebiet und dem n-Gebiet ein hauptsächlich intrinsikes Halbleitergebiet liegt.
  4. Halbleiteranordnung nach Anspruch 3, dadurch gekennzeichnet, daß das hauptsächlich intrinsike Halbleitergebiet vom π-Typ oder vom ν-Typ mit einer maximalen Verunreinigungskonzentration von 5,10¹⁶ Atomen/cm³ ist.
  5. Halbleiteranordnung nach Anspruch 1, 2, 3 oder 4, dadurch gekennzeichnet, daß das n-Gebiet zwischen dem ersten p-Halbleitergebiet und einem zweiten p-Typ-Oberflächengebiet liegt.
  6. Halbleiteranordnung nach Anspruch 5, dadurch gekennzeichnet, daß das p-Typ-Oberflächengebiet hochdotiert ist und eine Dicke von höchstens 4 nm hat.
  7. Halbleiteranordnung nach Anspruch 6, dadurch gekennzeichnet, daß die Dicke des p-Typ-Oberflächengebiets höchstens 2 nm beträgt.
  8. Halbleiteranordnung nach einem oder mehreren der vorangehenden Ansprüche, dadurch gekennzeichnet, daß das erste p-Typ-Halbleitergebiet wenigstens teilweise über eine Dicke von höchstens 4 nm hochdotiert ist.
  9. Halbleiteranordnung nach einem der Ansprüche 1 bis 8, dadurch gekennzeichnet, daß die Oberfläche eine elektrisch isolierende Schicht enthält, in der wenigstens eine Öffnung angebracht ist, während wenigstens eine Beschleunigungselektrode auf der Isolierschicht am Rand der Öffnung angeordnet ist, und die Halbleiterstruktur wenigstens in der Öffnung stellenweise eine niedrigere Durchschlagspannung als der andere Teil der Halbleiterstruktur hat.
  10. Halbleiteranordnung nach Anspruch 9, dadurch gekennzeichnet, daß die Apertur schlitzförmig oder kreisförmig mit einer Spaltbreite oder einem Kreisdurchmesser ist, die bzw. der von derselben Größenordnung ist als die Dicke der Isolierschicht.
  11. Halbleiteranordnung nach Anspruch 9 oder 10, dadurch gekennzeichnet, daß die Beschleunigungselektrode aus zwei oder mehr Unterelektroden besteht.
  12. Halbleiteranordnung nach Anspruch 11, dadurch gekennzeichnet, daß die Apertur einen hauptsächlich ringförmigen Spalt bildet, wobei eine Unterelektrode sich im Ringspalt und eine Unterelektrode sich außerhalb des Ringspalts befinden.
  13. Halbleiteranordnung nach Anspruch 12, dadurch gekennzeichnet, daß die Mittellinie des ringförmigen Spalts einen Kreis bildet.
  14. Halbleiteranordnung nach einem der Ansprüche 9 bis 13, dadurch gekennzeichnet, daß auf der elektrisch isolierenden Schicht eine zweite Elektrode angeordnet ist, die im wesentlichen die Beschleunigungselektrode umschließt.
  15. Halbleiteranordnung nach den Ansprüchen 1 bis 14, dadurch gekennzeichnet, daß die Oberfläche des Halbleiterkörpers mit einem die Elektronenaustrittsarbeit reduzierenden Material wenigstens im Bereich der Emissionsfläche bedeckt ist.
  16. Halbleiteranordnung nach Anspruch 15, dadurch gekennzeichnet, daß das die Elektronenaustrittsarbeit reduzierende Material ein Material aus der Gruppe von Zäsium und Barium ist.
  17. Halbleiteranordnung nach einem der Ansprüche 1 bis 16, dadurch gekennzeichnet, daß der Halbleiterkörper aus Silizium oder aus einem A3-B5-Werkstoff besteht.
  18. Halbleiteranordnung nach einem oder mehreren der vorangehenden Ansprüche, dadurch gekennzeichnet, daß die Beschleunigungselektrode polykristallines Silizium enthält.
  19. Aufnahmeröhre mit Mitteln zum Steuern eines Elektronenbündels, das ein Ladungsbild abtastet, dadurch gekennzeichnet, daß das Elektronenbündel mit einer Halbleiteranordnung nach einem der Ansprüche 1 bis 18 erzeugt wird.
  20. Wiedergabeanordnung mit Mitteln zum Steuern eines Elektronenbündels, das ein Bild erzeugt, dadurch gekennzeichnet, daß das Elektronenbündel mit einer Halbleiteranordnung nach einem der Ansprüche 1 bis 18 erzeugt wird.
  21. Wiedergabeanordnung nach Anspruch 20, dadurch gekennzeichnet, daß die Wiedergabeanordnung einen Leuchtschirm enthält, der sich in Vakuum in wenigen Millimeter Entfernung von der Wiedergabeanordnung befindet und vom Elektronenbündel aus der Halbleiteranordnung aktiviert wird.
EP19900201575 1989-06-23 1990-06-18 Halbleiteranordnung zum Erzeugen eines Elektronenstromes Expired - Lifetime EP0404246B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8901590A NL8901590A (nl) 1989-06-23 1989-06-23 Halfgeleiderinrichting voor het opwekken van een elektronenstroom.
NL8901590 1989-06-23

Publications (2)

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EP0404246A1 EP0404246A1 (de) 1990-12-27
EP0404246B1 true EP0404246B1 (de) 1994-06-01

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EP19900201575 Expired - Lifetime EP0404246B1 (de) 1989-06-23 1990-06-18 Halbleiteranordnung zum Erzeugen eines Elektronenstromes

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EP (1) EP0404246B1 (de)
JP (1) JPH0330230A (de)
DE (1) DE69009303T2 (de)
NL (1) NL8901590A (de)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8600676A (nl) * 1986-03-17 1987-10-16 Philips Nv Halfgeleiderinrichting voor het opwekken van een elektronenstroom.
EP0257460B1 (de) * 1986-08-12 1996-04-24 Canon Kabushiki Kaisha Festkörper-Elektronenstrahlerzeuger

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DE69009303D1 (de) 1994-07-07
JPH0330230A (ja) 1991-02-08
DE69009303T2 (de) 1994-12-08
NL8901590A (nl) 1991-01-16
EP0404246A1 (de) 1990-12-27

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