Classifications

• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
  • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
  • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
  • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M7/483—Converters with outputs that each can have more than two voltages levels
  • H02M7/487—Neutral point clamped inverters
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
  • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
  • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
  • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M7/4826—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode operating from a resonant DC source, i.e. the DC input voltage varies periodically, e.g. resonant DC-link inverters
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
  • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
  • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
  • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
  • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
  • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
  • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
  • H02M7/53875—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
  • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
  • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

• the present invention relates to inverters for converting DC to alternating current with a neutral.
• the prior art Westinghouse topology has a switching matrix containing switches Q lf Q ] _, Q 2 , Q 2 . Q 3 and Q3 and the elements to the right thereof.
• the potential switched by the switching matrix is DC.
• the pairs of switches Q ⁇ and Q ⁇ _, Q 2 and ⁇ Q 2 and °- 3 and Q are not short circuited at any point in time as is the case with the present invention as a consequence of the pulses in the last 180" of waveform Q ] _ of Fig. 3 and the pulses Q ⁇ _ in the first 180° of the waveform Q ⁇ of fig. 3B.
• Inverters are known which convert a
• DC potential to a single phase and other inverters which convert a DC potential to multiple phases.
• These single phase and multiple phase inverters work on the principal that the DC power source is chopped and filtered to produce a single or three phase output with ' a neutral.
• the present invention provides an improved inverter for converting a DC voltage into three phase AC with a neutral and also for converting a DC voltage into single phase AC with a neutral.
• the invention has the advantages of having minimal switching losses, low stresses on the switching devices, high efficiency, small energy storage components, and does not require DC bus modulation.
• An inverter for producing an output signal with a neutral at a fundamental frequency for connection to a load with a load neutral includes a DC power source having a DC potential, an LC circuit, coupled to the DC power source, having a resonant frequency and resonating at the resonant frequency when the DC potential is applied to the LC circuit to cause current flow between the DC power source and the LC circuit, preferably having high Q; a switching circuit coupled to the
• the switching circuit having a first state permitting current to flow from the LC circuit to the load, and load neutral and a second state permitting current to flow from the load neutral and load to LC circuit; a zero voltage detector for detecting when a voltage across the switching circuit is zero for producing an output pulse synchronized with each zero voltage point of the resonant frequency and a controller for switching the first and second states at the fundamental frequency to produce an output applied to the load at the fundamental frequency, the fundamental frequency being preferably much lower than the resonant frequency and short circuiting the flow of current from application to the load during the pulses to cause energy to be fed into the LC circuit during the short circuiting of the load.
• the switching circuit is comprised of first and second switches each having an on state permitting current to flow between two terminals when a control signal is applied to a control terminal, each control signal having a frequency equal to the fundamental frequency and an on interval one-half the period of the fundamental frequency.
• the switches are in series between first and second terminals of the LC circuit with the first terminal of the LC circuit being a point from which current flows from the LC circuit to the load and the second terminal being a point to which current from the load flows to the LC circuit.
• a filter is coupled between the switching circuit and the load neutral for attenuating harmonics of the fundamental frequency and the resonant frequency.
• the filter may be a series LC circuit.
• An inverter for producing a single phase output signal at a fundamental frequency for connection to a load with a neutral includes a DC power supply for providing a DC potential, a first LC circuit, coupled to the DC power source, having a resonant frequency and resonating at the resonant frequency when the DC potential is applied to the first LC circuit to cause current flow between the DC power source and the first LC circuit; a second LC circuit coupled to the DC power source, having the resonant frequency and resonating at the resonant frequency when the DC potential is applied to the second LC circuit to cause current flow between the DC power source and the second LC circuit; a first switch having a conductivity controlled by a first control signal, coupled to the LC circuit and the load, having a first conductivity state permitting current to flow from the first LC circuit to the load and a second conductivity state blocking current flow to the load; a second switch, having a conductivity controlled by a first control signal, coupled to the second
• a third switch is coupled between the first and second switches and the first and second LC circuits for short circuiting the flow of current to the load in response to a control pulse; and a zero crossing point detector is provided for detecting when the voltage across a portion of the first or second LC circuits is zero for generating the control pulses synchronous with each zero voltage point.
• a filter is provided between the first and second switches and the load for attenuating harmonics of the fundamental frequency and the resonant frequency.
• the aforementioned single phase inverter may be utilized to generate three separate phases by the generation of appropriate timing signals for switching the states of the switches in each of the three phase inverter circuits.
• An inverter for producing a three phase output with neutral for connection to a three phase load with load neutral in accordance with another embodiment of the invention includes a DC power source having a DC potential, an LC circuit, coupled to the DC power source, having a resonant frequency and resonating at the resonant frequency when the DC potential is applied to the LC circuit to cause current flow between the DC power source and the LC circuit; a first switching circuit, coupled to the LC circuit, the first switching circuit having a first state permitting current to flow from the LC circuit through the load neutral to a first phase load of the three phase load and a second state permitting current to flow from the- load neutral through the first phase load to the LC circuit; a second switching circuit coupled to the LC circuit, the second switching circuit having a first state permitting current to flow from the LC circuit through the load neutral to a second phase load of the three phase load and a second state permitting current to flow from the load neutral to the second phase load to the LC circuit; a third switching circuit coupled to the LC circuit
• each control signal when a control signal is applied to a control terminal, each control signal having a frequency equal to the fundamental frequency and an on interval one-half the period of the fundamental frequency.
• the flow of current to the three phase load is short circuited for a short period of time synchronous with the zero voltage level of the resonant frequency across the first, second and third switching circuits to feed energy into the resonant circuit to replace the energy drawn out by the three phase load.
• the feeding of energy into the resonant circuit is produced by a zero crossing point detector which detects when the resonant frequency is at zero voltage across the first, second and third switching circuits and produces a control pulse synchronized with each zero crossing point for switching at least one of the first, second and third switching circuits to short circuit the flow of current from the one or more phases of the three phase load circuit associated with the one or more short circuited switching circuits.
• a fourth switching circuit is coupled in parallel with the first, second and third switching circuits, which is switched into conduction synchronously with the zero voltage intervals of the resonant frequency across the first, second and third switching circuits to feed energy into the LC circuit.
• two of the three switching circuits are in parallel with each other and the remaining one of the three switching circuits is in series with the parallel combination of the two switching circuits.
• Each of the first and second switches of the first, second and third switching circuits are in series to form a series circuit between first and second terminals coupled to the LC circuit, the first terminal of the LC circuit being a point from which current flows from the LC circuit to the three phase load and the second terminal of the LC circuit being a point to which current from the three phase load flows to the LC circuit.
• a filter is coupled between the first, second and third switching circuits and the load neutral for attenuating harmonics of the fundamental frequency and the resonant frequency.
• the filter is a LC circuit which has a low impedance for high harmonics of the fundamental frequency and the resonant frequency.
• Fig. 1 is a block diagram which conceptually illustrates the operation of an inverter for producing a three phase output with neutral in accordance with the present invention.
• Fig. 2A illustrates a first embodiment of the present invention and Fig. 2B illustrates the neutral forming circuitry of Fig. 2 in detail.
• Figs. 3A-J are a timing diagram of the operation of the embodiment of Figs. 2A and B.
• Fig. 4 ' illustrates a suitable controller for generating the switching signals for the six switches of the embodiment of Figs. 2A and B.
• Fig. 5 illustrates an alternative embodiment of the present invention.
• Fig. 6 illustrates an alternative embodiment of an inverter in accordance with the invention for producing a single phase.
• Fig. 7 is a timing diagram illustrating the operation of the embodiment of Fig. 6.
• Fig. 8 illustrates another embodiment of the invention which is a modification of the embodiment of Fig. 6 for producing a three phase output with neutral.
• Fig. 9 is a timing diagram illustrating the operation of the embodiment of Fig. 8. Best Mode For Carrying Out The Invention
• Fig. 1 illustrates a block diagram illustrating the basic operation of the present invention.
• a DC power supply 12 applies a voltage V QQ to a series resonant circuit 14 to create oscillations at the resonant frequency determined by the LC time constant.
• a signal f r is outputted from the series resonant circuit 14 to an inverter 16.
• the inverter 16 functions to synchronously switch the resonant 5 frequency f r at a rate equal to a fundamental frequency at which it is desired to generate three phase AC power to create three separate phase outputs 18, 20 and 22 which are respectively phase displaced 120° from each other.
• the fundamental frequency f ] _ is much less than
• the resonant frequency f r is 100 or more times higher than the fundamental frequency f to reduce the weight and size of the resonant LC circuit.
• V r 15 have a period equal to the period of the frequency f ] _ and which sequentially vary in terms of the magnitude V r as measured from the zero degree point of 1/3 V r , 2/3 V r , 1/3 V r ,_ -1/3 V r , -2/3 V r , and 1/3 V r .
• V r define a waveform comprised of six separate states each having a constant level. When filtered to remove high harmonics, this waveform produces a sinusoid at the frequency f ⁇ _.
• the three phases 18, 20 and 22, are applied to a filter 24 which, as stated
• the filtered three phases are applied to a three phase load with neutral 26.
• the three phase load with neutral 26 may be any three phase load with neutral requiring driving by three phases at the frequency f ⁇ _.
• Fig. 2 illustrates an embodiment of the present invention. Like parts are identified by like reference numerals in Figs. 1 and 2. It should be understood that this embodiment has three separate phase outputs and load neutral forming circuitry which has been omitted from Fig. 2A for purposes of clarity that is illustrated in detail in Fig. 2B.
• the series resonant circuit 14 is comprised of an inductor 28 and a capacitor 30 preferably with a Q of at least 10.
• oscillations commence at the resonant frequency determined by the LC time constant of the series resonant circuit 14.
• the oscillations at the resonant frequency are as illustrated above the reference numeral 16.
• the inverter 16 is comprised of a first switching circuit 32, a second switching circuit 34 and a third switching circuit 36 which are each comprised of a pair of series connected switches.
• the first switching circuit 32 is comprised of switches Q- and Q ⁇ ;
• the second switching circuit 34 is comprised of switches Q 2 and ⁇ Q 2 and
• tile third switching circuit 36 is comprised of switches Q3 and ⁇ 3.
• the first, second and third switching circuits 32, 34 and 36 are in parallel with each other and in parallel with the capacitor 30.
• Each of the switches Q , " Q ⁇ _, Q 2 , Q , Q3 and ⁇ 3 is controlled by a control signal which is generated by the control circuit discussed below with reference to Fig. 4.
• Each of the switches is switched to an on state for 180° of the period of the frequency f ⁇ _.
• Switching of the pairs of switches " of each of the first, second and third switching circuits 32, 34 and 36 is phase displaced 120° from the switching of the pairs of switches of the other corresponding switching circuits.
• the first switching circuit 32 has the switch Q ⁇ _ in an on state for the first 130° of the phase associated with it and the second switch Q]_ -- an ⁇ n state fo ⁇ the second 180" of the phase associated with it.
• the second switching circuit 34 has the switch Q 2 in an on state for the first 180° of the phase associated with it and a second switch Q 2 is in an on state for the second 180" of the phase associated with it.
• the third switching circuit 36 has the switch Q 3 in an on state for the first 180° of * the phase associated with it and the second switch Q 3 in an on state for the second 180° of the phase associated with it. Furthermore, as is discussed below, one or more of the switching circuits 32, 34 and 36 are short circuited so that both switches in one or more of the switching circuits are conductive at points at which the voltage across these switches are zero to minimize switching losses.
• Section 24 includes filters 42 , 48 and 54 which shunt the resonant frequency and high frequency harmonics o f the fundamental frequency f ⁇ _ to the neutral 66.
• the filters 42 , 48 and 54 are each an LC series filter circuit respectively connected between the j unction of switches Q ⁇ and Q 1 , between the junction of switches Q 2 and Q 2 and between the junction of switches Q 3 and Q 3 and the neutral 66 of a three phase load 26 to shunt frequency components substantially higher than the fundamental frequency f ] _ from the load to the neutral. It should be understood that other filters which attenuate high harmonics of the fundamental frequency and the resonant frequency- may be used with equal facility.
• the first phase filter 42 is comprised of inductor 44, which is connected to the junction point of switch Q ⁇ _ and switch Q " T _ of e first switching circuit 32, and capacitor 46 which is connected to the neutral 66.
• the second phase filter 48 is comprised of inductor 50, which is connected to the junction .point between switches Q 2 and Q 2 of the second switching circuit 34, and capacitor 52 which is connected to the neutral 66.
• the third phase filter 54 is comprised of inductor 56, which is connected to the junction point between switches Q 3 and Q 3 of the third switching circuit 36, and capacitor 58 which is connected to the neutral 66.
• the neutral of the power supply is formed by a wye connection as described below with reference to Fig. 2B.
• the three phase load 26 may be any three phase load, including an unbalanced three phase load, to be driven by a three phase power supply.
• the first phase load 60 is a series circuit comprised of resistance 62 and inductor 64 which is connected to neutral 66.
• the second phase load 68 is a series circuit comprised of resistance 70 and inductance 72 which is connected to neutral 66.
• the third phase load 74 is a series circuit comprised of res i s t an ce 7 6 and induct anc e 7 8 c onne cted to neutral 66 . It should be understood that each of the three phase loads 60 , 68 and 74 may in practice be any lo ' ad circuit comprised of any combination of res istance , inductance and capacitance including unbalanced loads .
• Fig. 2 respectively illustrates the first, second and third phase waveforms ⁇ jj , V Q JJ and V C JJ as applied to the f irst phase load 60 , second phase load 68 and third phase load 74. These waveforms are phase displaced 120° from each other as is conventional with three phase power supplies .
• the filter circuits substantially attenuat e th e h i gh frequency harmonics o f the frequency f ⁇ and the resonant frequency f r by shunting them to the neutral to bypass the load.
• the outputs from the intersection point of- each of the switches Q ] _ and Q ⁇ of the first switching circuit 32 , Q and Q 2 of the second switching circuit 34 , and the 3 and Q 3 of the third switching circuit 36 are in the form of a staircase waveform having the fractional magnitudes of the resonant frequency as described above as positive and negative multiples of one third the resonant frequency f r . These wave forms are respectively illustrated in Figs . 3H-J.
• Fig. 2B illustrates the power supply neutral forming circuitry 59 of Fig. 2A.
• a wye type connection 59 forms the neutral 66 with a three phase auto trans former. It should be understood that other circuits for forming the neutral 66 may also be used.
• Inductor 44 is connected to autotransformer winding 61 which is connected to the neutral 66.
• the output ' of the autotransfor er from winding 61 is connected to resistor 62.
• Inductor 50 is connected to autotransformer winding 69 which is connected to neutral 66.
• the output of the autotransformer from winding 69 is connected to resistor 70.
• Inductor 56 is connected to autotransformer winding 75 which is connected to neutral 66.
• the output of the autotransformer from winding 75 is connected to resistor 76.
• energy is fed into the series resonant circuit 14 by closing one or more of the switches Q lf Q lf Q 2 , ⁇ Q 2 , Q3 and Q3 during each zero voltage point of the resonant frequency across the capacitor 30 for the 180° of the fundamental frequency f ] _ while the switch is turned off while one or more of the associated series connected switches is turned on for 180° of the fundamental frequency f ⁇ to create a short circuit across the load 30 which feeds energy into the inductor 28 of the. resonant circuit and transfers energy to capacitor 30.
• a zero crossing detector discussed below detects the zero voltage points across capacitor 30 of the resonant circuit 14 and produces a short duration control pulse which is applied to one or more of the switches Q ⁇ _, Qi, Q , Q 2 , Q 3 and Q 3 to cause closure during the presence of the control pulse while its associated series connected switch is also conductive. Switching of one or more of the switches Q l Q ⁇ _, Q , Q 2 r Q 3 nd Q 3 is discussed below with respect to Figs. 3A and B. It should be understood that switching at the zero voltage point is utilized to minimize switching losses.
• Figs. 3A-J are a timing diagram of the operation of the embodiment illustrated in Figs. 2A and B.
• FIG. 3A illustrates the state of the switch Q ⁇ _ of the first switching circuit 32 for a full cycle of the frequency f ⁇ _.
• the first 180° represents the high state during which switch Q-. ⁇ s conductive.
• the second 180° represents the low state wherein the switch Q ⁇ _ is not conductive except for the high level pulses which are generated by a zero crossing detector discussed below.
• the associated switch Q ⁇ _ as illustrated in Fig. 3B is continually on which permits the flow of current through switches Q ⁇ _ and Q ⁇ of the _first switching circuit 32 to feed energy into the inductor 28 of the resonant circuit 14.
• Fig. 3B illustrates the state of switch Q ⁇ _ of the first switching circuit 32.
• the zero crossing detector discussed below applies the control pulses to cause conduction.
• the pulses from the zero crossing detector are applied to switch Q ⁇ _ to cause a short circuit to exist between the capacitor 30 through the closed switches Q ⁇ and Q ⁇ of the first switching circuit 32 and during the second 180° of operation a short circuit will exist as a consequence of the control pulses being applied to Ql.
• control pulses 80 may be applied to more than one of the pairs of switches Q ⁇ , Q j _, Q 2 , Q , Q3 and Q 3 of the first, second and third switching circuits 32, 34 and 36 depending upon the requirements of the amount of energy to be fed into the resonant circuit 14.
• Figs. 3C, D, ⁇ and F illustrate the switching states of the remaining switches Q 2 , Q 2 , Q 3 and Q3 of the second and third switching circuits 34 and 36.
• the relative phase between the switching states of the first, second and third switching circuits 32, 34 and 36 is that they are phase displaced 120° from each other.
• the state of each of the switches Q ⁇ _, Q 2 , Q 3 are phase displaced 180° from the state of the corresponding series connected switch Q ] _, Q 2 , and Q3.
• Figs. 3A-F excluding the effect of the control pulses produced by the zero crossing detector discussed below, causes two of the phases of the three phase load circuits 60, 68 and 74 at any time to be in parallel and the remaining one of the three phase loads to be in series with the parallel combination to complete the flow of current from the series resonant circuit 14 through three phase load circuits 60, 68 and 74 and neutral 66 and from the neutral and three phase load circuits back to the series resonant circuit 14.
• switches Q 2 and Q 3 are closed which causes the second phase load 68 and the third phase load 74 to be in parallel with each other and their parallel combination to be in series with the first phase load 60.
• the staircase waveform is formed by the switching of the high frequency oscillations outputted by the series resonant circuit 14 as illustrated in Fig. 3G in the sequence of Figs. 3A-F as described above.
• the switching of the staircase waveform creates the fundamental frequency f ⁇ _ which is filtered by the first, second and third phase filters 42, 48 and 54 to produce the three phase waveforms illustrated in Fig. 2A while attenuating the higher harmonics of the fundamental frequency and the resonant frequency by shunting them to the neutral.
• Fig. 4 illustrates a controller 90 for producing the switching states Q ⁇ _, Q lf Q 2 , Q 2 , Q3 and Q3 illustrated in Figs. 3A-F.
• the controller 90 is driven by a pulse source of frequency f r which is synchronized with the resonant frequency f r .
• the pulses have a duration equal to the duration of the pulses of Figs. 3A and B.
• a clock frequency generator 92 produces an output frequency 6f ] _ wherein
• 6f ⁇ _ is equal to f r n wherein n is an integer.
• a first JK flip-flop 94 produces output states Q and Q which are processed by OR gates 96 and 98 to produce the waveforms Q ⁇ _ and Q ⁇ _ illustrated respectively in Figs. 3A and 3B. It should be noted that the ORing of the output states from the flip-flop 94 with the frequency f r produces the switching control states Ql and Ql which are high for 180° and low for 180° and the series of pulses contained therein for permitting energy to flow into the resonance circuit as discussed above.
• JK flip-flop 100 has its inputs respectively coupled to the outputs Q and Q of JK flip-flop 94. Clocking of flip-flop 100 is at the same rate 6f ] _.
• JK flip-flop 102 has its inputs J and K respectively coupled to the outputs Q2 and Q2 of flip-flop 100. JK flip-flop 102 is clocked by the frequency 6f ⁇ _ to produce the outputs Q and Q corresponding to states Q 3 and Q 3 as illustrated in Figs. 3E and 3F. The outputs Q and Q ⁇ of the flip-flop 102 are respectively coupled back to the J and K inputs of flip-flop 94 to form a ring.
• JK flip-flop 94 and OR gates 96 and 98 functions as a digital zero crossing point detector to produce the output pulses respectively illustrated in the first 180° of Fig. 3B and in the second 180° of Fig. 3A.
• Other known analog or digital zero crossing point detectors could be used in practicing the invention.
• Figs. 5 illustrates a second embodiment of an inverter in accordance with the invention for producing three phase output with neutral for connection to a three phase load with neutral.
• Like parts in Figs. 3 and 5 are identified by like reference numerals.
• the embodiment of Fig. 5 contains a neutral forming circuit such as the neutral forming circuit 59 of Fig. 2B.
• switch Q7 has been provided to feed energy into the resonant circuit to replace that dissipated by the three phase load 26.
• a zero crossing point detector 80 of any conventional analog or digital design is provided to detect when the voltage across capacitor 30 of the series resonant circuit 40 is zero to produce control pulses for closing the switch Q7.
• the control pulses are produced throughout the 360° of the frequency f ] _ and occur at each zero voltage point and are applied to switch Q 7 to cause it to periodically close at the zero voltage points across capacitor 30 to minimize switching losses.
• Fig. 6 illustrates another embodiment of the present invention which is- an inverter with neutral for producing a single phase output.
• the principal of operation is similar to that of the embodiments of Figs. 3 and 5 in that a resonant circuit oscillations occurring at a higher frequency are switched at a lower fundamental frequency at which it is desired to produce the single phase output.
• First and second series resonant circuits 110 and 112 are resonant at a frequency f r which is higher than the desired output frequency f- ⁇ .
• Each resonant circuit 110 and 112 is comprised of an inductor 114 and a capacitor 116.
• the values of the inductors 114 and the capacitors 116 should be identical to provide the same resonant frequency.
• a battery 118 provides the energy for powering each resonant circuit.
• a first switch Ql when closed couples the output of the resonant circuit 110 to a choke 120 which attenuates harmonics of the output frequency f ⁇ _ and the resonant frequency f r .
• the choke' 120 functions as a filter to pass only the fundamental frequency f ] _ in substantially unattenuated form.
• the choke 120 is connected to load 122 which may be any conventional load.
• the load as illustrated is comprised of a capacitor 124 and a resistor 126.
• the second resonant circuit 112 is selectively connected the choke 120 when the switch Q2 is conductive.
• Switch Q3 is provided to permit energy to be fed into the resonant circuits 110 and 112 to sustain the level of oscillation in the same manner as described above in the embodiments of Figs. 3 and 5.
• Zero crossing point detector 128 is provided for detecting the zero voltage points across switch Q 3 to produce control pulses (Fig. 7C) for switching the switch Q 3 into conduction.
• Figs. 7A-F illustrate the various waveforms present during the operation of the embodiment of Fig. 6.
• Fig. 7A illustrates the switching states of the transistor Ql over 360° of a cycle of a basic frequency equal to f ⁇ _ . For the first 180° of the output applied to the load 122, the switch Ql is conductive causing the application of the waveform as illustrated in Fig. 7D to the choke 120.
• Fig. 7B illustrates the state of switch Q2 which is nonconductive for the first 180° of the output applied to the load 122 and is conductive for the last 180°.
• a conventional signal generator 123 such as a square wave generator, may be used to generate the signals Q ⁇ and Q 2 which have a frequency equal to AC output signal V-JJ- of Fig. 7F.
• switch Q2 applies the waveform of Fig. 7E to the choke 120.
• Fig. 7C illustrates the switching waveform applied to the switch Q3 to feed energy into the resonant circuits.
• the zero crossing detector 128 is illustrated as being connected to the resonant circuits 110 and 112 to produce the control pulses of Fig. 7C. However, it should be understood that the zero crossing detector may alternatively be connected across the other elements discussed above.
• Fig. 7F illustrates the signal applied to the load 122 after filtering by the choke 120.
• the choke 120 removes the higher harmonics of the fundamental frequency f ⁇ _ and the resonant frequency f r .
• Fig. 8 illustrates a fourth embodiment of the present invention for producing a three phase output with neutral.
• Each of the phases of the inverter is identical to the single phase inverter of Fig. 6.
• the first phase generator 130 corresponds in function to the first switching circuit 32 of Fig. 2A.
• the second phase generator 132 corresponds in function to the second switching circuit 34 of Fig. 2A.
• the third phase generator 132 corresponds in function to the third switching circuit 36 of Fig. 2A.
• a zero crossing detector 136 detects the time that the voltage is zero across switch Q to generate the switching pulses Q 4 to activate the switch Q4 to feed energy into the resonant circuits 110 and 112 of the first generator 130 and minimize switching losses.
• a zero crossing detector 138 detects the time that the voltage is zero across switch Q5 to generate the switching pulses Q 5 to activate switch Q 5 to feed energy into the resonant circuits 110 and 112 of the second phase generator 132 and minimize switching losses.
• a zero crossing detector 140 detects the time that the voltage is zero across switch Qg to generate the switching pulses Q 6 to activate switch Qg to feed energy into the resonant circuits 110 and 112 of the third phase generator 134 and minimize switching losses.
• Fig. 9 illustrates a timing circuit for generating the control states of the switches Ql, Ql, Q2, Q2, Q3 and Q3.
• the operation of the timing circuit of Fig. 9 is identical to Fig. 6 with the exception that OR gates 96 and 98 have been removed.

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• 1987
  • 1987-12-03 US US07/128,444 patent/US4862342A/en not_active Expired - Fee Related
• 1988
  • 1988-11-16 WO PCT/US1988/004086 patent/WO1989006064A1/fr not_active Application Discontinuation
  • 1988-11-16 EP EP19890901168 patent/EP0343238A4/fr not_active Withdrawn
  • 1988-11-16 JP JP1501089A patent/JPH02502422A/ja active Pending
  • 1988-11-28 IL IL88520A patent/IL88520A0/xx unknown

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