EP0316414A1 - Composite structure, application to a laser and process for producing same - Google Patents

Composite structure, application to a laser and process for producing same

Info

Publication number
EP0316414A1
EP0316414A1 EP88904979A EP88904979A EP0316414A1 EP 0316414 A1 EP0316414 A1 EP 0316414A1 EP 88904979 A EP88904979 A EP 88904979A EP 88904979 A EP88904979 A EP 88904979A EP 0316414 A1 EP0316414 A1 EP 0316414A1
Authority
EP
European Patent Office
Prior art keywords
layer
laser
layers
phase
production
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP88904979A
Other languages
German (de)
French (fr)
Inventor
Manijeh Razeghi
Franck Omnes
Robert Blondeau
Martin Defour
Philippe Maurel
Michel Krakowski
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Publication of EP0316414A1 publication Critical patent/EP0316414A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02376Carbon, e.g. diamond-like carbon
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00Nanooptics, e.g. quantum optics or photonic crystals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02425Conductive materials, e.g. metallic silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/0245Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02505Layer structure consisting of more than two layers
    • H01L21/02507Alternating layers, e.g. superlattice
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151Compositional structures
    • H01L29/152Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • H01L29/155Comprising only semiconductor materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/26Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
    • H01L29/267Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S2301/00Functional characteristics
    • H01S2301/17Semiconductor lasers comprising special layers
    • H01S2301/173The laser chip comprising special buffer layers, e.g. dislocation prevention or reduction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/0206Substrates, e.g. growth, shape, material, removal or bonding
    • H01S5/0213Sapphire, quartz or diamond based substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/30Structure or shape of the active region; Materials used for the active region
    • H01S5/34Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
    • H01S5/343Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/34306Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength longer than 1000nm, e.g. InP based 1300 and 1500nm lasers

Definitions

  • Heterostructure application to a laser and method of production.
  • the invention relates to a device made of semiconductor materials produced on a substrate with a parameter different from that of the semiconductor materials of the device.
  • synthetic diamonds are used as a support for optoelectronic components.
  • the invention consists in using the insulating or semiconductor diamond as a substrate and fabricating the integrated circuits using ion implantations, as is currently carried out on the Si substrate.
  • the invention consists in using the semi-insulating or conductive diamond as a substrate, to epitaxial directly the III-V "" or II-VI (heterojunction, superlattices) semiconductor materials in order to manufacture the components.
  • optoelectronics such as laser, photodiode, photocathode, cel-
  • the invention therefore relates to a device made of semiconductor materials, characterized in that it comprises:
  • the invention also relates to a method for producing a device according to any one of the preceding claims, characterized in that it comprises the following steps:
  • FIG. 3 an exemplary embodiment of a distributed network laser structure (DFB);
  • DFB distributed network laser structure
  • FIG. 5 an exemplary embodiment of a distributed network laser comprising a deflection mirror.
  • Diamond has excellent electrical insulation and thermal conduction properties.
  • the diamond By doping the diamond with boron with doping less than 100 ppm, a p-type semiconductor material is obtained. By doping the diamond with boron greater than 100 ppm, the diamond becomes conductive.
  • the invention therefore provides to take advantage of the qualities of good thermal conduction of the diamond to use it as a substrate in the production of semiconductor components.
  • the implantation of semiconductor materials on the diamond poses problems of mismatching due to the different mesh parameters.
  • the invention provides, as shown in FIG. 1, for producing a layer 2 of amorphous silicon on the diamond 1.
  • This layer of amorphous silicon will after annealing have substantially the same lattice parameter as the diamond and will facilitate nucleation.
  • This silicon layer can be produced by epitaxy at very low temperature, 300 ° C. for example.
  • an adaptation layer is produced such that this adaptation layer is adapted as a mesh parameter with the silicon layer and that a layer of a semiconductor material of a component C is adapted as a mesh parameter on this adaptation layer.
  • This adaptation layer is produced in the form of a superlattice.
  • the layer of amorphous silicon can be about 100 Angstroems thick.
  • the component produced is a semiconductor laser consisting of a first confinement layer 4 doped n, an active layer 5, a second confinement layer 6 doped p and a contact layer 7.
  • the laser shown is made of III-V material from the periodic table.
  • the confinement layers are made of Indium InP phosphide and the active layer is made of arsenic, indium and gallium phosphide.
  • the super ⁇ network 3 consists of layers alternately of different layers so that the mesh parameter of the part of the super-network in contact with the silicon layer 2 to substantially the same lattice parameter as silicon while the part of the superlattice in contact with the first confinement layer 4 has substantially the same lattice parameter as this confinement layer.
  • the superlattice is thus made of III-V type material and by way of example it is made of GaAs and GalnP layers or of GaAs and GalnAs layers.
  • each layer of the superlattice 3 has a thickness of approximately 50 Angstroms.
  • the entire super-grid has a thickness of approximately 2000 Angstroems.
  • the laser produced on the superlattice 3 can also be made of type II-VI semiconductor material and the su ⁇ per-network 3 is then also made of type II-VI semiconductor material.
  • the substrate is diamond.
  • the invention is also applicable to a device in which the substrate is a material of the T-CBN (Transparent Cubic Niobate Borate Nitride) type. Such a substrate receives a layer 2 of amorphous silicon.
  • a component is then produced on the layer 2 of amorphous silicon as, as described above.
  • an adaptation super-network 3 is also provided.
  • the semiconductor materials used and the thicknesses of the different layers are as described above. Likewise, the production of the different layers can be done as previously.
  • the present invention also relates to a semiconductor photo-emitter device of the high power laser type (1 to 10 W) guided by the Index, and using a distributed network.
  • fog DFB Distributed Feedback
  • These devices have aroused great interest for a few years since they operate for a considerably high power value (1 to 10 W). They allow in particular the production of single-mode power lasers operating at 0.8 ⁇ m, 1.3 ⁇ m or 1.55 ⁇ m.
  • a description of a DFB laser type can be found in the article "Low-Threshold Distributed Feedback Lasers Fabricated on Mate ⁇ rial Grown Completely by LP-MOCVD" by M. RAZEGHI et al published in IEEE Journal of Quantum Electronics , Volumes QE-21, number 6 of June 1985.
  • the advantage of the present invention compared to other structures of power semiconductor lasers is that, the thermal conductivity of the diamond is 2 times greater than that of copper.
  • These devices can be used on the one hand to replace gas lasers and on the other hand to pump YAG lasers.
  • Figure 3 shows such a laser structure. We find, in this figure:
  • the active layer 5 is covered with a guide layer 8 produced in the form of a distributed network making it possible to obtain the laser effect.
  • the guide layer 8 is covered with the confinement layer 6 and the contact layer 7.
  • FIG. 4 represents a power laser applying the structure of FIG. 3.
  • the engraving of the ribbons 9 was done in such a way that their direction is perpendicular to the direction of the grooves of the distributed network to obtain the laser effect. These different ribbons emit beams in phase (phase locked).
  • each ribbon has a width of 1 micro ⁇ meter and the distance between two ribbons is two to three micrometers.
  • FIG. 5 represents a laser, as described previously, comprising in the substrate 1, at one end of the laser, an inclined plane 11, for example at 45 °, relative to the emission plane of the laser.
  • This inclined plane 11 is reflective thereby directing 'easily the laser beam emitted towards sitifs dispo ⁇ users not shown.
  • the invention also relates to a method for manufacturing at least one semiconductor device of the laser type with double heterojunction and with index guidance, at high power and single mode (DBF).
  • the device being produced from a Bore-doped diamond substrate. It includes the following steps:
  • a fifth step comprising the deposition of metal contacts on the contact layer and on the face of the substrate.
  • the above process can be followed by etching at one end of the laser obtained from a reflecting plane 11 inclined, at 45 °, for example, relative to the emission plane of the laser.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Ceramic Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Biophysics (AREA)
  • Optics & Photonics (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Recrystallisation Techniques (AREA)
  • Semiconductor Lasers (AREA)

Abstract

L'invention concerne un dispositif tel qu'un composant (C) en matériau semiconducteur réalisé sur un substrat (1) de paramètre de maille différent. Le substrat (1) est recouvert d'une couche (2) en silicium recouverte elle-même d'un super-réseau d'adaptation (3) sur lequel est réalisé le composant (C). L'invention est plus particulièrement applicable à un composant réalisé sur diamant.The invention relates to a device such as a component (C) made of a semiconductor material produced on a substrate (1) with a different lattice parameter. The substrate (1) is covered with a silicon layer (2) itself covered with a matching super-network (3) on which the component (C) is produced. The invention is more particularly applicable to a component produced on diamond.

Description

Heterostructure, application à un laser et procédé de réalisation. Heterostructure, application to a laser and method of production.
L'invention concerne un dispositif en matériaux semiconducteurs réalisé sur un substrat de paramètre différent de celui des matériaux semiconducteurs du dispositif .The invention relates to a device made of semiconductor materials produced on a substrate with a parameter different from that of the semiconductor materials of the device.
L'étude des propriétés thermiques du diamant fait apparaî¬ tre que d'une part la conductivité thermique est 2 fois supé¬ rieure à celle du cuivre et que d'autre part, le coefficient de dilatation thermique est 5 fois moins important que celui du cui¬ vre.The study of the thermal properties of the diamond shows that on the one hand the thermal conductivity is 2 times higher than that of copper and that on the other hand, the coefficient of thermal expansion is 5 times less important than that of copper.
Cela apparaît clairement dans le tableau ci- dessous ou les caractéristiques du diamant, du nitrure de borate T-CBN (Transparent Cubic Borate Nitrure) et du cuivre sont comparées .This is clearly shown in the table below where the characteristics of diamond, borate nitride T-CBN (Transparent Cubic Borate Nitride) and copper are compared.
On a récemment réussi à fabriquer du diamant dopé au Bore. Lorsque- la quantité de Bore est supérieure à 100 ppm, le diamant devient conducteur et pour une quantité inférieure à 100 ppm, il devient semiconducteur. We recently succeeded in manufacturing diamond doped with Boron. When the amount of boron is greater than 100 ppm, the diamond becomes conductive and for an amount less than 100 ppm, it becomes semiconductor.
A l'heure actuelle, on utilise le diamant synthétique comme support pour les composants optoélectroniques .At present, synthetic diamonds are used as a support for optoelectronic components.
Cependant l'utilisation du diamant ou du nitrure de bo¬ rate T-CBN pour implanter des composants à semiconducteurs n'éta.it pas pensable, le problème à résoudre étant un problème de désadaptation de mailles.However, the use of diamond or nitride of bo¬ rate T-CBN for implanting semiconductor components was not conceivable, the problem to be solved being a problem of mismatching of meshes.
L'invention consiste à utiliser le diamant isolant ou semiconducteur comme un substrat et fabriquer les circuits inté¬ grés en utilisant les implantations ioniques, tel que l'on pro¬ cède actuellement sur le substrat Si.The invention consists in using the insulating or semiconductor diamond as a substrate and fabricating the integrated circuits using ion implantations, as is currently carried out on the Si substrate.
D'autre part, l'invention consiste à utiliser le diamant semi- isolant ou conducteur comme substrat, à épitaxier directe¬ ment les matériaux semiconducteurs III- V ""ou II- VI (hétérojonction, super-réseaux) afin de fabriquer les composants optoélectroniques tels que laser, photodiode, photocathode, cel-On the other hand, the invention consists in using the semi-insulating or conductive diamond as a substrate, to epitaxial directly the III-V "" or II-VI (heterojunction, superlattices) semiconductor materials in order to manufacture the components. optoelectronics such as laser, photodiode, photocathode, cel-
Iule solaire . . . et les composants hyperf réquences tels que diodeSolar cell. . . and microwave components such as diode
GUNN, diode IMPATT, transistor FET.GUNN, IMPATT diode, FET transistor.
L'invention concerne donc un dispositif en matériaux semiconducteurs caractérisé en ce qu'il comporte :The invention therefore relates to a device made of semiconductor materials, characterized in that it comprises:
- un substrat en diamant ; - au moins une couche de silicium déposée sur une face du substrat ;- a diamond substrate; - at least one layer of silicon deposited on one face of the substrate;
- une série de couches de composés semiconducteurs for¬ mant un super-réseau d'adaptation déposées sur la couche de silicium et dont les couches les plus proches de la couche de silicium ont un premier paramètre de maille peu différent de celui de la couche de silicium et dont les couches les plus éloi¬ gnées ont un deuxième paramètre de maille ; - un composant en matériau semiconducteur dont au moins la couche la plus proche du super-réseau à un paramètre de maille peu différent de celui du deuxième paramètre de maille .- A series of layers of semiconductor compounds forming an adaptation superlattice deposited on the silicon layer and whose layers closest to the silicon layer have a first lattice parameter little different from that of the layer of silicon and whose most distant layers have a second lattice parameter; - a component of semiconductor material including at least the layer closest to the superlattice with a lattice parameter little different from that of the second lattice parameter.
L'invention concerne également un procédé de réalisation ^ d'un dispositif selon l'une quelconques des revendications précé¬ dentes caractérisé en ce qu'il comporte les étapes suivantes :The invention also relates to a method for producing a device according to any one of the preceding claims, characterized in that it comprises the following steps:
- une première étape de réalisation par épitaxie à basse température d'une couche de silicium amorphe sur le substrat ;- A first step of producing by epitaxy at low temperature a layer of amorphous silicon on the substrate;
- une deuxième étape de chauffage facilitant la distribu¬ ée tion des nucléations ;- A second heating step facilitating the distribution of the nucleation;
- une troisième étape de réalisation par épitaxie d'une couche d'adaptation sur la couche de silicium amorphe ;- a third stage of epitaxy of an adaptation layer on the layer of amorphous silicon;
- une quatrième étape de réalisation par épitaxie d'un composant en matériau semiconducteur.- A fourth stage of production by epitaxy of a component of semiconductor material.
I -5 Les différents objets et caractéristiques de l'invention apparaîtront de façon plus détaillée dans la description qui va suivre faite à titre d'exemple en se reportant aux figures an¬ nexées qui représente :I - 5 The various objects and characteristics of the invention will appear in more detail in the description which follows, given by way of example with reference to the appended figures which represents:
- la figure 1, un exemple de réalisation d'un dispositif ™ selon l'invention ;- Figure 1, an embodiment of a device ™ according to the invention;
- la figure 2, un exemple de réalisation d'un laser semiconducteurs selon l'invention ;- Figure 2, an embodiment of a semiconductor laser according to the invention;
- la figure 3, un exemple de réalisation d'une structure laser à réseau distribué (DFB) ;- Figure 3, an exemplary embodiment of a distributed network laser structure (DFB);
2^ - la figure 4, un exemple de réalisation d'un laser de puissance à réseau distribué ;2 ^ - Figure 4, an exemplary embodiment of a distributed network power laser;
- la figure 5, un exemple de réalisation d'un laser à réseau distribué comportant un miroir de renvoi.- Figure 5, an exemplary embodiment of a distributed network laser comprising a deflection mirror.
Le diamant possède d'excellentes propriétés d'isolation 0 électrique et de conduction thermique .Diamond has excellent electrical insulation and thermal conduction properties.
En dopant le diamant avec du bore avec un dopage infé¬ rieur à 100 ppm on obtient un matériau semiconducteur de type p . En réalisant un dopage du diamant avec du bore supérieur à 100 ppm, le diamant devient conducteur . L'invention prévoit donc de mettre à profit les qualités de bonne conduction thermique du diamant pour l'utiliser comme substrat dans la réalisation de composants à semiconducteurs. Cependant l'implantation de matériaux à semiconducteurs sur le diamant pose des problèmes de désadaptation dus aux paramètres de mailles différents .By doping the diamond with boron with doping less than 100 ppm, a p-type semiconductor material is obtained. By doping the diamond with boron greater than 100 ppm, the diamond becomes conductive. The invention therefore provides to take advantage of the qualities of good thermal conduction of the diamond to use it as a substrate in the production of semiconductor components. However, the implantation of semiconductor materials on the diamond poses problems of mismatching due to the different mesh parameters.
Pour résoudre ces problèmes l'invention prévoit comme cela est représenté en figure 1 de réaliser sur le diamant 1 une couche 2 de silicium amorphe. Cette couche de silicium amorphe aura après recuit sensiblement un même paramètre de maille que le diamant et facilitera la nucléation.To solve these problems, the invention provides, as shown in FIG. 1, for producing a layer 2 of amorphous silicon on the diamond 1. This layer of amorphous silicon will after annealing have substantially the same lattice parameter as the diamond and will facilitate nucleation.
On procède donc ensuite à un échauffement à une tempéra¬ ture telle que 500 ou 600 °C, par exemple, pour avoir une distri¬ bution des nucléations sur le diamant. Cette couche de silicium peut être réalisée par épitaxie à très basse température, 300°C par exemple.We then proceed to heating to a temperature such as 500 or 600 ° C, for example, to have a distribution of nucleations on the diamond. This silicon layer can be produced by epitaxy at very low temperature, 300 ° C. for example.
Sur la couche de silicium 2 est réalisé une couche d'adap¬ tation telle que cette couche d'adaptation soit adaptée-en paramè¬ tre de maille avec la couche de silicium et qu'une couche d'un matériau semiconducteur d'un composant C soit adaptée en para¬ mètre de maille sur cette couche d'adaptation.On the silicon layer 2, an adaptation layer is produced such that this adaptation layer is adapted as a mesh parameter with the silicon layer and that a layer of a semiconductor material of a component C is adapted as a mesh parameter on this adaptation layer.
Cette couche d'adaptation est réalisée sous forme d'un super-réseau .This adaptation layer is produced in the form of a superlattice.
Bien que cela ne soit pas toujours obligatoire dans tous les cas, on peut prévoir un recuit à ce stade du procédé.Although this is not always compulsory in all cases, provision may be made for annealing at this stage of the process.
A titre d'exemple, la couche de silicium amorphe peut faire environ 100 Angstroems d'épaisseur.For example, the layer of amorphous silicon can be about 100 Angstroems thick.
Sur la figure 2, le composant réalisé est un laser à semiconducteurs constitué d'une première couche de confinement 4 dopée n, d'une couche active 5, d'une deuxième couche- de confinement 6 dopée p et d'une couche de contact 7.In FIG. 2, the component produced is a semiconductor laser consisting of a first confinement layer 4 doped n, an active layer 5, a second confinement layer 6 doped p and a contact layer 7.
Le laser représenté est réalisé en matériau III-V de la classification périodique des éléments . A titre d'exemple, les couches de confinement sont en phosphure d'Indium InP et la couche active en phosphure d'arsenic, d'indium et de gallium. Pour réaliser l'adaptation en mailles de ce laser, le super¬ réseau 3 est constitué de couches alternativement de couches différentes de telle façon que le paramètre de maille de la par¬ tie du super- réseau en contact avec la couche de silicium 2 à sensiblement le même paramètre de maille que le silicium tandis que la partie du super-réseau en contact avec la première cou¬ che de confinement 4 a sensiblement le même paramètre de maille que cette couche de confinement.The laser shown is made of III-V material from the periodic table. For example, the confinement layers are made of Indium InP phosphide and the active layer is made of arsenic, indium and gallium phosphide. To achieve the mesh adaptation of this laser, the super¬ network 3 consists of layers alternately of different layers so that the mesh parameter of the part of the super-network in contact with the silicon layer 2 to substantially the same lattice parameter as silicon while the part of the superlattice in contact with the first confinement layer 4 has substantially the same lattice parameter as this confinement layer.
Le super-réseau est ainsi réalisé en matériau de type III- V et à titre d'exemple il est réalisé de couches GaAs et GalnP ou de couches de GaAs et GalnAs .The superlattice is thus made of III-V type material and by way of example it is made of GaAs and GalnP layers or of GaAs and GalnAs layers.
Tandis que la couche de silicium 2 a environ une épais¬ seur de 100 Angstroems, chaque couche du super-réseau 3 a une épaisseur d'environ 50 Angstroems . L'ensemble du super-réseau a une épaisseur de sensiblement 2000 Angstroems .While the silicon layer 2 has a thickness of approximately 100 Angstroms, each layer of the superlattice 3 has a thickness of approximately 50 Angstroms. The entire super-grid has a thickness of approximately 2000 Angstroems.
Le laser réalisé sur le super-réseau 3 peut également être réalisé en matériau semiconducteur de type II-VI et le su¬ per-réseau 3 est alors également réalisé en- matériau semiconducteur de type II-VI . Dans ce qui précède on a décrit des exemples de réalisa¬ tion dans lesquels le substrat est du diamant. L'invention est également applicable à un dispositif dans lequel le substrat est un matériau du type T-CBN (Transparent Cubic Niobate Borate Nitrure) . Un tel substrat reçoit une couche 2 de silicium amor- phe .The laser produced on the superlattice 3 can also be made of type II-VI semiconductor material and the su¬ per-network 3 is then also made of type II-VI semiconductor material. In the foregoing, examples of embodiments have been described in which the substrate is diamond. The invention is also applicable to a device in which the substrate is a material of the T-CBN (Transparent Cubic Niobate Borate Nitride) type. Such a substrate receives a layer 2 of amorphous silicon.
Un composant est ensuite réalisé sur la couche 2 de silicium amorphe comme, cela a été décrit précédemment. Notam¬ ment, on prévoit également un super-réseau d'adaptation 3.A component is then produced on the layer 2 of amorphous silicon as, as described above. In particular, an adaptation super-network 3 is also provided.
Les matériaux semiconducteurs utilisés et les épaisseurs des différentes couches sont tels que décrits précédemment. De même, la réalisation des différentes couches peut se faire comme précédemment .The semiconductor materials used and the thicknesses of the different layers are as described above. Likewise, the production of the different layers can be done as previously.
La présente invention concerne également un dispositif semiconducteur photo -émetteur de type laser de puissance élevée (1 à 10 W) à guidage par l'Indice, et utilisant un réseau distri- bué DFB (Distributed Feedback) . Ces dispositifs suscitent de¬ puis quelques années un grand intérêt car ils fonctionnent pour une valeur de puissance considérablement élevée (1 à 10 W) . Ils permettent notamment la réalisation de lasers de puissance mono- modes fonctionnant à 0.8 μm, 1.3 μm ou 1.55 μm. On trouvera une description d'un laser du type laser DFB dans l'article "Low-Threshold Distributed Feedback Lasers Fabricated on Mate¬ rial Grown Completely by LP-MOCVD" de M. RAZEGHI et al pu¬ blié dans IEEE Journal of Quantum Electronics, Volumes QE-21, numéro 6 de juin 1985.The present invention also relates to a semiconductor photo-emitter device of the high power laser type (1 to 10 W) guided by the Index, and using a distributed network. fog DFB (Distributed Feedback). These devices have aroused great interest for a few years since they operate for a considerably high power value (1 to 10 W). They allow in particular the production of single-mode power lasers operating at 0.8 μm, 1.3 μm or 1.55 μm. A description of a DFB laser type can be found in the article "Low-Threshold Distributed Feedback Lasers Fabricated on Mate¬ rial Grown Completely by LP-MOCVD" by M. RAZEGHI et al published in IEEE Journal of Quantum Electronics , Volumes QE-21, number 6 of June 1985.
L'intérêt de la présente invention par rapport aux autres structures de lasers semiconducteur de puissance est que, la conductivité thermique du diamant est 2 fois plus importante que celle du cuivre. On peut utiliser ces dispositifs d'une part pour rempla¬ cer les lasers à gaz et d'autre part pour pomper les lasers YAG. La figure 3 représente une telle structure laser. On re¬ trouve, sur cette figure :The advantage of the present invention compared to other structures of power semiconductor lasers is that, the thermal conductivity of the diamond is 2 times greater than that of copper. These devices can be used on the one hand to replace gas lasers and on the other hand to pump YAG lasers. Figure 3 shows such a laser structure. We find, in this figure:
- le substrat 1 ; - la couche de silicium amorphe 2 ;- the substrate 1; - the layer of amorphous silicon 2;
- le super-réseau d'adaptation 3 ; -- the adaptation super-network 3; -
- la couche de confinement 4 ;- the confinement layer 4;
- la couche active 5.- the active layer 5.
En supplément, la couche active 5 est recouverte d'une couche de guidage 8 réalisée sous forme d'un réseau distribué permettant d'obtenir l'effet laser.In addition, the active layer 5 is covered with a guide layer 8 produced in the form of a distributed network making it possible to obtain the laser effect.
La couche de guidage 8 .est recouverte de la couche de confinement 6 et de la couche de contact 7.The guide layer 8 .is covered with the confinement layer 6 and the contact layer 7.
La figure 4, représente un laser de puissance appliquant la structure de la figure 3.FIG. 4 represents a power laser applying the structure of FIG. 3.
Sur cette figure, on retrouve les mêmes couches que celles de la figure 3. En supplément, dans la couche active 3 et la couche de guidage 8 ont été gravés des rubans parallèles 9.In this figure, we find the same layers as those of FIG. 3. In addition, in the active layer 3 and the guide layer 8 were engraved parallel ribbons 9.
La gravure des rubans 9 a été faite de telle façon que leur direction soit perpendiculaire à la direction des sillons du réseau distribué permettant d'obtenir l'effet laser. Ces diffé¬ rents rubans émettent des faisceaux en phase (phase locked) .The engraving of the ribbons 9 was done in such a way that their direction is perpendicular to the direction of the grooves of the distributed network to obtain the laser effect. These different ribbons emit beams in phase (phase locked).
A titre d'exemple, chaque ruban a une largeur de 1 micro¬ mètre et la distance entre deux rubans est de deux à trois micro- mètres .For example, each ribbon has a width of 1 micro¬ meter and the distance between two ribbons is two to three micrometers.
La figure 5, représente un laser, tel que décrit précédem¬ ment, comportant dans le substrat 1, à une extrémité du laser, un plan incliné 11, par exemple à 45°, par rapport au plan d'émission du laser. Ce plan incliné 11 est réfléchissant ce qui permet de diriger ' aisément le faisceau laser émis vers des dispo¬ sitifs utilisateurs non représentés .FIG. 5 represents a laser, as described previously, comprising in the substrate 1, at one end of the laser, an inclined plane 11, for example at 45 °, relative to the emission plane of the laser. This inclined plane 11 is reflective thereby directing 'easily the laser beam emitted towards sitifs dispo¬ users not shown.
L'invention a également pour objet un procédé de fabrica¬ tion d'au moins un dispositif semiconducteur de type laser à double hétérojonction et à guidage par l'indice, à puissance élevée et monomode (DBF) . Le dispositif étant réalisé à partir d'un substrat diamant dopé Bore . Il comporte les étapes suivan¬ tes :The invention also relates to a method for manufacturing at least one semiconductor device of the laser type with double heterojunction and with index guidance, at high power and single mode (DBF). The device being produced from a Bore-doped diamond substrate. It includes the following steps:
- une première étape de dépôt de couches épita_>dales sur le dit substrat diamant 1, comprenant successivement : - a) dépôt d'une couche de silicium amorphe 2 suivi d'un recuit ;- A first step of depositing epita_> dales layers on said diamond substrate 1, successively comprising: - a) depositing an amorphous silicon layer 2 followed by annealing;
- b) dépôt d'une série de super-réseaux 3 à base des matériaux semiconducteurs III-V pour éliminer les dislocations dues aux désadaptations de maille cristalline entre le substrat diamant et le semiconducteur III-V utilisé pour la fabrication du laser qui peut également, sans que cela soit obligatoire, être également suivi d'un recuit ;b) deposition of a series of superlattices 3 based on III-V semiconductor materials to eliminate dislocations due to crystal mesh mismatches between the diamond substrate and the III-V semiconductor used for the manufacture of the laser which can also , without this being compulsory, also be followed by annealing;
- c) dépôt d'une première couche de confinement 4 dopé n, une couche active 5, une couche guide d'onde 8 ; - une seconde étape consistant en l'élaboration d'un réseau de Bragg par holographie et gravure chimique dans la couche guide d'onde 8 ;- c) deposition of a first confinement layer 4 doped n, an active layer 5, a waveguide layer 8; a second step consisting in the development of a Bragg grating by holography and chemical etching in the waveguide layer 8;
- une troisième étape constituée par élaboration de ru¬ bans 9 ; - une quatrième étape constituée par épitaxie de la cou¬ che de confinement 6 dopée et de la couche contact 7 ;- a third step constituted by the development of ru¬ bans 9; - A fourth step constituted by epitaxy of the doped confinement layer 6 and of the contact layer 7;
- une cinquième étape comprenant le dépôt de contacts métalliques sur la couche de contact et sur la face du substrat.a fifth step comprising the deposition of metal contacts on the contact layer and on the face of the substrate.
Le procédé qui précède peut être suivi par une gravure à une extrémité du laser obtenu d'un plan réfléchissant 11 incli¬ né, à 45°, par exemple, par rapport au plan d'émission du laser.The above process can be followed by etching at one end of the laser obtained from a reflecting plane 11 inclined, at 45 °, for example, relative to the emission plane of the laser.
Il est à noter que les différents dépôts précédants peu¬ vent être faits par épitaxie de couches monoatomiques.It should be noted that the various preceding deposits can be made by epitaxy of monoatomic layers.
Il est bien évident que la description qui précède n'a été faite qu'à titre d'exemple non limitatif. Les exemples numéri¬ ques, notamment, et les types de matériaux utilisables n'ont été indiquées que pour illustrer la description. D'autres variantes peuvent être envisagées sans sortir du cadre de l'invention. It is obvious that the above description has been given only by way of nonlimiting example. Numerical examples, in particular, and the types of materials that can be used have been given only to illustrate the description. Other variants can be envisaged without departing from the scope of the invention.

Claims

REVENDICATIONS
~ 1. Dispositif en matériaux semiconducteurs caractérisé en ce qu'il comporte : ~ 1. Device made of semiconductor materials characterized in that it comprises:
- un substrat (1) en diamant ;- a diamond substrate (1);
- au moins une couche de silicium (2) déposée sur une •5 face du substrat ;- at least one layer of silicon (2) deposited on one side of the substrate;
- une série de couches de composés semiconducteurs for¬ mant un super-réseau (3) d'adaptation déposées sur la couche de silicium (2) et dont les couches les plus proches de la couche de silicium (2) ont un premier paramètre de maille peu différent- A series of layers of semiconductor compounds forming an adaptation superlattice (3) deposited on the silicon layer (2) and whose layers closest to the silicon layer (2) have a first parameter of little different mesh
1 de celui de la couche de silicium (2) et dont les couches les plus éloignées ont un deuxième paramètre de maille ;1 of that of the silicon layer (2) and whose most distant layers have a second lattice parameter;
- un composant en matériau semiconducteur (C) dont au moins la couche la plus proche du super-réseau (3) à un paramè¬ tre de maille peu différent de celui du deuxième paramètre de i5 maille .- a component of semiconductor material (C) including at least the layer closest to the superlattice (3) with a mesh parameter little different from that of the second parameter of i5 mesh.
2. Dispositif selon la revendication 1, caractérisé en ce que le substrat (1) en diamant est dopé avec du bore .2. Device according to claim 1, characterized in that the diamond substrate (1) is doped with boron.
3. Dispositif en matériaux semiconducteurs, caractérisé en ce qu'il compo^te : 0 - un substrat (1) en nitrure de bore cubique transparent3. Device made of semiconductor materials, characterized in that it comprises: 0 - a substrate (1) made of transparent cubic boron nitride
(T-C BN) ;(T-C BN);
- au moins une couche de silicium amorphe (2) déposée sur une face du substrat ;- at least one layer of amorphous silicon (2) deposited on one face of the substrate;
-une série de couches de composés semiconducteurs for- 5 mant un super-réseau (3) d'adaptation déposées sur la couche de silicium amorphe (2) et dont les couches les plus proches de la couche de silicium amorphe (2) ont un premier paramètre de maille adapté à celui de la couche de silicium amorphe (2) et dont les couches les plus éloignées ont un deuxième paramètre 0 de maille ;a series of layers of semiconductor compounds forming an adaptation superlattice (3) deposited on the layer of amorphous silicon (2) and whose layers closest to the layer of amorphous silicon (2) have a first lattice parameter adapted to that of the amorphous silicon layer (2) and the most distant layers of which have a second lattice parameter 0;
- un composant en matériau semiconducteur (C) dont au moins la couche la plus proche du super-réseau (3) à un paramè¬ tre de maille adapté à celui du deuxième paramètre de maille . 4. Dispositif selon l'une des revendications 1 ou 3, dans lequel le super-réseau (3) comporte une alternance de couches de types différents dont les compositions varient entre la cou¬ che de silicium amorphe (2) et le composant (C) de façon à réall- ser l'adaptation de mailles, caractérisé en ce que l'un des types de couches est en phosphore d'indium (InP) .- a component of semiconductor material (C) including at least the layer closest to the superlattice (3) with a lattice parameter adapted to that of the second lattice parameter. 4. Device according to one of claims 1 or 3, wherein the superlattice (3) comprises alternating layers of different types whose compositions vary between the layer of amorphous silicon (2) and the component (C ) so as to re-fit the mesh, characterized in that one of the types of layers is made of indium phosphorus (InP).
5. Dispositif selon l'une des revendication 1 ou 3, caracté¬ risé en ce que le composant (C) est une diode laser comportant sur le super-réseau (3) , une première couche de confinement (4) , une couche active (5) , une deuxième couche de confinement (6) , et une couche de contact (7) .5. Device according to one of claims 1 or 3, caracté¬ ized in that the component (C) is a laser diode comprising on the superlattice (3), a first confinement layer (4), an active layer (5), a second confinement layer (6), and a contact layer (7).
6. Dispositif selon la revendication 5, caractérisé en ce que la première couche de confinement (4) est en phosphure d'indium dopé n, la couche active est en matériau de composés III-V réalisant un puit quan tique, la deuxième couche de confine¬ ment (5) est en phosphure d'indium dopé p.6. Device according to claim 5, characterized in that the first confinement layer (4) is made of n-doped indium phosphide, the active layer is made of material of III-V compounds producing a quantum well, the second layer of confinement (5) is made of p-doped indium phosphide.
7. Dispositif selon la revendication 5, caractérisé en ce que la couche active (5) est une succession de couches monoato¬ miques d'arséniure d'indium (InAs) et d'antimoniure d'indium (InSb) . Dispositif selon la revendication 5, caractérisé en ce que la couche active (5) est un super-réseau d'arséniure d'indiumCInAs) et d'antimoniure de Gallium (GaSb) .7. Device according to claim 5, characterized in that the active layer (5) is a succession of monoato¬ mic layers of indium arsenide (InAs) and indium antimonide (InSb). Device according to claim 5, characterized in that the active layer (5) is a super-network of indiumCInAs) and Gallium antimonide (GaSb) arsenide.
9. Dispositif selon la revendication 5, caractérisé en ce que la couche active 5 est un super-réseau d'arséniure d'indium9. Device according to claim 5, characterized in that the active layer 5 is a super-network of indium arsenide
(InAs) et d'antimoniure d'indium (InSb) .(InAs) and indium antimonide (InSb).
10. Laser appliquant l'une quelconque des revendications précédentes, caractérisé en ce qu'il comporte entre la couche active (5) et la deuxième couche de confinement (6) une couche de guidage (8) réalisée sous forme d'un réseau distribué et que plusieurs bandes d'émission laser (9) parallèles entre elles sont réalisées dans la couche active (5) et la couche de guidage (8) , la direction de ces bandes étant perpendiculaires à la direc¬ tion des gravures du réseau. 11. Laser selon la revendication 10, caractérisé en ce qu'il comporte à une extrémité du laser, un plan réfléchissant incliné par rapport au plan d'émission du laser.10. Laser applying any one of the preceding claims, characterized in that it comprises between the active layer (5) and the second confinement layer (6) a guide layer (8) produced in the form of a distributed network and that several laser emission bands (9) parallel to each other are produced in the active layer (5) and the guide layer (8), the direction of these bands being perpendicular to the direction of the etchings of the network. 11. Laser according to claim 10, characterized in that it comprises at one end of the laser, a reflecting plane inclined relative to the emission plane of the laser.
12. Procédé de réalisation d'un dispositif selon l'une quel- 5 conques des revendications précédentes caractérisé en ce qu'il comporte les étapes suivantes :12. Method for producing a device according to any one of the preceding claims, characterized in that it comprises the following steps:
- une première étape de réalisation par épitaxie à basse température d'une couche de silicium amorphe (2) sur le substrat ;- a first step of producing by epitaxy at low temperature a layer of amorphous silicon (2) on the substrate;
10 - une deuxième étape de chauffage facilitant la distribu¬ tion des nucléations ;10 - a second heating step facilitating the distribution of nucleations;
- une troisième étape de réalisation par épitaxie d'une couche d'adaptation (3) sur la couche de silicium amorphe (2) ;- a third stage of production by epitaxy of an adaptation layer (3) on the amorphous silicon layer (2);
- une quatrième étape de réalisation par épitaxie d'un 15 composant en matériau semiconducteur (C) .- A fourth stage in the production by epitaxy of a component of semiconductor material (C).
13. Procédé de réalisation selon la revendication YZ, carac¬ térisé en ce que les épitaxies sont des épitaxies de couches monoatomiques .13. Production method according to claim YZ, charac¬ terized in that the epitaxies are epitaxies of monoatomic layers.
14. Procédé de réalisation selon la revendication 12, carac- 20 térisé en ce que la quatrième étape de réalisation comporte les14. Production method according to claim 12, characterized in that the fourth production step comprises the
\ phases suivantes :\ following phases:
- une première phase de réalisation de la première couche de confinement (4) dopé n ;- a first phase of making the first n-doped confinement layer (4);
- une deuxième phase de réalisation de la couche active 25 (5) ;- a second phase of production of the active layer 25 (5);
- une troisième phase de réalisation d'une couche de guidage (8) ;- a third phase of producing a guide layer (8);
- une quatrième phase de gravure d'un réseau distribué dans la couche de guidage (8) ;- a fourth etching phase of a network distributed in the guide layer (8);
30 - une cinquième phase de réalisation de la deuxième cou¬ che de confinement (G) ;30 - a fifth phase of production of the second confinement layer (G);
- une sixième phase de réalisation d'une couche de con¬ tact (7) ;- A sixth phase of producing a contact layer (7);
- une septième phase de réalisation de contacts métalli- 35 ques . 15. Procédé de réalisation selon la revendication 14, carac¬ térisé en ce qu'il comporte, entre la quatrième phase et la cin¬ quième phase, un phase de gravure de rubans déterminant cha¬ cun un laser. 16. Procédé de réalisation selon la revendication 14, carac¬ térisé en ce qu'il comporte une huitième phase de réalisation par gravure d'un plan réfléchissant (10) incliné situé à une extrémité d'émission du laser et incliné par rapport au plan d'émission du laser. 17. Procédé de réalisation selon la revendication 12, carac¬ térisé en ce que la troisième étape de réalisation de la couche d'adaptation (3) comporte la réalisation d'une succession de cou¬ ches de composés de semiconducteurs formant un super réseau d'adaptation . 18. Procédé de réalisation selon la revendication 12, carac¬ térisé en ce qu'il comporte, entre la troisième et la quatrième étape, une étape supplémentaire de recuit. - a seventh phase of making metallic contacts. 15. The production method according to claim 14, charac¬ terized in that it comprises, between the fourth phase and the fifth phase, an etching phase of ribbons determining each laser. 16. Production method according to claim 14, charac¬ terized in that it comprises an eighth phase of production by etching of a reflective plane (10) inclined located at an emission end of the laser and inclined relative to the plane laser emission. 17. Production method according to claim 12, charac¬ terized in that the third stage of production of the adaptation layer (3) comprises the production of a succession of layers of semiconductor compounds forming a superlattice d adaptation. 18. The production method according to claim 12, charac¬ terized in that it comprises, between the third and the fourth step, an additional annealing step.
EP88904979A 1987-06-02 1988-05-27 Composite structure, application to a laser and process for producing same Withdrawn EP0316414A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8707709A FR2616272B1 (en) 1987-06-02 1987-06-02 SEMICONDUCTOR MATERIAL DEVICE MADE ON A DIFFERENT MESH PARAMETER SUBSTRATE, APPLICATION TO A LASER AND METHOD FOR PRODUCING THE SAME
FR8707709 1987-06-02

Publications (1)

Publication Number Publication Date
EP0316414A1 true EP0316414A1 (en) 1989-05-24

Family

ID=9351670

Family Applications (1)

Application Number Title Priority Date Filing Date
EP88904979A Withdrawn EP0316414A1 (en) 1987-06-02 1988-05-27 Composite structure, application to a laser and process for producing same

Country Status (5)

Country Link
US (1) US5012476A (en)
EP (1) EP0316414A1 (en)
JP (1) JPH01503583A (en)
FR (1) FR2616272B1 (en)
WO (1) WO1988010007A1 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5373171A (en) * 1987-03-12 1994-12-13 Sumitomo Electric Industries, Ltd. Thin film single crystal substrate
JP2664056B2 (en) * 1987-08-10 1997-10-15 住友電気工業株式会社 Thin film single crystal substrate
EP0420188A1 (en) * 1989-09-27 1991-04-03 Sumitomo Electric Industries, Ltd. Semiconductor heterojunction structure
US5371382A (en) * 1992-04-27 1994-12-06 Kobe Steel Usa, Inc. Amorphous silicon rectifying contact on diamond and method for making same
DE4310571A1 (en) * 1993-03-26 1994-09-29 Daimler Benz Ag Light-emitting diode
DE4310569A1 (en) * 1993-03-26 1994-09-29 Daimler Benz Ag Laser diode
US5665977A (en) * 1994-02-16 1997-09-09 Sony Corporation Semiconductor light emitting device with defect decomposing and blocking layers
DE4415600A1 (en) * 1994-05-04 1995-11-30 Daimler Benz Ag Electronic component with a semiconductor composite structure
FR2724769B1 (en) * 1994-09-16 1996-12-06 Thomson Csf METHOD FOR PRODUCING LASER DIODES WITH SURFACE EMISSION
FR2784185B1 (en) 1998-10-06 2001-02-02 Thomson Csf DEVICE FOR THE HARMONIZATION BETWEEN A LASER EMISSION CHANNEL AND A PASSIVE OBSERVATION CHANNEL
DE10234704A1 (en) * 2002-07-30 2004-02-19 Osram Opto Semiconductors Gmbh Semiconductor device comprises a semiconductor component, especially power laser diode billet, arranged on cooling element containing channel for introducing coolant and microstructures for effective heat transfer to the coolant

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4218270A (en) * 1976-11-22 1980-08-19 Mitsubishi Monsanto Chemical Company Method of fabricating electroluminescent element utilizing multi-stage epitaxial deposition and substrate removal techniques
JPS5837713B2 (en) * 1978-12-01 1983-08-18 富士通株式会社 Manufacturing method of semiconductor laser device
EP0040552A1 (en) * 1980-05-20 1981-11-25 De Beers Industrial Diamond Division (Proprietary) Limited Heat sinks
US4639275A (en) * 1982-04-22 1987-01-27 The Board Of Trustees Of The University Of Illinois Forming disordered layer by controlled diffusion in heterojunction III-V semiconductor
JPH06105779B2 (en) * 1983-02-28 1994-12-21 双葉電子工業株式会社 Semiconductor device and manufacturing method thereof
US4727555A (en) * 1983-09-02 1988-02-23 Xerox Corporation Wavelength tuned quantum well lasers
JPS6255985A (en) * 1985-09-05 1987-03-11 Nec Corp Semiconductor light emitting element
JPH0732280B2 (en) * 1985-09-26 1995-04-10 三菱電機株式会社 Semiconductor laser device
EP0221531A3 (en) * 1985-11-06 1992-02-19 Kanegafuchi Kagaku Kogyo Kabushiki Kaisha High heat conductive insulated substrate and method of manufacturing the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO8810007A1 *

Also Published As

Publication number Publication date
FR2616272B1 (en) 1990-10-26
FR2616272A1 (en) 1988-12-09
JPH01503583A (en) 1989-11-30
US5012476A (en) 1991-04-30
WO1988010007A1 (en) 1988-12-15

Similar Documents

Publication Publication Date Title
JP3425185B2 (en) Semiconductor element
EP1354338B1 (en) Quantum dot devices
US4639275A (en) Forming disordered layer by controlled diffusion in heterojunction III-V semiconductor
Pan et al. Recent progress in epitaxial growth of III–V quantum-dot lasers on silicon substrate
US20080187018A1 (en) Distributed feedback lasers formed via aspect ratio trapping
EP0545808B1 (en) Optoelectronic device with very low series resistance
JPH0644665B2 (en) Vertical cavity semiconductor laser device
Liao et al. Monolithically integrated electrically pumped continuous-wave III-V quantum dot light sources on silicon
JPH08316573A (en) Shortwave longitudinal cavity surface radiation laser and its manufacture
US6697412B2 (en) Long wavelength laser diodes on metamorphic buffer modified gallium arsenide wafers
EP0316414A1 (en) Composite structure, application to a laser and process for producing same
Su et al. Elimination of bimodal size in InAs/GaAs quantum dots for preparation of 1.3-μm quantum dot lasers
EP0232662B1 (en) Monolithic semiconductor structure consisting of a laser and a field effect transistor, and manufacturing process thereof
US6858519B2 (en) Atomic hydrogen as a surfactant in production of highly strained InGaAs, InGaAsN, InGaAsNSb, and/or GaAsNSb quantum wells
CA2129602C (en) Nanosecond fast electrically tunable fabry-perot filter
Wu et al. III–V quantum dot lasers epitaxially grown on Si substrates
KR101320836B1 (en) Ⅲ/ⅴ semiconductor
US5976903A (en) Method for manufacturing tunable laser
EP0664588A1 (en) Semiconductor structure with virtual diffraction lattice
EP1190452A1 (en) InGaAsN/GaAs QUANTUM WELL DEVICES
Veuhoff Potential of MOMBE/CBE for the production of photonic devices in comparison with MOVPE
FR2649537A1 (en) Integrated optoelectronic device including a light-emitting diode
You et al. 2.3 µm InGaAsSb/AlGaAsSb Quantum‐Well Laser Diode via InAs/GaSb Superlattice Layer on GaAs Substrate
Tsang et al. 1.5 μm wavelength InGaAs/InGaAsP distributed feedback multi‐quantum‐well lasers grown by chemical beam epitaxy
US6275515B1 (en) Semiconductor laser device and method of producing the same

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 19890107

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): DE FR GB IT NL

17Q First examination report despatched

Effective date: 19910325

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 19910806