EP0273921A1 - Accumulating recursive computation - Google Patents
Accumulating recursive computationInfo
- Publication number
- EP0273921A1 EP0273921A1 EP19870902646 EP87902646A EP0273921A1 EP 0273921 A1 EP0273921 A1 EP 0273921A1 EP 19870902646 EP19870902646 EP 19870902646 EP 87902646 A EP87902646 A EP 87902646A EP 0273921 A1 EP0273921 A1 EP 0273921A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- processor
- value
- common
- sum
- product
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
- G06F7/552—Powers or roots, e.g. Pythagorean sums
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/552—Indexing scheme relating to groups G06F7/552 - G06F7/5525
- G06F2207/5523—Calculates a power, e.g. the square, of a number or a function, e.g. polynomials
Definitions
- Frequency analysis of a waveform is a basic technique in signal processing since certain information carried by a signal can be very di fficult or impossible to extract otherwise than in the frequency domain.
- the range of applications of frequency analysis is very wide, and includes, for exampl e, sonar, radar and image processing.
- the Di screte Fourier Transform is used to compute the frequency domain matrix [X k ] from the time domain series [x n ] according to the equation for an N-point DFT:
- x n is the value of the n th (complex) waveform sample and X k is the amplitude of the k th frequency component.
- the expression (1) and hence also the present invention, is not limited to applications in frequency analysis, but the primary use of the expression is to perform a DFT.
- the DFT may be calculated by various methods, but digital techniques are preferable where hi gh precision is requi red.
- the necessary hardware is simplified greatly if the DFT is calculated by a recursive prime radix transform, as described by T.E. Curtis and J.E.Wickenden in I .E.E. Proceedings Vol .130, Part F, No.5, pages 424-425. Equation (1) may be written in the recursi ve form:
- N which is the transform length
- N which is the transform length
- the transform wi ll be calculated for all k between 0 and N-1.
- An object of this invention is to remove the condition that N be relatively prime to k.
- a processor for computing a value X k from a series of input data x o ..x n ..x N-1 for selected values of k in the range 0 ⁇ k ⁇ N
- Q is any non-zero integer containing no prime factors common to N that are not common to all values of k
- the processor being arranged to calculate and store sequential current values, each current value being the sum o a product component and a sum component, the sum component being he sum of a group of selected data, the number in each group, whi may be one, being derived by multiplying together those prime factors of N which are common to k, and the product component being the product of W Q and the preceding current value, the arrangement being such that a value of X k is obtained for any non-zero Integral value of N.
- the processor may include a kernel arranged to calculate the current values, an accumulator arranged to operate concurrently with the kernel to sum Input data, and a selector adapted to select data to be loaded into the kernel from raw input data and summed data from the accumulator.
- a processor is arranged to compute a value X k from a series of input data x o ..x n ..x N _ 1 for selected values of k in the range 0 ⁇ k ⁇ N
- a processor is arranged to compute a value X k from a series of input data x o ..x n ..x N-1 for selected values of k in the range 0 ⁇ k ⁇ N where
- FIG. 3 is a block diagram of the elements of the processor.
- the powers of W have been written modulo N i.e. as the remainder after dividing by N.
- the rate at which the power of W increases down the W column matrix is equal to Q.
- N is not prime and consequently powers of W occur more than once in rows of the W matrix, so it cannot be re-expressed directly in the simple recursive form of Figures 1c-e.
- Figure 3 shows the computing structure. This could be in software or analogue or digital hardware but for convenience of description it will be treated as digital hardware.
- the kernel constitutes the means for computing the terms W Q X and the final expressions for X k .
- the kernel and accumulator operate concurrently.
- the input data x n are time samples of some signal which is to be analysed in the frequency domain, for example Doppler signals from a radar or vibration from an engine.
- the corresponding frequency components X n are normally computed for all of 0 k N although a subset only may be required in certain applications.
- N and k are chosen by the user according to the application in hand.
- Q is also chosen by the user. Its value is always modulo N, and must not be zero or contain any prime factors common to N that are not also common to each and every value taken by k. (Illegal values of Q do not allow a solution to the recursive form equation (2), since the powers of W required in the direct form, equation (1), cannot be generated).
- the accumulator 1 operates to Load, Sum or Hold.
- the Load operation is used when it is necessary to reinitialise the accumulator, i.e. at the start of each X k computation sequence.
- the current input value x n at A is loaded and held.
- 'Sum' adds the next x n to the stored value.
- 'Hold' simply holds the current stored value, with no loading.
- the data x n are input under the control of some control means (not shown) in the order required for the values of N, k and Q in use.
- the selector 2 operates to select Zero, Accumulate or Raw for the input to the kernel 3. If Accumulate is selected the total from the accumulator 1 is fed into the kernel. If Raw is selected, the Raw input value x n is read off path 4, which is a bypass around the accumulator.
- the facility for selecting Raw data enables parallel processing to take place, as will be described below.
- the kernel 3 also requires reinitialising before the start of each X n computation sequence, and this is achieved by a 'Load' operation. Otherwise, the kernel Computes i.e. multiplies the value it holds (which will initially be zero) by W Q and adds the value selected by the Selector. The sum thus formed provides the new stored value.
- the accumulator is reinitialised (to zero) then loads the first input value, x 5 .
- the accumulator adds the next input x 3 to the stored value x 5 and so on as shown.
- Steps 13 to 18 the accumulator continues to load and sum the Input data x n , but now the selector selects Raw, that is the data loaded Into the kernel is the raw data x n from the bypass path 4.
- This accumulation is completed at Step 18, as the computation of X 1 is completed by the kernel.
- the accumulator 'Holds' its value until Step 19 when it is loaded Into the reinitialised kernel and can be output directly at D as X Q .
- This parallel computation of X 0 and X 1 Increases the speed of computation.
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8611124 | 1986-05-07 | ||
GB868611124A GB8611124D0 (en) | 1986-05-07 | 1986-05-07 | Accumulating recursive computation |
Publications (1)
Publication Number | Publication Date |
---|---|
EP0273921A1 true EP0273921A1 (en) | 1988-07-13 |
Family
ID=10597457
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP19870902646 Withdrawn EP0273921A1 (en) | 1986-05-07 | 1987-05-06 | Accumulating recursive computation |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0273921A1 (ja) |
JP (1) | JPH01500779A (ja) |
GB (2) | GB8611124D0 (ja) |
WO (1) | WO1987007053A1 (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5548685A (en) * | 1994-01-03 | 1996-08-20 | Motorola, Inc. | Artificial neuron using adder circuit and method of using same |
GB2276960B (en) * | 1993-04-08 | 1997-06-25 | Marconi Gec Ltd | Processor and method for dft computation |
US5390136A (en) * | 1993-06-14 | 1995-02-14 | Motorola, Inc. | Artificial neuron and method of using same |
US5517667A (en) * | 1993-06-14 | 1996-05-14 | Motorola, Inc. | Neural network that does not require repetitive training |
US5553012A (en) * | 1995-03-10 | 1996-09-03 | Motorola, Inc. | Exponentiation circuit utilizing shift means and method of using same |
US5685008A (en) * | 1995-03-13 | 1997-11-04 | Motorola, Inc. | Computer Processor utilizing logarithmic conversion and method of use thereof |
US5644520A (en) * | 1995-05-31 | 1997-07-01 | Pan; Shao Wei | Accumulator circuit and method of use thereof |
US5771391A (en) * | 1995-08-28 | 1998-06-23 | Motorola Inc. | Computer processor having a pipelined architecture and method of using same |
US6054710A (en) * | 1997-12-18 | 2000-04-25 | Cypress Semiconductor Corp. | Method and apparatus for obtaining two- or three-dimensional information from scanning electron microscopy |
-
1986
- 1986-05-07 GB GB868611124A patent/GB8611124D0/en active Pending
-
1987
- 1987-05-06 WO PCT/GB1987/000297 patent/WO1987007053A1/en not_active Application Discontinuation
- 1987-05-06 JP JP50286487A patent/JPH01500779A/ja active Pending
- 1987-05-06 EP EP19870902646 patent/EP0273921A1/en not_active Withdrawn
- 1987-05-06 GB GB08710679A patent/GB2191316A/en not_active Withdrawn
Non-Patent Citations (1)
Title |
---|
See references of WO8707053A1 * |
Also Published As
Publication number | Publication date |
---|---|
GB2191316A (en) | 1987-12-09 |
GB8710679D0 (en) | 1987-06-10 |
WO1987007053A1 (en) | 1987-11-19 |
JPH01500779A (ja) | 1989-03-16 |
GB8611124D0 (en) | 1986-06-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 19880121 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): DE FR IT NL |
|
RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: GEC-MARCONI LIMITED |
|
17Q | First examination report despatched |
Effective date: 19900314 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 19900725 |
|
RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: SPREADBURY, DAVID, JOHN Inventor name: CURTIS, THOMAS, EDGAR |