EP0197846A1 - Farbvideosignalsteuerschaltung für ein hochauflösendes Anzeigesystem und diese Schaltung umfassendes Anzeigesystem - Google Patents

Farbvideosignalsteuerschaltung für ein hochauflösendes Anzeigesystem und diese Schaltung umfassendes Anzeigesystem Download PDF

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Publication number
EP0197846A1
EP0197846A1 EP86400664A EP86400664A EP0197846A1 EP 0197846 A1 EP0197846 A1 EP 0197846A1 EP 86400664 A EP86400664 A EP 86400664A EP 86400664 A EP86400664 A EP 86400664A EP 0197846 A1 EP0197846 A1 EP 0197846A1
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EP
European Patent Office
Prior art keywords
flashing
memory
color
control circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP86400664A
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English (en)
French (fr)
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EP0197846B1 (de
Inventor
Philippe Ligocki
Dominique Caignault
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Cimsa Sintra SA
Thomson CSF SA
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Application filed by Cimsa Sintra SA, Thomson CSF SA filed Critical Cimsa Sintra SA
Publication of EP0197846A1 publication Critical patent/EP0197846A1/de
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G09G5/06—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using colour palettes, e.g. look-up tables

Definitions

  • the invention relates to high resolution graphic display machines used to display images produced in digital form by a computer, on one or more color screens.
  • This type of machine conventionally has a computer coupled to a memory called “image memory” by graphic hardware and software resources: input-output processor, graphics processor, vector and character generator, surfacing processor, etc ...
  • image memory a memory
  • input-output processor graphics processor
  • graphics processor vector and character generator
  • surfacing processor etc ...
  • the image is decomposed into points or "pixels" and each point is characterized by an aspect word recorded, after processing, in the image memory.
  • This word of appearance defines in numerical form the color of the point and possibly if it blinks.
  • the image can consist of 1024 lines of each 2048 points and be projected onto the screen of a cathode-ray tube by means of a television-type scan, at the frequency of 50 images per second.
  • the terminal is equipped with an image memory making it possible to memorize the aspect word of each point, this memory being read in synchronism with the scanning.
  • the image memory in which a point is defined by an aspect word is coupled to a work station comprising a color screen by a circuit controlling color video signals.
  • the aspect word extracted from the image memory is directly decoded by a digital-analog decoding circuit, to produce analog signals feeding the projection device, that is to say generally say three primary analog signals, R, G, B, respectively controlling the red, green and blue beams of a trichrome cathode ray tube.
  • the terminal station can be constructed so that three of these bits encode the amplitude of the signal R, three encode the amplitude of the signal V, and two the amplitude of the signal B.
  • These eight bits of the aspect word in image memory provide a "palette" of 2 ° colors. In such a simple design, the pallet is determined once and for all by construction.
  • a known improvement consists in adding a random access memory known as table memory.
  • table memory instead of the aspect word supplied by the image memory, it is a color word read in table memory which feeds the analog digital decoding circuit producing the primary signals for each pixel, the reading address. of the table memory being given by the aspect word supplied by the image memory.
  • a bit allocated to the flashing is conventionally provided in the format of the aspect word which indicates for each point whether it is flashing or not.
  • a flip-flop providing a flashing signal alternating between 0 and 1 at the rate desired for the flashing, and the flashing bit of the aspect word controls the transmission of this signal.
  • the flashing signal thus present for the only points which should flash is used to cut out the primary signals applied to the projection device, the flashing thus being between the color given by the aspect word extracted from the table and the black.
  • a useful improvement consists in allowing the user to assign to each color which should be able to flash a flashing color of his choice.
  • the capacity of the color table is doubled, or the number of colors available in a palette is divided by two, and, for any point that needs to flash, that is to say each time the flash bit is set 1, the flashing signal is applied to an address bit, the most significant one, for example from the table memory, this bit remaining at zero for the non-flashing points.
  • the flashing points permanently for the non-flashing points and during the alternation 0 of the flashing signal, for the flashing points, it is the first half of the table memory which is used and which attributes to the points their "normal" color.
  • the second half of the table memory is addressed, and in this second half the flashing colors are loaded. With each normal color of the palette, the user can thus associate the flashing color of his choice.
  • the subject of the invention is a circuit for controlling color video signals in which the flashing can be controlled with several rates, without there being any provision in the format of the aspect word for bits particularly affected by the flashing, this circuit allowing also to have, for each color capable of flashing, several flashing colors without the capacity of the table memory being increased, and without affecting the speed of its reading.
  • the invention also relates to a high resolution display system comprising such a circuit.
  • the high resolution display system into which the color video controller circuit according to the invention is inserted creates, using a computer, images described in digital form.
  • each of the points of the image is characterized by an aspect word stored in image memory.
  • This aspect word consists of several bits, for example 8 bits.
  • the image memory comprises eight planes, each storing a bit of the aspect word characteristic of each of the points of the image.
  • This image memory 1 in FIG. 1 is controlled via a bus called a processing unit bus, bus UT 10, and the data necessary for writing it are transmitted to it via a data bus. , called “block bus”, 100, the data being able to be transmitted in a writing mode called “by blocks” by blocks corresponding on the image to squares of 8 ⁇ 8 pixels.
  • the color video signal controller circuit includes a memory known as table memory 2, made up in practice of three transcoding tables 21, 22, 23 respectively assigned to the three primary colors red, green and blue, and whose read address is given. by the aspect word corresponding to the point read in the image memory.
  • table memory 2 makes up in practice of three transcoding tables 21, 22, 23 respectively assigned to the three primary colors red, green and blue, and whose read address is given. by the aspect word corresponding to the point read in the image memory.
  • the memory of transcoding tables 2 comprises 2 "addresses, and each transcoding table assigned to a primary color provides a primary color in digital form.
  • digital-analog converters 31, 32, 33 respectively assigned to the decoding of the video signals of color R, G and B.
  • Each primary color can be coded on 8 bits which leaves the possibility of choosing a color among 2 "colors, but these colors obviously cannot be all available simultaneously for an image because the table 2 does not contains only 28 boxes
  • These digital-analog converters 31, 32, 33 respectively control the red, green and blue beams of a trichrome cathode-ray tube forming the color screen 4.
  • the reading address of the table memory is given by the aspect word supplied by the image memory read in synchronism with the color scanning, and, at a given address, it is a given word of color, read in the memory of tables which feeds the digital-analog decoders producing the primary signals.
  • the color video controller circuit further comprises a set of buffer memories.
  • tables, 5, consisting of several buffers of color tables, for example 4: 51, 52, 53, 54.
  • Each buffer of tables is a random access memory having the same capacity as the memory of tables, but not requiring the speed of it. These memories are not expensive, and it is possible to provide as many as necessary;
  • These table buffers are loaded via an interface circuit, 6, which receives the color data to be loaded into the table buffers of the processing unit bus 10. The content of these table buffers can be changed on demand.
  • the information corresponding to the different possible color palettes is transferred, during the frame scan returns, to the table memory 2, on command by a control circuit 7.
  • the transfers are controlled by according to the needs and in particular in the event of blinking of certain sets of points of the image.
  • the control circuit 7 receives the flashing signal or signals indicating the flashing alternations, and controls as a function of these signals the loading of the content of a table buffer memory into the table memory 2.
  • the table buffer memory 51, 52, 53 or 54 transferred to the table memory is determined by the state of the flashing signals.
  • FIG. 1 shows four table buffers which are associated with two flashing signals of different periods represented in FIG.
  • the non-flashing color palette is only reduced by the number of addresses in memory of tables assigned to flashing. This reduction of the palette is most often negligible because the blinking is generally used to draw attention following a specific event, on an element of the image of limited size. Such elements never contain a large number of colors.
  • the set of memories 5 comprises a set of buffers in reserve, for example a second set of four table buffers.
  • the data relating to the table buffer memories are written in these memories in the following manner: the interface circuit 6 supplied by the link 55 the number of the table buffer memory in which the data is to be written, and supplies by an address bus and a data bus respectively the address ADE and the corresponding data ED to the designated table buffer memory.
  • the control circuit supplies at 55 the number of the table buffer to be transferred into the memory of transcoding tables, as a function of the flashing clock signals HC, and HC z , and only during the sweep returns defined by the frame synchronization signal SY.T also applied to the control circuit 7.
  • the control circuit supplies, to the corresponding table buffer memory, 51, 52, 53 or 54, the read address ADL, and the data to be read corresponding, LD, is transmitted from the output of the designated table buffer memory to the data input ED of the table memory 2, for writing to the address ADE also designated by the control circuit 7.
  • the flashing signals which can be produced by counters, have a fixed number of image scanning periods for each alternating flashing.
  • Figure 2 shows an example of two flashing signals described above, one having a period of 6 seconds with an alternation of 4 seconds and an alternation of 2 seconds, the other having a period of 2 seconds with alternations 1 second.
  • These two signals determine four possible states denoted 1, 2, 3 and 4 and to each of these states corresponds a buffer of color tables 51, 52, 53, or 54 taken from the set of memories 5 and transferred into the memory. tables 2 each time a new state is detected.
  • these tables stored in buffers 51 to 54 are determined as a function of the colors of the non-flashing dots and of the flashing colors. These buffers can be loaded during active scanning periods.
  • the image memory 1 could comprise eight planes and provide an eight-bit aspect word.
  • This provision which is not directly linked to the invention can obviously be modified; in particular, to allow animation effects, the image memory can comprise two groups of planes used alternately, one being used for displaying the image while, in the other, loading the image next.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
EP19860400664 1985-04-01 1986-03-27 Farbvideosignalsteuerschaltung für ein hochauflösendes Anzeigesystem und diese Schaltung umfassendes Anzeigesystem Expired - Lifetime EP0197846B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8504933A FR2579789B1 (fr) 1985-04-01 1985-04-01 Circuit controleur de signaux video de co uleur pour systeme de visualisation haute resolution et systeme de visualisation comportant un tel circuit
FR8504933 1985-04-01

Publications (2)

Publication Number Publication Date
EP0197846A1 true EP0197846A1 (de) 1986-10-15
EP0197846B1 EP0197846B1 (de) 1990-02-21

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EP19860400664 Expired - Lifetime EP0197846B1 (de) 1985-04-01 1986-03-27 Farbvideosignalsteuerschaltung für ein hochauflösendes Anzeigesystem und diese Schaltung umfassendes Anzeigesystem

Country Status (3)

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EP (1) EP0197846B1 (de)
DE (1) DE3669084D1 (de)
FR (1) FR2579789B1 (de)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2195519A (en) * 1986-09-12 1988-04-07 Apple Computer Enhanced video graphics controller
EP0266506A2 (de) * 1986-10-31 1988-05-11 International Business Machines Corporation Bildanzeigeverarbeitungseinheit für ein graphisches Endgerät
WO1989001218A1 (en) * 1987-07-24 1989-02-09 Apollo Computer, Inc. Display controller utilizing attribute bits
EP0354480A2 (de) * 1988-08-09 1990-02-14 Seiko Epson Corporation Anzeigesignalgenerator
EP0537881A2 (de) * 1991-10-16 1993-04-21 Pioneer Video Corporation Graphischer Dekodierer
EP0855693A1 (de) * 1997-01-24 1998-07-29 Digital Equipment Corporation System und Verfahren zur Darstellung blinkender Objekte auf einer Anzeigevorrichtung
WO2001016930A1 (de) * 1999-09-01 2001-03-08 Siemens Aktiengesellschaft Verfahren und vorrichtung zur ansteuerung eines farbdisplays mit höchstens einem ansteuerelement pro bildpunkt

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1983002509A1 (en) * 1982-01-18 1983-07-21 Honeywell Inc Method and apparatus for controlling the display of a computer generated raster graphic system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1983002509A1 (en) * 1982-01-18 1983-07-21 Honeywell Inc Method and apparatus for controlling the display of a computer generated raster graphic system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
IBM TECHNICAL DISCLOSURE BULLETIN, vol. 27, no. 1A, juin 1984, page 74, New York, US; D.A. KUMMER et al.: "Use of color palette system to provide blink video in a digital CRT display system" *

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2195519A (en) * 1986-09-12 1988-04-07 Apple Computer Enhanced video graphics controller
US4823120A (en) * 1986-09-12 1989-04-18 Apple Computer, Inc. Enhanced video graphics controller
GB2195519B (en) * 1986-09-12 1991-01-16 Apple Computer Enhanced video graphics controller
EP0266506A2 (de) * 1986-10-31 1988-05-11 International Business Machines Corporation Bildanzeigeverarbeitungseinheit für ein graphisches Endgerät
EP0266506A3 (en) * 1986-10-31 1990-10-24 International Business Machines Corporation Image display processor for graphics workstation
WO1989001218A1 (en) * 1987-07-24 1989-02-09 Apollo Computer, Inc. Display controller utilizing attribute bits
EP0354480A2 (de) * 1988-08-09 1990-02-14 Seiko Epson Corporation Anzeigesignalgenerator
EP0354480A3 (de) * 1988-08-09 1991-10-23 Seiko Epson Corporation Anzeigesignalgenerator
EP0537881A2 (de) * 1991-10-16 1993-04-21 Pioneer Video Corporation Graphischer Dekodierer
EP0537881A3 (en) * 1991-10-16 1995-02-01 Pioneer Video Corp Graphics decoder
EP0855693A1 (de) * 1997-01-24 1998-07-29 Digital Equipment Corporation System und Verfahren zur Darstellung blinkender Objekte auf einer Anzeigevorrichtung
WO2001016930A1 (de) * 1999-09-01 2001-03-08 Siemens Aktiengesellschaft Verfahren und vorrichtung zur ansteuerung eines farbdisplays mit höchstens einem ansteuerelement pro bildpunkt

Also Published As

Publication number Publication date
DE3669084D1 (de) 1990-03-29
FR2579789B1 (fr) 1987-05-15
FR2579789A1 (fr) 1986-10-03
EP0197846B1 (de) 1990-02-21

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