EP0182454A3 - Video system controller with a row address override circuit - Google Patents

Video system controller with a row address override circuit Download PDF

Info

Publication number
EP0182454A3
EP0182454A3 EP85305225A EP85305225A EP0182454A3 EP 0182454 A3 EP0182454 A3 EP 0182454A3 EP 85305225 A EP85305225 A EP 85305225A EP 85305225 A EP85305225 A EP 85305225A EP 0182454 A3 EP0182454 A3 EP 0182454A3
Authority
EP
European Patent Office
Prior art keywords
system controller
row address
video system
override circuit
address override
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP85305225A
Other versions
EP0182454A2 (en
EP0182454B1 (en
Inventor
Jeffrey C. Bond
Karl M. Guttag
Robert C. Thaden
Raymond Pinkham
Mark Novak
Mark W. Watts
Jerry Vanaken
John V. Moravec
Rudy J. Albachten, Iii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/633,367 external-priority patent/US4691289A/en
Priority claimed from US06/633,385 external-priority patent/US4656597A/en
Priority claimed from US06/633,384 external-priority patent/US4665495A/en
Priority claimed from US06/633,386 external-priority patent/US4656596A/en
Priority claimed from US06/633,389 external-priority patent/US4654804A/en
Priority claimed from US06/633,388 external-priority patent/US4660155A/en
Priority claimed from US06/633,383 external-priority patent/US4660156A/en
Priority to EP91121915A priority Critical patent/EP0481534B1/en
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Priority to EP91121918A priority patent/EP0482678B1/en
Publication of EP0182454A2 publication Critical patent/EP0182454A2/en
Publication of EP0182454A3 publication Critical patent/EP0182454A3/en
Publication of EP0182454B1 publication Critical patent/EP0182454B1/en
Application granted granted Critical
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/001—Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/005—Adapting incoming signals to the display format of the display terminal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363—Graphics controllers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/391—Resolution modifying circuits, e.g. variable screen formats
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • G09G5/397—Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/126—The frame memory having additional data ports, not inclusive of standard details of the output serial port of a VRAM
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/128—Frame memory using a Synchronous Dynamic RAM [SDRAM]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/18—Use of a frame buffer in a display terminal, inclusive of the display panel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/399—Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
EP85305225A 1984-07-23 1985-07-23 Video system controller with a row address override circuit Expired - Lifetime EP0182454B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP91121918A EP0482678B1 (en) 1984-07-23 1985-07-23 Video system
EP91121915A EP0481534B1 (en) 1984-07-23 1985-07-23 Video system

Applications Claiming Priority (16)

Application Number Priority Date Filing Date Title
US63338784A 1984-07-23 1984-07-23
US06/633,388 US4660155A (en) 1984-07-23 1984-07-23 Single chip video system with separate clocks for memory controller, CRT controller
US06/633,389 US4654804A (en) 1984-07-23 1984-07-23 Video system with XY addressing capabilities
US06/633,383 US4660156A (en) 1984-07-23 1984-07-23 Video system with single memory space for instruction, program data and display data
US633383 1984-07-23
US06/633,385 US4656597A (en) 1984-07-23 1984-07-23 Video system controller with a row address override circuit
US633386 1984-07-23
US06/633,386 US4656596A (en) 1984-07-23 1984-07-23 Video memory controller
US06/633,367 US4691289A (en) 1984-07-23 1984-07-23 State machine standard cell that supports both a Moore and a Mealy implementation
US633389 1984-07-23
US633367 1984-07-23
US633385 1984-07-23
US633388 1984-07-23
US06/633,384 US4665495A (en) 1984-07-23 1984-07-23 Single chip dram controller and CRT controller
US633387 1984-07-23
US633384 1984-07-23

Related Child Applications (4)

Application Number Title Priority Date Filing Date
EP91121918A Division EP0482678B1 (en) 1984-07-23 1985-07-23 Video system
EP91121915A Division EP0481534B1 (en) 1984-07-23 1985-07-23 Video system
EP91121915.2 Division-Into 1991-12-20
EP91121918.6 Division-Into 1991-12-20

Publications (3)

Publication Number Publication Date
EP0182454A2 EP0182454A2 (en) 1986-05-28
EP0182454A3 true EP0182454A3 (en) 1988-03-23
EP0182454B1 EP0182454B1 (en) 1994-02-02

Family

ID=27575495

Family Applications (3)

Application Number Title Priority Date Filing Date
EP91121915A Expired - Lifetime EP0481534B1 (en) 1984-07-23 1985-07-23 Video system
EP91121918A Expired - Lifetime EP0482678B1 (en) 1984-07-23 1985-07-23 Video system
EP85305225A Expired - Lifetime EP0182454B1 (en) 1984-07-23 1985-07-23 Video system controller with a row address override circuit

Family Applications Before (2)

Application Number Title Priority Date Filing Date
EP91121915A Expired - Lifetime EP0481534B1 (en) 1984-07-23 1985-07-23 Video system
EP91121918A Expired - Lifetime EP0482678B1 (en) 1984-07-23 1985-07-23 Video system

Country Status (3)

Country Link
EP (3) EP0481534B1 (en)
JP (2) JPH05281934A (en)
DE (3) DE3587744T2 (en)

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JPS63201791A (en) * 1987-02-12 1988-08-19 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Processing system
US4884069A (en) * 1987-03-19 1989-11-28 Apple Computer, Inc. Video apparatus employing VRAMs
EP0283565B1 (en) * 1987-03-20 1992-12-30 International Business Machines Corporation Computer system with video subsystem
US5001652A (en) * 1987-03-20 1991-03-19 International Business Machines Corporation Memory arbitration for video subsystems
JP2854867B2 (en) * 1987-09-14 1999-02-10 ジーディーイー システムズ インコーポレイテッド Image processing system and pixel data transfer method
US5113180A (en) * 1988-04-20 1992-05-12 International Business Machines Corporation Virtual display adapter
JP3068842B2 (en) * 1990-08-27 2000-07-24 任天堂株式会社 Direct memory access device in image processing device and external storage device used therefor
WO1997008676A1 (en) * 1995-08-28 1997-03-06 Cirrus Logic, Inc. Circuits and methods for controlling the refresh of a frame buffer comprising an off-screen area
EP0772119A3 (en) * 1995-10-31 1997-12-29 Cirrus Logic, Inc. Automatic graphics operation
EP0786756B1 (en) * 1996-01-23 2009-03-25 Hewlett-Packard Company, A Delaware Corporation Data transfer arbitration for display controller
US6678204B2 (en) * 2001-12-27 2004-01-13 Elpida Memory Inc. Semiconductor memory device with high-speed operation and methods of using and designing thereof
WO2010027983A1 (en) * 2008-09-03 2010-03-11 Marvell World Trade Ltd. Progamming data into a multi-plane flash memory
US8300056B2 (en) 2008-10-13 2012-10-30 Apple Inc. Seamless display migration
US8648868B2 (en) 2010-01-06 2014-02-11 Apple Inc. Color correction to facilitate switching between graphics-processing units
US8797334B2 (en) 2010-01-06 2014-08-05 Apple Inc. Facilitating efficient switching between graphics-processing units
US8368702B2 (en) 2010-01-06 2013-02-05 Apple Inc. Policy-based switching between graphics-processing units

Citations (6)

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Publication number Priority date Publication date Assignee Title
US4104624A (en) * 1975-12-29 1978-08-01 Hitachi, Ltd. Microprocessor controlled CRT display system
US4125873A (en) * 1977-06-29 1978-11-14 International Business Machines Corporation Display compressed image refresh system
US4286320A (en) * 1979-03-12 1981-08-25 Texas Instruments Incorporated Digital computing system having auto-incrementing memory
US4390780A (en) * 1980-11-10 1983-06-28 Burroughs Corporation LSI Timing circuit for a digital display employing a modulo eight counter
US4424372A (en) * 1982-09-20 1984-01-03 Timex Corporation 4-Substituted phenyl 4'-(5-N-alkyl-1,3-dioxan-2-yl) thiobenzoates
US4566005A (en) * 1983-03-07 1986-01-21 International Business Machines Corporation Data management for plasma display

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JPS5810135B2 (en) * 1973-03-20 1983-02-24 松下電器産業株式会社 High Gas Jiyou Kayoshiyoku Baitai
DE2922540C2 (en) * 1978-06-02 1985-10-24 Hitachi, Ltd., Tokio/Tokyo Data processing system
US4288706A (en) 1978-10-20 1981-09-08 Texas Instruments Incorporated Noise immunity in input buffer circuit for semiconductor memory
JPS5926031B2 (en) * 1979-03-28 1984-06-23 日本電信電話株式会社 memory element
JPS5614346A (en) * 1979-07-12 1981-02-12 Toshiba Corp Write and read system for frame memory unit
JPS5631154A (en) * 1979-08-23 1981-03-28 Victor Co Of Japan Ltd Memory device
FR2465281A1 (en) * 1979-09-12 1981-03-20 Telediffusion Fse DEVICE FOR DIGITAL TRANSMISSION AND DISPLAY OF GRAPHICS AND / OR CHARACTERS ON A SCREEN
US4347587A (en) * 1979-11-23 1982-08-31 Texas Instruments Incorporated Semiconductor integrated circuit memory device with both serial and random access arrays
JPS5678881A (en) * 1979-12-03 1981-06-29 Hitachi Ltd Graphic display device
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DE3138930C2 (en) * 1981-09-30 1985-11-07 Siemens AG, 1000 Berlin und 8000 München Data display device
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JPS58187996A (en) * 1982-04-28 1983-11-02 株式会社日立製作所 Display memory circuit
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US4562435A (en) * 1982-09-29 1985-12-31 Texas Instruments Incorporated Video display system using serial/parallel access memories
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US4639890A (en) 1983-12-30 1987-01-27 Texas Instruments Incorporated Video display system using memory with parallel and serial access employing selectable cascaded serial shift registers
US4688197A (en) * 1983-12-30 1987-08-18 Texas Instruments Incorporated Control of data access to memory for improved video system
JPH0210434A (en) * 1988-06-28 1990-01-16 Mitsubishi Electric Corp Program language translator
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Patent Citations (6)

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Publication number Priority date Publication date Assignee Title
US4104624A (en) * 1975-12-29 1978-08-01 Hitachi, Ltd. Microprocessor controlled CRT display system
US4125873A (en) * 1977-06-29 1978-11-14 International Business Machines Corporation Display compressed image refresh system
US4286320A (en) * 1979-03-12 1981-08-25 Texas Instruments Incorporated Digital computing system having auto-incrementing memory
US4390780A (en) * 1980-11-10 1983-06-28 Burroughs Corporation LSI Timing circuit for a digital display employing a modulo eight counter
US4424372A (en) * 1982-09-20 1984-01-03 Timex Corporation 4-Substituted phenyl 4'-(5-N-alkyl-1,3-dioxan-2-yl) thiobenzoates
US4566005A (en) * 1983-03-07 1986-01-21 International Business Machines Corporation Data management for plasma display

Also Published As

Publication number Publication date
EP0481534A3 (en) 1992-08-26
JPH05281934A (en) 1993-10-29
EP0481534A2 (en) 1992-04-22
DE3587744D1 (en) 1994-03-17
DE3587744T2 (en) 1994-05-19
DE3588174D1 (en) 1998-02-19
DE3588174T2 (en) 1998-06-10
EP0182454A2 (en) 1986-05-28
EP0481534B1 (en) 1998-01-14
EP0482678A3 (en) 1992-09-16
EP0482678B1 (en) 1998-01-14
EP0482678A2 (en) 1992-04-29
DE3588173D1 (en) 1998-02-19
EP0182454B1 (en) 1994-02-02
DE3588173T2 (en) 1998-06-10
JPH1091136A (en) 1998-04-10

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