EP0071918B1 - Phase commanded oscillator - Google Patents

Phase commanded oscillator Download PDF

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Publication number
EP0071918B1
EP0071918B1 EP19820106928 EP82106928A EP0071918B1 EP 0071918 B1 EP0071918 B1 EP 0071918B1 EP 19820106928 EP19820106928 EP 19820106928 EP 82106928 A EP82106928 A EP 82106928A EP 0071918 B1 EP0071918 B1 EP 0071918B1
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Prior art keywords
voltage
oscillator
integrator
loop
adder
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EP19820106928
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German (de)
French (fr)
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EP0071918A1 (en
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Uwe Dipl.-Ing. Lehmann
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Siemens AG
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Siemens AG
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/12—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a scanning signal

Definitions

  • the invention relates to a phase-controlled oscillator with a phase discriminator, a loop filter and a voltage-controlled oscillator (PLL loop) and with a capture device.
  • PLL loop voltage-controlled oscillator
  • Such an oscillator is known from DE-OS 2812377.
  • a Schmitt trigger is connected to the output of the loop filter, the output of which is connected via an ohmic negative feedback resistor to the connection point of the ohmic resistor and the capacitor of the loop filter.
  • the search oscillation can be reduced or closed automatically by the loop gain when the control loop is closed, or can be switched off by a signal which is obtained from the quadrature component by a second phase discriminator is used, as is the case, for example, with circuits in the book “Phaselock Techniques by FM Gardner is provided.
  • search oscillator circuits are also problematic, since two opposing requirements are placed on the circuit coupling.
  • search stroke must be so large that even with a voltage offset of the phase discriminator, the oscillator is wobbled perfectly over the desired range.
  • search stroke must be so small that when the control loop is closed, the wobble circuit changes the working point of the phase discriminator only slightly. Since the phase discriminator operating point in PLL circuits 1st and 2nd order even without wobble switching by temperature-dependent offset voltages of the phase discriminator, temperature-dependent frequency fluctuations of the oscillator or z. B. change in the input frequency is usually subject to large fluctuations, the dimensioning of the search oscillator circuits mentioned above is very critical.
  • the invention is based on the object of specifying a solution for a phase-controlled oscillator by means of which the above-mentioned difficulties are eliminated in a simple manner.
  • phase-controlled oscillator of the type described at the outset according to the invention in such a way that an integrator is provided, the output voltage of which is coupled into the PLL loop via a voltage summer connected between the loop filter and the voltage-controlled oscillator, and the two of which are controlled by control logic , alternately connectable feedback paths from a connection point in front of and behind the voltage summer via a voltage evaluator to its input, and that the voltage evaluators consist of digitally evaluating whether the voltage values have exceeded or fallen below predetermined values and storing the information until the following limit crossing.
  • the conventional PLL circuit consists of the phase discriminator 1, the loop filter 2 and the voltage-controlled oscillator (VCO) 3.
  • a voltage summer 4 is connected into the PLL loop between the loop filter 2 and the voltage-controlled oscillator 3, via which the output voltage of an integrator I (with a broken line) is coupled into the PLL loop.
  • the integrator I has two feedback paths, which can be connected via an electronic switch IV (with dashed lines) and lead to a connection point A in front of the voltage summer 4 and a connection point B behind the voltage summer 4.
  • a voltage evaluator II or 111 (outlined with dashed lines) is switched on in each of the two feedback paths.
  • the voltage evaluator II in the feedback path to the connection point A in front of the voltage summer 4 consists of a Schmitt trigger 5, which is fed back via a resistor R1 to a resistor R2 and whose output is connected to one connector (dashed switch position b) of the electronic switch IV .
  • the evaluation circuit III located in the feedback path from the connection point B behind the voltage summer 4 contains two comparators 6, 7, the second input of which, not connected to the PLL loop, is supplied with a reference voltage U 1 or U 2 .
  • the outputs of the comparators 6, 7 are connected to an RS flip-flop 8, the output Q of which is connected to one terminal (switch position a) of the electronic switch IV.
  • control logic V (with dashed lines).
  • This control logic which can be implemented in a simple manner by means of a monostable multivibrator, contains a differentiating element 10 and a subsequent timing element 9 which is connected to the electronic switch IV and to a similar switch which is connected in parallel to a series resistor R within the integrator I .
  • the voltage evaluators II, III are circuits which digitally evaluate the exceeding or falling below the predetermined voltage limit values and store the information until the following limit value is exceeded.
  • a search wave in the form of a saw tooth is maintained by feedback of the integrator via the two comparators 6, 7, the RS flip-flop and the electronic switch IV in position a.
  • the maximum output voltage of the integrator I is dimensioned such that the two limit voltages U 1 and U 2 are reached as switching voltages of the comparators 6, 7 for each possible output voltage of the loop filter 2 after the summing point.
  • the frequency of the search oscillation is to be selected so that it is much smaller than the loop bandwidth for securely locking the PLL loop.
  • the voltage behind the summing point remains constant, i. H. Changes in the integrator voltage are compensated for by changing the output voltage of the loop filter. As a result of this pull-in effect, this voltage reaches one of the two switching voltages of the Schmitt trigger 5 and brings the electronic switch IV into the other switching position b through this switching process via the control logic V.
  • the control logic V e.g. B. a monostable multivibrator, is switched with each switching operation of the Schmitt trigger 5 of the voltage evaluator II ("retriggerable monoflop"). In this way, a sawtooth oscillation can be maintained via the Schmitt trigger 5, the integrator I and the closed PLL loop.
  • the delay time of the monoflop should be chosen so that it remains triggered by the sawtooth oscillation (frequency monitoring).
  • the remaining sawtooth vibration after the loop filter 2 a measure of the interference phase modulation, can be set to small values for amplitude and frequency by selecting a small Schmitt trigger hysteresis and additionally switching on the resistor R which can be bridged by a switch in the integrator I.
  • An important advantage of the circuit according to the invention is that the static operating point of the phase modulator is no longer dependent on the output frequency of the voltage-controlled oscillator, but is only determined by the switching points of the Schmitt trigger that can be kept constant with simple measures. If the PLL loop fails, the integrator brings the voltage behind the summing point up to one of the switching voltages U 1 or U 2 , thereby switching the electronic switch IV and the integrator 1 to the shortest integration time and starting the search process described first.

Description

Die Erfindung bezieht sich auf einen phasengeregelten Oszillator mit einem Phasendiskriminator, einem Schleifenfilter und einem spannungsgesteuerten Oszillator (PLL-Schleife) und mit einer Fangeinrichtung.The invention relates to a phase-controlled oscillator with a phase discriminator, a loop filter and a voltage-controlled oscillator (PLL loop) and with a capture device.

Ein derartiger Oszillator ist durch die DE-OS 2812377 bekannt. Dabei ist am Ausgang des Schleifenfilters ein Schmitt-Trigger angeschaltet, dessen Ausgang über einen ohmschen Gegenkopplungswiderstand mit dem Verbindungspunkt des ohmschen Widerstandes und des Kondensators des Schleifenfilters verbunden ist.Such an oscillator is known from DE-OS 2812377. A Schmitt trigger is connected to the output of the loop filter, the output of which is connected via an ohmic negative feedback resistor to the connection point of the ohmic resistor and the capacitor of the loop filter.

Bei phasengeregelten Oszillatoren mit Suchoszillatoren, die das Fangen von schmalbandigen PLL-Schleifen in einem breiten Frequenzbereich ermöglichen, kann sich die Suchschwingung bei geschlossener Regelschleife um die Schleifenverstärkung verkleinern oder selbständig abschalten oder von einem Signal abgeschaltet werden, das durch einen zweiten Phasendiskriminator aus der Quadraturkomponente gewonnen wird, wie es beispielsweise bei Schaltungen in dem Buch « Phaselock Techniques von F.M. Gardner vorgesehen ist.In the case of phase-controlled oscillators with search oscillators, which allow the capture of narrow-band PLL loops in a wide frequency range, the search oscillation can be reduced or closed automatically by the loop gain when the control loop is closed, or can be switched off by a signal which is obtained from the quadrature component by a second phase discriminator is used, as is the case, for example, with circuits in the book “Phaselock Techniques by FM Gardner is provided.

Bei hohen Vergleichsfrequenzen wird der Schaltungsaufwand für eine Einrastkontrolle mit einem zweiten Phasendiskriminator beachtlich, da an beiden Phasendiskriminatoren definierte Amplituden und Phasenbeziehungen möglichst auch in einem großen Frequenzbereich eingestellt werden müssen.At high comparison frequencies, the circuit complexity for a snap-in control with a second phase discriminator becomes noticeable, since amplitudes and phase relationships defined on both phase discriminators have to be set in a large frequency range if possible.

Auch die Anwendung der üblichen Suchoszillatorschaltungen ist problematisch, da zwei gegensätzliche Anforderungen an die Schaltungsankopplung gestellt werden. Zum einen muß nämlich der Suchhub so groß sein, daß auch bei einem Spannungsoffset des Phasendiskriminators der Oszillator einwandfrei über den gewünschten Bereich gewobbelt wird. Zum anderen aber muß der Suchhub so klein sein, daß bei geschlossener Regelschleife die Wobbelschaltung den Arbeitspunkt des Phasendiskriminators nur wenig verändert. Da der Phasendiskriminatorarbeitspunkt bei PLL-Schaltungen 1. und 2. Ordnung auch ohne Wobbelschaltung durch temperaturabhängige Offsetspannungen des Phasendiskriminators, temperaturabhängige Frequenzschwankungen des Oszillators oder z. B. Anderung der Eingangsfrequenz schon meist großen Schwankungen unterworfen ist, wird die Dimensionierung der oben angeführten Suchoszillatorschaltungen sehr kritisch.The use of the usual search oscillator circuits is also problematic, since two opposing requirements are placed on the circuit coupling. On the one hand, the search stroke must be so large that even with a voltage offset of the phase discriminator, the oscillator is wobbled perfectly over the desired range. On the other hand, the search stroke must be so small that when the control loop is closed, the wobble circuit changes the working point of the phase discriminator only slightly. Since the phase discriminator operating point in PLL circuits 1st and 2nd order even without wobble switching by temperature-dependent offset voltages of the phase discriminator, temperature-dependent frequency fluctuations of the oscillator or z. B. change in the input frequency is usually subject to large fluctuations, the dimensioning of the search oscillator circuits mentioned above is very critical.

Der Erfindung liegt die Aufgabe zugrunde, für einen phasengeregelten Oszillator eine Lösung anzugeben, durch die die vorstehend genannten Schwierigkeiten in einfacher Weise behoben werden.The invention is based on the object of specifying a solution for a phase-controlled oscillator by means of which the above-mentioned difficulties are eliminated in a simple manner.

Diese Aufgabe wird bei einem phasengeregelten Oszillator der eingangs beschriebenen Art gemäß der Erfindung in der Weise gelöst, daß ein Integrator vorgesehen ist, dessen Ausgangsspannung über einen zwischen Schleifenfilter und spannungsgesteuerten Oszillator eingeschalteten Spannungssummierer in die PLL-Schleife eingekoppelt wird und der zwei von einer Steuerlogik gesteuerte, wechselweise anschaltbare Rückkopplungswege von einem Anschlußpunkt vor und hinter dem Spannungssummierer über jeweils einen Spannungsauswerter zu seinem Eingang aufweist, und daß die Spannungsauswerter aus das Über- oder Unterschreiten von vorgegebenen Spannungswerten digital auswertenden und die Information bis zur folgenden Grenzüberschreitung speichernden Schaltungen bestehen.This object is achieved in a phase-controlled oscillator of the type described at the outset according to the invention in such a way that an integrator is provided, the output voltage of which is coupled into the PLL loop via a voltage summer connected between the loop filter and the voltage-controlled oscillator, and the two of which are controlled by control logic , alternately connectable feedback paths from a connection point in front of and behind the voltage summer via a voltage evaluator to its input, and that the voltage evaluators consist of digitally evaluating whether the voltage values have exceeded or fallen below predetermined values and storing the information until the following limit crossing.

Vorteilhafte Ausgestaltungen und Weiterbildungen des Erfindungsgegenstandes sind in den Unteransprüchen angegeben.Advantageous refinements and developments of the subject matter of the invention are specified in the subclaims.

Nachstehend wird die Erfindung anhand eines in der Zeichnung dargestellten Ausführungsbeispiels näher erläutert.The invention is explained in more detail below on the basis of an exemplary embodiment shown in the drawing.

Die konventionelle PLL-Schaltung besteht aus dem Phasendiskriminator 1, dem Schleifenfilter 2 sowie dem spannungsgesteuerten Oszillator (VCO) 3.The conventional PLL circuit consists of the phase discriminator 1, the loop filter 2 and the voltage-controlled oscillator (VCO) 3.

In die PLL-Schleife ist zwischen dem Schleifenfilter 2 und dem spannungsgesteuerten Oszillator 3 ein Spannungssummierer 4 eingeschaltet, über den die Ausgangsspannung eines Integrators I (strichliert umrandet) in die PLL-Schleife eingekoppelt wird. Der Integrator I besitzt zwei Rückkopplungswege, die über einen elektronischen Schalter IV (strichliert umrandet) anschaltbar sind und an einen Anschlußpunkt A vor dem Spannungssummierer 4 und einen Anschlußpunkt B hinter dem Spannungssummierer 4 führen. In die beiden Rückkopplungswege ist jeweils ein Spannungsauswerter II bzw. 111 (strichliert umrandet) eingeschaltet. Der Spannungsauswerter II im Rückkopplungsweg zu dem Anschlußpunkt A vor dem Spannungssummierer 4 besteht aus einem Schmitt-Trigger 5, der über einen Widerstand R1 auf einen Widerstand R2 rückgekoppelt ist und dessen Ausgang mit dem einen Anschluß (strichlierte Schalterstellung b) des elektronischen Schalter IV verbunden ist.A voltage summer 4 is connected into the PLL loop between the loop filter 2 and the voltage-controlled oscillator 3, via which the output voltage of an integrator I (with a broken line) is coupled into the PLL loop. The integrator I has two feedback paths, which can be connected via an electronic switch IV (with dashed lines) and lead to a connection point A in front of the voltage summer 4 and a connection point B behind the voltage summer 4. A voltage evaluator II or 111 (outlined with dashed lines) is switched on in each of the two feedback paths. The voltage evaluator II in the feedback path to the connection point A in front of the voltage summer 4 consists of a Schmitt trigger 5, which is fed back via a resistor R1 to a resistor R2 and whose output is connected to one connector (dashed switch position b) of the electronic switch IV .

Die im Rückkopplungsweg vom Anschlußpunkt B hinter dem Spannungssummierer 4 liegende Auswerteschaltung III enthält zwei Komparatoren 6, 7, deren zweitem, nicht mit der PLL-Schleife verbundenen Eingang jeweils eine Bezugsspannung U1 bzw. U2 zugeführt wird. Die Ausgänge der Komparatoren 6, 7 sind an ein RS-Flip-Flop 8 angeschlossen, dessen Ausgang Q mit dem einen Anschluß (Schalterstellung a) des elektronischen Schalters IV verbunden ist.The evaluation circuit III located in the feedback path from the connection point B behind the voltage summer 4 contains two comparators 6, 7, the second input of which, not connected to the PLL loop, is supplied with a reference voltage U 1 or U 2 . The outputs of the comparators 6, 7 are connected to an RS flip-flop 8, the output Q of which is connected to one terminal (switch position a) of the electronic switch IV.

Die Verbindung des Integratoreingangs über den elektronischen Schalter IV mit dem Auswerter 111 für die Spannung hinter dem Spannungssummierer ermöglicht ein einwandfreies Suchen und die mit dem Spannungsauswerter II vor dem Summierer ein Halten des eingerasteten Zustandes der PLL-Schleife. Der Übergang von einem in den anderen ZustandThe connection of the integrator input via the electronic switch IV to the evaluator 111 for the voltage behind the voltage summer enables a faultless search and that with the voltage evaluator II in front of the summer maintains the locked state of the PLL loop. The transition from one state to another

wird durch selbständige Umschaltung über eine Steuerlogik V (strichliert umrandet) sichergestellt. Diese Steuerlogik, die in einfacher Weise durch einen monostabilen Multivibrator realisiert werden kann, enthält ein Differenzierglied 10 und ein nachfolgendes Zeitglied 9, das an den elektronischen Schalter IV angeschlossen ist sowie an einen gleichartigen Schalter, der innerhalb des Integrators I zu einem Serienwiderstand R parallelgeschaltet ist.is ensured by automatic switchover via a control logic V (with dashed lines). This control logic, which can be implemented in a simple manner by means of a monostable multivibrator, contains a differentiating element 10 and a subsequent timing element 9 which is connected to the electronic switch IV and to a similar switch which is connected in parallel to a series resistor R within the integrator I .

Die Spannungsauswerter II, III sind Schaltungen, die das Über- oder Unterschreiten von vorgegebenen Spannungsgrenzwerten digital auswerten und die Information bis zur folgenden Grenzwertüberschreitung speichern.The voltage evaluators II, III are circuits which digitally evaluate the exceeding or falling below the predetermined voltage limit values and store the information until the following limit value is exceeded.

Nachstehend wird die Funktion der Schaltung näher erläutert. Im nicht gefangenen Zustand der PLL-Schleife wird eine Suchschwingung in Sägenzahnform durch Rückkopplung des Integrators über die beiden Komparatoren 6, 7 das RS Flip-Flop und den elektronischen Schalter IV in Stellung a aufrecht erhalten. Die maximale Ausgangsspannung des Integrators I ist dabei so bemessen, daß für jede mögliche Ausgangsspannung des Schleifenfilters 2 hinter dem Summierpunkt die beiden Grenzspannungen U1 und U2 als Schaltspannungen der Komparatoren 6, 7 erreicht werden. Die Frequenz der Suchschwingung ist dabei so zu wählen, daß sie zum sicheren Einrasten der PLL-Schleife wesentlich kleiner ist als die Schleifenbandbreite.The function of the circuit is explained in more detail below. When the PLL loop is not trapped, a search wave in the form of a saw tooth is maintained by feedback of the integrator via the two comparators 6, 7, the RS flip-flop and the electronic switch IV in position a. The maximum output voltage of the integrator I is dimensioned such that the two limit voltages U 1 and U 2 are reached as switching voltages of the comparators 6, 7 for each possible output voltage of the loop filter 2 after the summing point. The frequency of the search oscillation is to be selected so that it is much smaller than the loop bandwidth for securely locking the PLL loop.

Nach dem Einrasten der PLL-Schleife bleibt die Spannung hinter dem Summierpunkt konstant, d. h. Änderungen der Integratorspannung werden durch die Änderung der Ausgangsspannung des Schleifenfilters kompensiert. Durch diesen Mitzieheffekt erreicht diese Spannung eine von beiden Schaltspannungen des Schmitt-Triggers 5 und bringt durch diesen Schaltvorgang über die Steuerlogik V den elektronischen Schalter IV in die andere Schaltstellung b. Die Steuerlogik V, z. B. ein monostabiler Multivibrator, wird bei jedem Schaltvorgang des Schmitt-Triggers 5 des Spannungsauswerters II geschaltet (« retriggerbares Monoflop »). Auf diese Weise kann sich eine Sägezahnschwingung über den Schmitt-Trigger 5, den Integrator I und die geschlossene PLL-Schleife aufrechterhalten. Für Überwachungszwecke ist die Verzögerungszeit des Monoflops gerade so zu wählen, daß es durch die Sägezahnschwingung gerade getriggert bleibt (Frequenzüberwachung). Die verbleibende Sägezahnschwingung nach dem Schleifenfilter 2, ein Maß für die Störphasenmodulation, kann durch Wahl einer kleinen Schmitt-Trigger-Hysteresis und zusätzliches Einschalten des durch einen Schalter überbrückbaren Widerstandes R beim Integrator I auf kleine Werte für Amplitude und Frequenz eingestellt werden.After the PLL loop has snapped in, the voltage behind the summing point remains constant, i. H. Changes in the integrator voltage are compensated for by changing the output voltage of the loop filter. As a result of this pull-in effect, this voltage reaches one of the two switching voltages of the Schmitt trigger 5 and brings the electronic switch IV into the other switching position b through this switching process via the control logic V. The control logic V, e.g. B. a monostable multivibrator, is switched with each switching operation of the Schmitt trigger 5 of the voltage evaluator II ("retriggerable monoflop"). In this way, a sawtooth oscillation can be maintained via the Schmitt trigger 5, the integrator I and the closed PLL loop. For monitoring purposes, the delay time of the monoflop should be chosen so that it remains triggered by the sawtooth oscillation (frequency monitoring). The remaining sawtooth vibration after the loop filter 2, a measure of the interference phase modulation, can be set to small values for amplitude and frequency by selecting a small Schmitt trigger hysteresis and additionally switching on the resistor R which can be bridged by a switch in the integrator I.

Ein wesentlicher Vorteil der erfindungsgemäßen Schaltung liegt darin, daß der statische Arbeitspunkt des Phasenmodulators nicht mehr von der Ausgangsfrequenz des spannungsgesteuerten Oszillators abhängig ist, sondern nur durch die mit einfachen Maßnahmen konstant zu haltenden Schaltpunkte des Schmitt-Triggers bestimmt wird. Beim Ausfall der PLL-Schleife bringt der Integrator die Spannung hinter dem Summierpunkt bis zu einer der Schaltspannungen U1 oder U2, schaltet dadurch den elektronischen Schalter IV und den Integrator 1 auf kürzeste Integrierzeit um und startet den zuerst beschriebenen Suchvorgang.An important advantage of the circuit according to the invention is that the static operating point of the phase modulator is no longer dependent on the output frequency of the voltage-controlled oscillator, but is only determined by the switching points of the Schmitt trigger that can be kept constant with simple measures. If the PLL loop fails, the integrator brings the voltage behind the summing point up to one of the switching voltages U 1 or U 2 , thereby switching the electronic switch IV and the integrator 1 to the shortest integration time and starting the search process described first.

Claims (7)

1. A phase-controlled oscillator having a phase discriminator (1), a loop filter (2) and a voltage-controlled oscillator (3) (PLL-loop) and having a latching arrangement, characterised in that there is provided an integrator (I) whose output voltage is coupled into the PLL-loop by means of a voltage adder (4) inserted between the loop filter (2) and the voltage-controlled oscillator (3), said integrator having two feedback paths to its input, controlled by a control logic (V) and alternately connected from a connection point in front of the voltage adder (4) and a connection point behind the voltage adder (4), each via a respective voltage analyser (II, III), and that the voltage analysers (II, III) consist of circuits which digitally analyse overshooting or undershooting of predetermined voltage values and store the information until the following overshooting of the limit value.
2. An oscillator as claimed in Claim 1, characterised in that in order to search for the latching frequency the voltage analyser (III) connected behind the voltage adder (4) comprises two comparators (6, 7) each having one input fed with one of two voltages (U1, U2) having a predetermined limit value, and comprises an RS-type flip-flop (8) connected following the comparators and which at the output end is connected to the one terminal (a) of the change-over switch (IV).
3. An oscillator as claimed in Claim 2, characterised in that the output voltage of the integrator (I) is dimensioned to be such that for each possible output voltage of the loop filter (2) behind the adder point (4), the two limit voltages (U1, U2) are obtained as switching voltages of the comparators (6, 7).
4. An oscillator as claimed in one of Claims 1 to 3, characterised in that in order to maintain the locked state the voltage analyser (II) connected in front of the voltage adder (4) comprises a Schmitt-trigger stage (5) whose output is connected to the control logic (V) and to the other terminal (b) of the change-over switch (IV).
5. An oscillator as claimed in one of Claims 1 to 4, characterised in that the Schmitt-trigger stage (5) has a small hysteresis.
6. An oscillator as claimed in Claim 5, characterised in that a high-value resistor (R) is arranged in a series-connection in the integrator (I).
7. An oscillator as claimed in one of the preceding Claims, characterised in that the frequency of the saw-tooth shaped search oscillation is substantially smaller than the loop bandwidth..
EP19820106928 1981-08-03 1982-07-30 Phase commanded oscillator Expired EP0071918B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3130711 1981-08-03
DE19813130711 DE3130711C2 (en) 1981-08-03 1981-08-03 Phase-controlled oscillator

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EP0071918A1 EP0071918A1 (en) 1983-02-16
EP0071918B1 true EP0071918B1 (en) 1984-10-17

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10064476A1 (en) * 2000-12-22 2002-07-11 Atmel Germany Gmbh Process for tuning a PLL circuit
RU2738316C1 (en) * 2020-04-27 2020-12-11 Федеральное государственное бюджетное образовательное учреждение высшего образования "Рязанский государственный радиотехнический университет им. В.Ф. Уткина" Controlled phase shifter

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Publication number Priority date Publication date Assignee Title
DE1804813C3 (en) * 1968-10-24 1979-04-05 Telefunken Patentverwertungsgesellschaft Mbh, 7900 Ulm Circuit for readjusting the frequency of an oscillator
FR2280238A1 (en) * 1971-10-18 1976-02-20 Thomson Csf Automatic oscillator frequency enslaving system - has memory storing frequency parameter of pulse carrier
FR2205775B1 (en) * 1972-11-06 1980-04-30 Cit Alcatel
JPS4968647A (en) * 1972-11-06 1974-07-03
US3921094A (en) * 1974-10-07 1975-11-18 Bell Telephone Labor Inc Phase-locked frequency synthesizer with means for restoring stability
SE384956B (en) * 1975-06-17 1976-05-24 Ericsson Telefon Ab L M DEVICE FOR FREQUENCY CONTROL OF AN OSCILLATOR CIRCUIT
US4023114A (en) * 1975-09-29 1977-05-10 Rca Corporation Stable wide deviation linear voltage controlled frequency generator
DE2812377C2 (en) * 1978-03-21 1983-06-30 Siemens AG, 1000 Berlin und 8000 München Phase-controlled oscillator
DE2951283A1 (en) * 1979-12-20 1981-07-02 Robert Bosch Gmbh, 7000 Stuttgart Phase locked loop circuit - increases locking speed by shunting out low-pass filters resistor during pull-in
US4336505A (en) * 1980-07-14 1982-06-22 John Fluke Mfg. Co., Inc. Controlled frequency signal source apparatus including a feedback path for the reduction of phase noise

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DE3130711C2 (en) 1986-10-23
EP0071918A1 (en) 1983-02-16
DE3130711A1 (en) 1983-02-17

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