EP0004911A1 - Annunciator of danger - Google Patents

Abstract

Hazard detection system, for example fire alarm system, with a plurality of detectors (M11 ... Mmn), which are connected to a control center (Z) via signaling lines (L1 ... Lm). A memory (SP) is provided in the control center (Z), in which characteristic data are stored for each detector that can be connected. Measured values (m) are queried cyclically from the individual detectors (M11 ... Mmn). In addition, setpoints (swa, sws) are simultaneously formed from the stored data for each detector and compared with the measured values; If necessary, fault or alarm signals are derived from the comparison.

Description

The invention relates to a hazard alarm system with a plurality of detectors connected to a central unit via signal lines, the measured values of the individual detectors being able to be queried in the central unit via test devices and evaluated using an evaluation device to form alarm or fault signals.

Such alarm systems are known, for example as public fire alarm systems or as private secondary alarm systems. In general, these systems are modular; usually several lines can be connected to the interface modules in the control center, and several fire alarms can be connected to each line. Through a so-called chain synchronization, it is also possible to transmit the measured values of the individual detectors in an analog manner on a common line (DE-OS 26 41 489). In such systems, there is a need for the information received from the detectors actually switched on to be correct to process further and to ensure that non-connected system parts do not cause any malfunctions and that every change in the system configuration is recognized.

In conventional systems, the detector information was forwarded via special patching lines, which had to be interrupted if necessary. In addition, it was also customary to simulate non-existing system parts, i.e. to simulate a functional interface using a special terminating element. Interventions of this type are carried out by hand in the system with a screwdriver or soldering iron. This activity takes up a lot of working time and is always fraught with the risk of cables being mixed up and incorrectly connected.

The object of the invention is to provide a hazard alarm system of the type mentioned in the introduction in which such routings are not required in the wiring. The system should ensure constant monitoring of the detector configuration, it should allow the identification of detectors that are connected to a common line and it should enable evaluation of different types of detectors within the same lines as well as any changes in the detector configuration in a simple manner.

According to the invention, this object is achieved in that the central unit is provided with a memory in which the occupancy and various data characteristic of the detector are stored for each detector that can be connected in the system, and a line interrogation device is provided with which the individual signal lines can be queried cyclically and with which the detector measured values arriving from the individual lines can be fed to the evaluation device, that a memory interrogation device is also provided with which the memory locations for all detectors connected to the line in question can be interrogated at each step of the line interrogation device, the memory content for the formation of setpoints, the evaluation device is supplied with comparative devices in which the measured values arriving from the individual signal lines can be compared with the setpoints formed from the stored data and can be processed to form fault or alarm signals.

The memory provided in the control center according to the invention thus contains data on the number of connected signal lines and on the number of detectors per line; these memory locations can either be written to via an input element, for example a keyboard, or automatically by a microcomputer. A query at the start of commissioning the system first checks, for example, how many detectors are connected per line or whether a line is connected at all. It is also determined whether the individual detectors are in the idle, alarm or fault state. Furthermore, independent of the actual location on the reporting line, individual detectors can be combined into groups that are, for example, of the same detector type, belong together spatially or should be processed according to the same evaluation criteria. You can, for example, selectively activate all similar detectors, such as smoke detectors, in the system and by means of a command in the memory for everyone addressed Store the common criterion, ie "smoke detector". When the memory is queried, this detector criterion is then output again and taken into account accordingly when forming the setpoint.

All information that represents the current status of the detector configuration and is stored in the system can be output via a dialog station and compared with the desired status. As soon as the actual status for part of the system or for the entire system has been saved and recognized as error-free, the system can be put into operation using a corresponding switch. The actual state is thereby defined as the target state, and all deviations from this are now recognized as a fault.

For the control of the line interrogation device, the memory interrogation device and the evaluation device, a microprocessor is expediently used, which is linked to a corresponding memory as well as an input device and an output device.

The invention is explained in more detail below using exemplary embodiments with reference to the drawing.

• Fig. 1 ein. Blockschaltbild für eine erfindungsgemäße Gefahrenmeldeanlage,
• Fig. 2 den Aufbau des Speichers und seine Verknüpfung mit der Auswerteeinrichtung gem. Fig.1,
• Fig. 3 den Aufbau der Auswerteeinrichtung gem. Fig.2,
• Fig. 4 den Aufbau einer erfindungsgemäßen. Meldeanlage bei Verwendung eines Mikroprozessors.

It shows

• Fig. 1 a. Block diagram for an alarm system according to the invention,
• Fig. 2 shows the structure of the memory and its link to the evaluation device according to. Fig.1,
• 3 shows the structure of the evaluation device according to FIG. Fig. 2,
• Fig. 4 shows the structure of an inventive. Signaling system when using a microprocessor.

The general structure of an alarm system according to the invention is shown in FIG. 1. The control center Z essentially contains an evaluation device AW, which is connected to a memory SP. The evaluation device controls a line interrogation device in the form of a multiplexer LX (represented as a rotary selector), which cyclically polls the individual detection lines, represented by lines L1 to Lm. The intermediate signal adaptation SIA converts the measured values arriving on the lines into processable signals. In addition, the evaluation device AW controls a memory interrogation device SX, which is also designed as a multiplexer (shown as a rotary selector). This memory interrogation device can process as many steps as detectors can be connected to the system. If a number of n detectors is provided for a detection line, the memory interrogation device SX switches by n steps for each step of the line interrogation device LX, ie a total of m x n steps for m lines.

The wiring of the individual detection lines can be done approximately as described in DE-AS 25 33 382 or DE-OS 26 41 489. The detectors connected in series on lines L1 to Lm are each connected to the line with a time delay corresponding to the measured value of the detector concerned. The resulting step-like current characterizes the detector addresses by the number of stages and the measured values by the length of the stages. In the signal connection SIA, these current stages are converted into pulses, which are then fed to the evaluation device AW via the line interrogation device LX. The information is collected by the evaluation unit AW when the system is started up fed to the memory SP, simultaneously with other data given by an input device IN. The storage status can be checked via an LED display.

When the system is in operation, the data contained in the memory SP for each detector are fed to the evaluation device AW via an output multiple AUS, used there to form setpoints and compared with the queried actual values of the individual detectors, as will be described in detail later. If this comparison leads to the formation of an alarm signal a, this is used for the alarm display via the multiplex output MXA. This output multiple runs synchronously with the line interrogation device LX and controls a display device which has a light-emitting diode AD1 ... ADm for each detection line. The display is stabilized via flip-flops, not shown. If necessary, the output multiplexer MXA could also run synchronously with the memory interrogation device SX. In this case, a display could be controlled for each individual detector. Similar to an alarm signal, a fault signal s formed in the evaluation device is output via a multiplex output MXS and used to control LEDs SD according to the lines queried.

The structure and function of the memory SP are shown in more detail in Fig.2. This memory then consists of a matrix of bistable memory cells, the number of which depends on the one hand on the number of connected detectors and on the other hand on the number of information per detector. If 8 bits per detector are to be stored and m detection lines with h detectors each are to be connected to the system, the memory must therefore have 8 xnxm cells. In the matrix shown each detector has a vertical column Spll ... Spnm, while eight different criteria can be saved in the eight rows Z1 ... Z8 for each detector. The occupancy of the detector positions is saved in the first line Z1. If the relevant detector is switched on, a one is saved; if the detector position is not connected, a zero appears in the memory for the relevant detector position.

Information about the detector type can be saved in further lines. This is useful because, depending on the physical measuring principle of a detector, different setpoints are required for the evaluation. For example, all smoke detectors are marked with a one in row Z2, all heat detectors in row Z3, all flame detectors in row Z4, etc. Different sensitivities for the detectors could be stored in further rows, for example. In addition, various delays can be specified, etc. The memory input takes place in such a way that when the system is started up, the AND gates AN1 and AN2 are initially blocked via the flip-flop FF, so that alarm and fault messages are suppressed. When querying the individual signaling lines, the evaluation device AW generates a signal at its output mv when the detector location just tested is really occupied. A logical one is written into line Z1 of the memory for the relevant detector via the AND gate AN3. To save the type of detector, you can, for example, close the respective switch TZ2, TZ3 etc. and then activate the respective associated detector. If switch TZ2 is closed, for example, you can activate all smoke detectors of the entire system and the memory for everyone Smoke detector inscribed a logical one in line 2. The same procedure is followed for the other lines.

Sensitivity and delay can also be stored by closing the corresponding switch TZ with the alarm signal a via the AND gate AN4. After the memory SP has been written in, the system configuration can be checked using the output multiple OFF. By step-by-step control of the individual columns Sp11 etc., all memory locations of each individual detector can be checked via the LEDs LED1 ... LED8. If the configuration is found to be correct, the system can be put into operation by closing the operating button BT. Signal 1 thus appears at the output of the flip-flop FF, the AND gates AN1 and AN2 for the alarm and fault forwarding are enabled and the outputs OUT of the memory are also enabled via the AND gates AN11 to AN18 to the evaluation device.

The structure and function of the evaluation device are shown in Fig.3. As can be seen from FIG. 2, this evaluation circuit is entered into lines Z1 to Z8 of the memory for the respective triggered detector. These signals are fed to a setpoint generator SWA for alarm and a setpoint generator SWS for malfunction. The corresponding setpoints swa or sws are formed in these setpoint transmitters, depending on the stored criteria. The setpoint generators are constructed in the simplest way as counters which, depending on the type of detector displayed and the sensitivity selected for this detector, count up to a more or less large value and then supply this value to the comparators VGA and VGS. At the same time, the evaluation device AW receives the queried from the signal adaptation SIA Measured values of the individual detectors. As mentioned, these measured values appear as impulses on the line. The number of pulses corresponds to the detector address, while the changing pulse distance is a measure of the measured value. These measured values m are fed to the measuring time counter MZ, which is designed as a time counter. It counts with a constant clock, so that depending on the pulse interval, a smaller or larger counter value is fed to the comparator for alarm VGA or the comparator for fault VGS. When a new measured value pulse appears, the measuring time counter MZ is stopped briefly, its counter reading is transmitted to the comparators VGA and VGS, and then the measuring time counter MZ is reset. Simultaneously with the resetting of the measuring time counter MZ, a step-up pulse is given to the multiplexer control MST, ie the memory interrogation device SX is advanced by one step. If one assumes in a simplified manner that this interrogation device is a rotary selector, the multiplexer control MST contains the rotary selector drive, which receives a step-up pulse with each reset of the measuring time counter MZ.

If a detector line is queried completely, the line interrogation device must be switched to the next line. For this purpose, the end character EZ is specified in the form of a maximum time which is pending at the comparator VGM. If no further measured value pulse appears up to this predetermined maximum time, the comparator VGM forms a step signal w with the signal of the measuring time counter MZ, with which the line interrogation device LX is advanced one step. As long as the maximum time value of the end character EZ is not reached, the signal mv is present at the output of the comparator VGM, which indicates an existing detector.

4 shows the circuit diagram for an alarm system according to the invention when using a microprocessor MP, the function of the system is essentially the same as that described with reference to FIGS. 1 to 2. Only the execution is controlled here by the microprocessor, which has data lines and command lines for the individual system parts. The signal adaptation SIA is structured as previously described. From it the respective line number and the measured values are given to the microprocessor. The memory SP is also constructed as in FIG. 2, with rows and columns for the individual detectors. An address bus AB and a data bus DB connect the microprocessor MP to the memory SP. Furthermore, an input field EF is connected to the microprocessor, with which, as in FIG. 2, detector criteria for the individual lines of the memory SP can be entered. An output or display field, for example in the form of a data display station DS, is used to control the system. With this construction according to FIG. 4, the system therefore performs all functions as in the circuit described in FIGS. 1 to 3. However, by using the microprocessor, the required logical processes and control functions are fulfilled with a minimum of components; the individual components, such as microprocessor MP, memory SP, etc., are known per se. In addition, the use of the microprocessor MP makes operating the system and outputting stored data via the data display station much easier and more convenient than with the conventional design.

Claims (9)

1.Danger alarm system with a plurality of detectors connected to a central unit via signal lines, the measured values of the individual detectors being able to be queried in the central unit via test devices and evaluable via an evaluation device to form alarm or fault signals, characterized in that in the central unit ( Z) a memory (SP) is provided, in which for each detector (M11 ... Mmn) that can be connected to the system, the assignment and various data characteristic of the detector are stored, so that a line interrogation device (LX) is provided with which the individual signal lines (L1 ... Ln) can be queried cyclically and with which the detector measured values arriving from the individual lines can be fed to the evaluation device (AW), that a memory interrogation device (SX) is also provided, with which the line interrogation device (LX) the memory locations (Sp11 ... Spmn; Z1 ... Z8) for all connected to the relevant line Detectors can be queried, the memory content being supplied to the evaluation device for forming setpoints, and finally comparison devices (VGA, VGS) are provided in the evaluation device in which the measured values (m) arriving from the individual signal lines with the data formed from the stored data Setpoints (swa, sws) are comparable and can be processed to form fault or alarm signals. 2. Alarm system according to claim 1, characterized in that an input device (ON) is provided for writing to the individual memory locations. 3. Signaling system according to claim 1 or 2, characterized in that the memory content can be checked via a display device (LED). 4. Signaling system according to one of claims 1 to 3, characterized in that when the system is started up, the assignment of the individual signaling lines (L1 ... Lm) can be measured via the line interrogation device (LX) and can be written into the memory (SP). 5. Signaling system according to claim 4, characterized in that the evaluation device (AW) can be switched off during the writing into the memory (SP) by a switching device (FF) and can only be switched on after checking the memory content 6, signaling system according to one of claims 1 to 5, characterized in that the individual detectors (M11 ... Mmn) in the memory (SP) can be identified in groups according to their type of detector. 7. Signaling system according to one of claims 1 to 6, characterized in that the individual detectors (M11 ... Mmn) in the memory (SP) can be identified in groups according to their sensitivity. 8. Signaling system according to one of claims 1 to 7, characterized in that the individual detectors (M11 ... Mmn) in the memory (SP) can be identified in groups after their response delay. 9. Signaling system according to one of claims 1 to 8, characterized in that a microprocessor is provided as the evaluation device (AW).

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