EA200000546A1 - Компьютерная система - Google Patents
Компьютерная системаInfo
- Publication number
- EA200000546A1 EA200000546A1 EA200000546A EA200000546A EA200000546A1 EA 200000546 A1 EA200000546 A1 EA 200000546A1 EA 200000546 A EA200000546 A EA 200000546A EA 200000546 A EA200000546 A EA 200000546A EA 200000546 A1 EA200000546 A1 EA 200000546A1
- Authority
- EA
- Eurasian Patent Office
- Prior art keywords
- command
- stack
- completed
- pointer
- elements
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
- G06F9/3865—Recovery, e.g. branch miss-prediction, exception handling using deferred exception handling, e.g. exception flags
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30134—Register stacks; shift registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/3017—Runtime instruction translation, e.g. macros
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
- G06F9/384—Register renaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
- G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Devices For Executing Special Programs (AREA)
Abstract
Компьютерная система для обработки программы, написанной на машинном языке стековой машины, содержащая кэш-память (11) данных, объединенный регистровый файл (6), в котором данные записываются в каждый из элементов, стек (3) продвигаемого указателя и стек (4) завершенного указателя, в который адреса элементов объединенного регистрового файла записываются в элементы, командную очередь (5), имеющую структуру "первым пришел, первым обслужен", в которой содержания каждой из команд записываются в каждый элемент, арифметические устройства (80 и 81) и устройство (83) загрузки/запоминания. Когда команда, содержащаяся в первом элементе командной очереди, может быть завершена или завершена, стек завершенного указателя обрабатывается так, чтобы выполнить ту же самую операцию стека продвигаемого указателя, когда содержащаяся команда декодируется на основе содержаний первого элемента командной очереди, и первый элемент исключается из командной очереди.Международная заявка была опубликована вместе с отчетом о международном поиске.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP36247397 | 1997-11-20 | ||
JP28211898 | 1998-10-05 | ||
PCT/JP1998/005230 WO1999027439A1 (fr) | 1997-11-20 | 1998-11-19 | Systeme informatique |
Publications (1)
Publication Number | Publication Date |
---|---|
EA200000546A1 true EA200000546A1 (ru) | 2001-04-23 |
Family
ID=26554476
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EA200000546A EA200000546A1 (ru) | 1997-11-20 | 1998-11-19 | Компьютерная система |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP1035471A1 (ru) |
KR (1) | KR20010032275A (ru) |
CN (1) | CN1279782A (ru) |
AU (1) | AU745449B2 (ru) |
CA (1) | CA2310369A1 (ru) |
EA (1) | EA200000546A1 (ru) |
WO (1) | WO1999027439A1 (ru) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001061475A1 (en) * | 2000-02-14 | 2001-08-23 | Chicory Systems, Inc. | Transforming a stack-based code sequence to a register based code sequence |
WO2001061476A2 (en) * | 2000-02-14 | 2001-08-23 | Chicory Systems, Inc. | System including cpu and code translator for translating code from a second instruction set to a first instruction set |
GB2367651B (en) * | 2000-10-05 | 2004-12-29 | Advanced Risc Mach Ltd | Hardware instruction translation within a processor pipeline |
GB2367653B (en) * | 2000-10-05 | 2004-10-20 | Advanced Risc Mach Ltd | Restarting translated instructions |
US20020083309A1 (en) * | 2000-12-21 | 2002-06-27 | Sun Microsystems, Inc. | Hardware spill/fill engine for register windows |
GB2377288A (en) * | 2001-07-06 | 2003-01-08 | Digital Comm Technologies Ltd | Executing branch instructions of a stack based program on a register based processor |
US20080162782A1 (en) * | 2005-06-15 | 2008-07-03 | Nagarajan Suresh | Using Transacted Writes and Caching Mechanism to Improve Write Performance in Multi-Level Cell Flash Memory |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS622330A (ja) * | 1985-06-27 | 1987-01-08 | Nec Corp | 演算例外命令アドレス割出装置 |
US4992938A (en) * | 1987-07-01 | 1991-02-12 | International Business Machines Corporation | Instruction control mechanism for a computing system with register renaming, map table and queues indicating available registers |
JPH02260082A (ja) * | 1989-03-31 | 1990-10-22 | Hajime Seki | 計算機方式 |
JPH0383134A (ja) * | 1989-08-28 | 1991-04-09 | Matsushita Electric Ind Co Ltd | スタック管理方法 |
US5696955A (en) * | 1994-06-01 | 1997-12-09 | Advanced Micro Devices, Inc. | Floating point stack and exchange instruction |
-
1998
- 1998-11-19 EP EP98954765A patent/EP1035471A1/en not_active Withdrawn
- 1998-11-19 AU AU11747/99A patent/AU745449B2/en not_active Ceased
- 1998-11-19 WO PCT/JP1998/005230 patent/WO1999027439A1/ja not_active Application Discontinuation
- 1998-11-19 CA CA002310369A patent/CA2310369A1/en not_active Abandoned
- 1998-11-19 EA EA200000546A patent/EA200000546A1/ru unknown
- 1998-11-19 CN CN98811324.4A patent/CN1279782A/zh active Pending
- 1998-11-19 KR KR1020007005482A patent/KR20010032275A/ko not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
AU1174799A (en) | 1999-06-15 |
CN1279782A (zh) | 2001-01-10 |
KR20010032275A (ko) | 2001-04-16 |
AU745449B2 (en) | 2002-03-21 |
WO1999027439A1 (fr) | 1999-06-03 |
EP1035471A1 (en) | 2000-09-13 |
CA2310369A1 (en) | 1999-06-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE3686991D1 (de) | Mechanismus fuer parallele speicherdatenabholung und befehlsausfuehrung in einem prozessor mit reduziertem befehlssatz. | |
KR870011524A (ko) | 마이크로프로세서칩의 스택프레임캐시 | |
EP0735463A3 (en) | Computer processor having a register file with reduced read and/or write port bandwidth | |
ES8702011A1 (es) | Sistema de control de traslacion de direcciones | |
DE69429226D1 (de) | Absendung von Befehlen an mehrere Verarbeitungseinheiten | |
ATE145291T1 (de) | Addressieren von mikrobefehlen in einer pipeline- zentraleinheit ( betriebsverfahren, adressierverfahren, kellerspeicher und zentraleinheit) | |
JPS6462764A (en) | Vector computer | |
EA200000546A1 (ru) | Компьютерная система | |
JPH0682320B2 (ja) | データ処理装置 | |
SE8305290D0 (sv) | Minneshanteringsenhet for datorer | |
US4455604A (en) | Digital data processing system having addressing means for translating operands into descriptors identifying data, plural multilevel microcode control means, and ability to execute a plurality of internal language dialects | |
CA2420785A1 (en) | Computer system for processing instructions each containing a group of operations to be executed out of order | |
EP0101718B1 (en) | Computer with automatic mapping of memory contents into machine registers | |
JPS5853075A (ja) | 高速分離バツフアを備えた情報処理装置 | |
JPH0646382B2 (ja) | プリフェッチキュー制御方式 | |
US4532586A (en) | Digital data processing system with tripartite description-based addressing multi-level microcode control, and multi-level stacks | |
KR950020156A (ko) | 프로세서 및 그것을 사용한 데이타 처리시스템 | |
KR970059915A (ko) | 마이크로프로세서의 인터럽트 처리장치 | |
JPS57200985A (en) | Buffer memory device | |
SE9702762D0 (sv) | Metod vid processor samt processor anpassad att verka enligt den angivna metoden | |
JPS6488840A (en) | Data processor | |
Kim et al. | A Study on Large Data File Management Using Buffer Cache and Virtual Memory File | |
KR100576006B1 (ko) | 실시간오퍼레이팅시스템의효율적인온라인디버깅처리및그를위한프로세스스케쥴링방법 | |
JPH11134202A (ja) | タスク切替え装置 | |
JPH03204029A (ja) | 情報処理装置 |