JPS6488840A - Data processor - Google Patents

Data processor

Info

Publication number
JPS6488840A
JPS6488840A JP24676987A JP24676987A JPS6488840A JP S6488840 A JPS6488840 A JP S6488840A JP 24676987 A JP24676987 A JP 24676987A JP 24676987 A JP24676987 A JP 24676987A JP S6488840 A JPS6488840 A JP S6488840A
Authority
JP
Japan
Prior art keywords
instruction
address
decoded
contents
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24676987A
Other languages
Japanese (ja)
Inventor
Hideyuki Kawakita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP24676987A priority Critical patent/JPS6488840A/en
Publication of JPS6488840A publication Critical patent/JPS6488840A/en
Pending legal-status Critical Current

Links

Landscapes

  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To quickly perform repeated processing by storing and holding a decoded result at the time of first decoding an instruction to be repeatedly processed and using the stored and held the decoded result to perform the repeated processing. CONSTITUTION:When a transfer instruction is read out from a memory 3 by an address, for example, an address 100 given from a program counter 1, the transfer instruction is decoded by a decoder 4. When decoding is terminated, the instruction length of the transfer instruction is added to an adder 2, and contents of the counter 1 are updated to 102. The decoded result is processed by an executing unit 5. The instruction in address 102 is processed in the same manner and contents of the counter 1 are updated to 104. When the instruction in address 104 is decoded, a storage pointer 7 is cleared and contents of the counter 1 are updated to 105. When the instruction in address 105 is decoded, the decoded result is sent to the unit 5 and is stored in a decode buffer 6. When the instruction in address 108 is processed thereafter, contents of the buffer 6 are sent to the unit 5.
JP24676987A 1987-09-30 1987-09-30 Data processor Pending JPS6488840A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24676987A JPS6488840A (en) 1987-09-30 1987-09-30 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24676987A JPS6488840A (en) 1987-09-30 1987-09-30 Data processor

Publications (1)

Publication Number Publication Date
JPS6488840A true JPS6488840A (en) 1989-04-03

Family

ID=17153392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24676987A Pending JPS6488840A (en) 1987-09-30 1987-09-30 Data processor

Country Status (1)

Country Link
JP (1) JPS6488840A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998036351A1 (en) * 1997-02-17 1998-08-20 Hitachi, Ltd. Data processor
US6065112A (en) * 1997-06-18 2000-05-16 Matsushita Electric Industrial Co., Ltd. Microprocessor with arithmetic processing units and arithmetic execution unit
CZ298442B6 (en) * 2000-11-22 2007-10-03 Kabushiki Kaisha Kobe Seiko Sho High-strength steel for forging

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998036351A1 (en) * 1997-02-17 1998-08-20 Hitachi, Ltd. Data processor
US6505295B1 (en) 1997-02-17 2003-01-07 Hitachi, Ltd. Data processor
US7080240B2 (en) 1997-02-17 2006-07-18 Hitachi, Ltd. Data processing apparatus
US6065112A (en) * 1997-06-18 2000-05-16 Matsushita Electric Industrial Co., Ltd. Microprocessor with arithmetic processing units and arithmetic execution unit
CZ298442B6 (en) * 2000-11-22 2007-10-03 Kabushiki Kaisha Kobe Seiko Sho High-strength steel for forging

Similar Documents

Publication Publication Date Title
JPS56149646A (en) Operation controller
CA2049690A1 (en) Firmware modification system wherein older version can be retrieved
DE68927451T2 (en) Addressing microinstructions in a pipeline central unit (operating method, addressing method, cellar storage and central unit)
EP0263447A3 (en) A method and apparatus for implementing a branch and return on address instruction in a digital data processing system
TW266275B (en) Digital signal processing device and its direct memory access control process
GB2019062A (en) Processing system
TW343318B (en) Register addressing in a data processing apparatus
JPS6488840A (en) Data processor
JPS5532118A (en) Data processing system
EA200000546A1 (en) COMPUTER SYSTEM
JPS6482131A (en) Data processor
EP0333231A3 (en) Microcomputer system capable of accessing to memory at high speed
JPS6429933A (en) Store buffer controller for buffer storage system
JPS57143640A (en) Data processing device
JPS5650441A (en) Data processing system
EP0336091A3 (en) Pipeline type microprocessor
JPS5714945A (en) Microprogram control device
JPS6491241A (en) Data processor
JPS6414655A (en) Data transfer device
JPS54115036A (en) Control system for microprogram
JPS6488760A (en) Memory data fetching system
JPS57199052A (en) Data processing device
JPS5472934A (en) Data processor
JPS6444545A (en) Central processing unit
JPS575154A (en) Microprogram controller