DE69938911D1 - Verfahren und Vorrichtung zum Abrufen von Befehlen - Google Patents

Verfahren und Vorrichtung zum Abrufen von Befehlen

Info

Publication number
DE69938911D1
DE69938911D1 DE69938911T DE69938911T DE69938911D1 DE 69938911 D1 DE69938911 D1 DE 69938911D1 DE 69938911 T DE69938911 T DE 69938911T DE 69938911 T DE69938911 T DE 69938911T DE 69938911 D1 DE69938911 D1 DE 69938911D1
Authority
DE
Germany
Prior art keywords
fetching commands
fetching
commands
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69938911T
Other languages
English (en)
Inventor
Sang Hoo Dhong
Joel Abraham Silberman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE69938911D1 publication Critical patent/DE69938911D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
DE69938911T 1998-03-24 1999-02-26 Verfahren und Vorrichtung zum Abrufen von Befehlen Expired - Lifetime DE69938911D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/046,872 US6334184B1 (en) 1998-03-24 1998-03-24 Processor and method of fetching an instruction that select one of a plurality of decoded fetch addresses generated in parallel to form a memory request

Publications (1)

Publication Number Publication Date
DE69938911D1 true DE69938911D1 (de) 2008-07-31

Family

ID=21945849

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69938911T Expired - Lifetime DE69938911D1 (de) 1998-03-24 1999-02-26 Verfahren und Vorrichtung zum Abrufen von Befehlen

Country Status (6)

Country Link
US (1) US6334184B1 (de)
EP (1) EP0945785B1 (de)
JP (1) JP3721002B2 (de)
KR (1) KR100331199B1 (de)
DE (1) DE69938911D1 (de)
TW (1) TW409224B (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6604191B1 (en) * 2000-02-04 2003-08-05 International Business Machines Corporation Method and apparatus for accelerating instruction fetching for a processor
US6823473B2 (en) * 2000-04-19 2004-11-23 Hewlett-Packard Development Company, L.P. Simultaneous and redundantly threaded processor uncached load address comparator and data value replication circuit
US6854075B2 (en) * 2000-04-19 2005-02-08 Hewlett-Packard Development Company, L.P. Simultaneous and redundantly threaded processor store instruction comparator
US7210025B1 (en) * 2000-04-19 2007-04-24 Uht Augustus K Automatic and transparent hardware conversion of traditional control flow to predicates
US20020073301A1 (en) * 2000-12-07 2002-06-13 International Business Machines Corporation Hardware for use with compiler generated branch information

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0774992B2 (ja) 1988-08-09 1995-08-09 松下電器産業株式会社 データ処理装置
JPH0375932A (ja) 1989-08-18 1991-03-29 Nec Corp 数値演算処理装置
US5185868A (en) * 1990-01-16 1993-02-09 Advanced Micro Devices, Inc. Apparatus having hierarchically arranged decoders concurrently decoding instructions and shifting instructions not ready for execution to vacant decoders higher in the hierarchy
JPH04125733A (ja) 1990-09-18 1992-04-27 Nec Corp パイプライン情報処理方式
JP2591325B2 (ja) 1990-10-30 1997-03-19 松下電器産業株式会社 分岐制御装置
JPH05108345A (ja) 1991-10-16 1993-04-30 Nec Corp 分岐命令処理装置
JP2761688B2 (ja) 1992-02-07 1998-06-04 三菱電機株式会社 データ処理装置
US5495598A (en) * 1993-12-23 1996-02-27 Unisys Corporation Stuck fault detection for branch instruction condition signals
US5535346A (en) * 1994-07-05 1996-07-09 Motorola, Inc. Data processor with future file with parallel update and method of operation
TW360852B (en) 1995-04-12 1999-06-11 Matsushita Electric Ind Co Ltd Pipeline processor
JPH08314720A (ja) 1995-05-12 1996-11-29 Hitachi Ltd 分岐制御システム
US5911153A (en) 1996-10-03 1999-06-08 International Business Machines Corporation Memory design which facilitates incremental fetch and store requests off applied base address requests
US5796998A (en) * 1996-11-21 1998-08-18 International Business Machines Corporation Apparatus and method for performing branch target address calculation and branch prediciton in parallel in an information handling system
US5964869A (en) * 1997-06-19 1999-10-12 Sun Microsystems, Inc. Instruction fetch mechanism with simultaneous prediction of control-flow instructions
US5926628A (en) * 1997-07-15 1999-07-20 International Business Machines Corporation Selectable priority bus arbitration scheme
US6112299A (en) * 1997-12-31 2000-08-29 International Business Machines Corporation Method and apparatus to select the next instruction in a superscalar or a very long instruction word computer having N-way branching
US5974543A (en) * 1998-01-23 1999-10-26 International Business Machines Corporation Apparatus and method for performing subroutine call and return operations

Also Published As

Publication number Publication date
JP2000029694A (ja) 2000-01-28
KR100331199B1 (ko) 2002-04-06
EP0945785A2 (de) 1999-09-29
TW409224B (en) 2000-10-21
KR19990077433A (ko) 1999-10-25
JP3721002B2 (ja) 2005-11-30
EP0945785A3 (de) 2000-09-27
EP0945785B1 (de) 2008-06-18
US6334184B1 (en) 2001-12-25

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Legal Events

Date Code Title Description
8320 Willingness to grant licences declared (paragraph 23)
8364 No opposition during term of opposition