DE69933724D1 - Synchronisationsverfahren und Netzwerkbrücke - Google Patents

Synchronisationsverfahren und Netzwerkbrücke

Info

Publication number
DE69933724D1
DE69933724D1 DE69933724T DE69933724T DE69933724D1 DE 69933724 D1 DE69933724 D1 DE 69933724D1 DE 69933724 T DE69933724 T DE 69933724T DE 69933724 T DE69933724 T DE 69933724T DE 69933724 D1 DE69933724 D1 DE 69933724D1
Authority
DE
Germany
Prior art keywords
synchronization method
network bridge
bridge
network
synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69933724T
Other languages
English (en)
Other versions
DE69933724T2 (de
Inventor
Takehiro Sugita
Yasunori Maeshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of DE69933724D1 publication Critical patent/DE69933724D1/de
Publication of DE69933724T2 publication Critical patent/DE69933724T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40052High-speed IEEE 1394 serial bus
    • H04L12/40091Bus bridging
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0652Synchronisation among time division multiple access [TDMA] nodes, e.g. time triggered protocol [TTP]
    • H04J3/0655Synchronisation among time division multiple access [TDMA] nodes, e.g. time triggered protocol [TTP] using timestamps
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/64Hybrid switching systems
    • H04L12/6418Hybrid transport
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W56/00Synchronisation arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/64Hybrid switching systems
    • H04L12/6418Hybrid transport
    • H04L2012/6489Buffer Management, Threshold setting, Scheduling, Shaping

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Small-Scale Networks (AREA)
  • Information Transfer Systems (AREA)
  • Control Of Electric Motors In General (AREA)
  • Measurement Of Unknown Time Intervals (AREA)
DE69933724T 1998-03-12 1999-03-10 Synchronisationsverfahren und Netzwerkbrücke Expired - Lifetime DE69933724T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP06093298 1998-03-12
JP06093298A JP3397124B2 (ja) 1998-03-12 1998-03-12 同期方法及びブリッジ

Publications (2)

Publication Number Publication Date
DE69933724D1 true DE69933724D1 (de) 2006-12-07
DE69933724T2 DE69933724T2 (de) 2007-09-13

Family

ID=13156659

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69933724T Expired - Lifetime DE69933724T2 (de) 1998-03-12 1999-03-10 Synchronisationsverfahren und Netzwerkbrücke

Country Status (7)

Country Link
US (1) US6879602B1 (de)
EP (1) EP0942556B1 (de)
JP (1) JP3397124B2 (de)
KR (1) KR100577465B1 (de)
AU (1) AU1858899A (de)
DE (1) DE69933724T2 (de)
TW (1) TW412897B (de)

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US7933295B2 (en) 1999-04-13 2011-04-26 Broadcom Corporation Cable modem with voice processing capability
JP3353824B2 (ja) 1999-04-22 2002-12-03 日本電気株式会社 ネットワーク同期システム及びネットワーク同期方法
US7023833B1 (en) 1999-09-10 2006-04-04 Pulse-Link, Inc. Baseband wireless network for isochronous communication
JP3424620B2 (ja) 1999-09-24 2003-07-07 日本電気株式会社 アイソクロナスパケット転送方法,該転送用制御プログラムの記録媒体,ブリッジ及びパケット転送制御lsi
AU2001240986A1 (en) * 2000-02-18 2001-08-27 Bridgeco Ag Multi-portal bridge for providing network connectivity
KR20010093495A (ko) * 2000-03-29 2001-10-29 전주범 케이블모뎀의 타임스탬프 복원회로
US6895009B1 (en) * 2000-04-07 2005-05-17 Omneon Video Networks Method of generating timestamps for isochronous data
JP3748376B2 (ja) * 2000-08-22 2006-02-22 松下電器産業株式会社 送信装置、ソースパケット生成装置、パケット形態決定方法、及び記録媒体
EP1198085B1 (de) 2000-10-10 2011-06-08 Sony Deutschland GmbH Zyklussynchronisierung zwischen miteinander verbundenen Teilnetzwerken
US7035246B2 (en) * 2001-03-13 2006-04-25 Pulse-Link, Inc. Maintaining a global time reference among a group of networked devices
JP4084196B2 (ja) * 2001-03-15 2008-04-30 ローベルト ボッシュ ゲゼルシャフト ミット ベシュレンクテル ハフツング 多数のttcan−バスのサイクルタイムを同期させる方法と装置及び対応するバスシステム
JP3698074B2 (ja) * 2001-06-15 2005-09-21 日本電気株式会社 ネットワーク同期方法、lsi、バスブリッジ、ネットワーク機器、およびプログラム
JP3702261B2 (ja) 2002-09-30 2005-10-05 株式会社東芝 タイムスタンプ補正回路および補正方法
FR2853173B1 (fr) * 2003-03-25 2006-01-06 Canon Kk Procede de maintien d'un debit de lecture constant des donnees d'un flux de donnees isochrones traversant un pont, programme d'ordinateur et pont correspondants
US7369633B2 (en) * 2003-06-13 2008-05-06 The Directv Group, Inc. Method and apparatus for providing carrier synchronization in digital broadcast and interactive systems
US8208499B2 (en) 2003-06-13 2012-06-26 Dtvg Licensing, Inc. Framing structure for digital broadcasting and interactive services
US7237135B1 (en) * 2003-12-29 2007-06-26 Apple Inc. Cyclemaster synchronization in a distributed bridge
KR100597436B1 (ko) * 2004-12-15 2006-07-10 한국전자통신연구원 무선 1394 시스템의 사이클 타임 동기화 장치 및 그 방법
DE102005018837A1 (de) * 2005-04-22 2006-10-26 Robert Bosch Gmbh Verfahren und Vorrichtung zur Synchronisation zweier Bussysteme sowie Anordnung aus zwei Bussystemen
DE102005061155A1 (de) * 2005-12-21 2007-06-28 Bosch Rexroth Ag Kommunikationsstruktur
US9008002B2 (en) 2006-08-07 2015-04-14 Qualcomm Incorporated Conditional requests for asynchronous wireless communication
US8340027B2 (en) 2006-08-07 2012-12-25 Qualcomm Incorporated Monitor period for asynchronous wireless communication
US8737313B2 (en) 2006-08-07 2014-05-27 Qualcomm Incorporated Transmit time segments for asynchronous wireless communication
US8310996B2 (en) 2006-08-07 2012-11-13 Qualcomm Incorporated Conditional scheduling for asynchronous wireless communication
US8416762B2 (en) 2006-08-07 2013-04-09 Qualcomm Incorporated Message exchange scheme for asynchronous wireless communication
US20120027146A1 (en) * 2009-02-24 2012-02-02 Telefonaktiebolaget Lm Ericsson (Publ) Clock recovery in a communications network

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5495482A (en) 1989-09-29 1996-02-27 Motorola Inc. Packet transmission system and method utilizing both a data bus and dedicated control lines
US5128971A (en) 1991-01-14 1992-07-07 Motorola, Inc. Frequency synchronization apparatus
US5428603A (en) * 1993-05-17 1995-06-27 Hughes Aircraft Company Synchronous time division multiple access interrogate-respond data communication network
US5408506A (en) 1993-07-09 1995-04-18 Apple Computer, Inc. Distributed time synchronization system and method
CA2109534A1 (en) * 1993-11-19 1995-05-20 Mauricio Peres Interface device
US5434996A (en) * 1993-12-28 1995-07-18 Intel Corporation Synchronous/asynchronous clock net with autosense
US5557755A (en) * 1994-02-24 1996-09-17 Apple Computer, Inc. Method and system for improving bus utilization efficiency
US5546546A (en) * 1994-05-20 1996-08-13 Intel Corporation Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge
DE69621725T2 (de) 1995-03-29 2003-01-30 Koninklijke Philips Electronics N.V., Eindhoven System zur bereitstellung eines vorgegebenen zeitbezugs zwischen eingabe und ausgabe von daten sowie sender und empfänger für ein solches system
US5664165A (en) * 1995-04-19 1997-09-02 International Business Machines Corporation Generation of a synthetic clock signal in synchronism with a high frequency clock signal and corresponding to a low frequency clock signal
US5721839A (en) * 1995-10-13 1998-02-24 Compaq Computer Corporation Apparatus and method for synchronously providing a fullness indication of a dual ported buffer situated between two asynchronous buses
US5692200A (en) * 1995-10-16 1997-11-25 Compaq Computer Corporation Bridge circuit for preventing data incoherency by holding off propagation of data transfer completion interrupts until data clears the bridge circuit
JP3403284B2 (ja) * 1995-12-14 2003-05-06 インターナショナル・ビジネス・マシーンズ・コーポレーション 情報処理システム及びその制御方法
AU2651497A (en) * 1996-05-07 1997-11-26 Yamaha Corporation Method and system for transmitting data
US5870567A (en) * 1996-12-31 1999-02-09 Compaq Computer Corporation Delayed transaction protocol for computer system bus
US6032261A (en) * 1997-12-30 2000-02-29 Philips Electronics North America Corp. Bus bridge with distribution of a common cycle clock to all bridge portals to provide synchronization of local buses, and method of operation thereof
US6128318A (en) * 1998-01-23 2000-10-03 Philips Electronics North America Corporation Method for synchronizing a cycle master node to a cycle slave node using synchronization information from an external network or sub-network which is supplied to the cycle slave node
US6044414A (en) * 1998-02-17 2000-03-28 Advanced Micro Devices, Inc. System for preventing a DMA controller from evaluating its DRQ input once a DMA operation has started until the DRQ input has been updated
US6101566A (en) * 1998-03-13 2000-08-08 Compaq Computer Corporation Computer system with bridge logic that includes an internal modular expansion bus and a common target interface for internal target devices
US6347084B1 (en) 1998-05-28 2002-02-12 U.S. Philips Corporation Method of timestamp synchronization of a reservation-based TDMA protocol

Also Published As

Publication number Publication date
AU1858899A (en) 1999-09-23
EP0942556B1 (de) 2006-10-25
DE69933724T2 (de) 2007-09-13
TW412897B (en) 2000-11-21
EP0942556A3 (de) 2004-01-07
EP0942556A2 (de) 1999-09-15
JP3397124B2 (ja) 2003-04-14
KR100577465B1 (ko) 2006-05-08
KR19990077712A (ko) 1999-10-25
JPH11261579A (ja) 1999-09-24
US6879602B1 (en) 2005-04-12

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