DE69927075T2 - Rekonfigurierbarer Koprozessor mit mehreren Multiplizier-Akkumulier-Einheiten - Google Patents

Rekonfigurierbarer Koprozessor mit mehreren Multiplizier-Akkumulier-Einheiten Download PDF

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Publication number
DE69927075T2
DE69927075T2 DE69927075T DE69927075T DE69927075T2 DE 69927075 T2 DE69927075 T2 DE 69927075T2 DE 69927075 T DE69927075 T DE 69927075T DE 69927075 T DE69927075 T DE 69927075T DE 69927075 T2 DE69927075 T2 DE 69927075T2
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DE
Germany
Prior art keywords
accumulate units
multiple multiply
reconfigurable coprocessor
coprocessor
reconfigurable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69927075T
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English (en)
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DE69927075D1 (de
Inventor
Alan Gatherer
Carl E Lemonds
Dale E Hocevar
Ching-Yu Hung
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Texas Instruments Inc
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Texas Instruments Inc
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Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
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Publication of DE69927075D1 publication Critical patent/DE69927075D1/de
Publication of DE69927075T2 publication Critical patent/DE69927075T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
DE69927075T 1998-02-04 1999-02-03 Rekonfigurierbarer Koprozessor mit mehreren Multiplizier-Akkumulier-Einheiten Expired - Lifetime DE69927075T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US7364198P 1998-02-04 1998-02-04

Publications (2)

Publication Number Publication Date
DE69927075D1 DE69927075D1 (de) 2005-10-13
DE69927075T2 true DE69927075T2 (de) 2006-06-14

Family

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DE69927075T Expired - Lifetime DE69927075T2 (de) 1998-02-04 1999-02-03 Rekonfigurierbarer Koprozessor mit mehreren Multiplizier-Akkumulier-Einheiten

Country Status (3)

Country Link
US (1) US6298366B1 (de)
JP (1) JPH11296493A (de)
DE (1) DE69927075T2 (de)

Families Citing this family (69)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6609143B1 (en) * 1998-01-21 2003-08-19 Matsushita Electric Industrial Co., Ltd Method and apparatus for arithmetic operation
US6467009B1 (en) * 1998-10-14 2002-10-15 Triscend Corporation Configurable processor system unit
US6493817B1 (en) * 1999-05-21 2002-12-10 Hewlett-Packard Company Floating-point unit which utilizes standard MAC units for performing SIMD operations
US6594711B1 (en) * 1999-07-15 2003-07-15 Texas Instruments Incorporated Method and apparatus for operating one or more caches in conjunction with direct memory access controller
US6542916B1 (en) * 1999-07-28 2003-04-01 Arm Limited Data processing apparatus and method for applying floating-point operations to first, second and third operands
US7401205B1 (en) * 1999-08-13 2008-07-15 Mips Technologies, Inc. High performance RISC instruction set digital signal processor having circular buffer and looping controls
US6789183B1 (en) * 1999-09-28 2004-09-07 Texas Instruments Incorporated Apparatus and method for activation of a digital signal processor in an idle mode for interprocessor transfer of signal groups in a digital signal processing unit
US6658503B1 (en) * 1999-12-07 2003-12-02 Texas Instruments Incorporated Parallel transfer size calculation and annulment determination in transfer controller with hub and ports
DE10003006A1 (de) * 2000-01-25 2001-07-26 Bosch Gmbh Robert Anordnung und Verfahren zur Signalverarbeitung und Speicherung
US6721840B1 (en) 2000-08-18 2004-04-13 Triscend Corporation Method and system for interfacing an integrated circuit to synchronous dynamic memory and static memory
US6725364B1 (en) 2001-03-08 2004-04-20 Xilinx, Inc. Configurable processor system
US20030105617A1 (en) * 2001-12-05 2003-06-05 Nec Usa, Inc. Hardware acceleration system for logic simulation
AU2003270874A1 (en) * 2002-09-24 2004-04-19 Interdigital Technology Corporation Computationally efficient mathematical engine
US7882165B2 (en) 2003-12-29 2011-02-01 Xilinx, Inc. Digital signal processing element having an arithmetic logic unit
US7865542B2 (en) 2003-12-29 2011-01-04 Xilinx, Inc. Digital signal processing block having a wide multiplexer
US7844653B2 (en) 2003-12-29 2010-11-30 Xilinx, Inc. Digital signal processing circuit having a pre-adder circuit
US7860915B2 (en) 2003-12-29 2010-12-28 Xilinx, Inc. Digital signal processing circuit having a pattern circuit for determining termination conditions
US7853634B2 (en) 2003-12-29 2010-12-14 Xilinx, Inc. Digital signal processing circuit having a SIMD circuit
US7472155B2 (en) 2003-12-29 2008-12-30 Xilinx, Inc. Programmable logic device with cascading DSP slices
US7567997B2 (en) 2003-12-29 2009-07-28 Xilinx, Inc. Applications of cascading DSP slices
US7853632B2 (en) 2003-12-29 2010-12-14 Xilinx, Inc. Architectural floorplan for a digital signal processing circuit
US7870182B2 (en) 2003-12-29 2011-01-11 Xilinx Inc. Digital signal processing circuit having an adder circuit with carry-outs
US7840630B2 (en) * 2003-12-29 2010-11-23 Xilinx, Inc. Arithmetic logic unit circuit
US7840627B2 (en) 2003-12-29 2010-11-23 Xilinx, Inc. Digital signal processing circuit having input register blocks
US8495122B2 (en) 2003-12-29 2013-07-23 Xilinx, Inc. Programmable device with dynamic DSP architecture
US7467175B2 (en) * 2003-12-29 2008-12-16 Xilinx, Inc. Programmable logic device with pipelined DSP slices
US7853636B2 (en) 2003-12-29 2010-12-14 Xilinx, Inc. Digital signal processing circuit having a pattern detector circuit for convergent rounding
US7849119B2 (en) 2003-12-29 2010-12-07 Xilinx, Inc. Digital signal processing circuit having a pattern detector circuit
US7480690B2 (en) 2003-12-29 2009-01-20 Xilinx, Inc. Arithmetic circuit with multiplexed addend inputs
DE602004002554T2 (de) * 2004-02-20 2007-10-25 Altera Corp., San Jose Block Modus Aufteilung eines Multiplizier-Akkumulators
US7437401B2 (en) * 2004-02-20 2008-10-14 Altera Corporation Multiplier-accumulator block mode splitting
US7873815B2 (en) * 2004-03-04 2011-01-18 Qualcomm Incorporated Digital signal processors with configurable dual-MAC and dual-ALU
US7167971B2 (en) * 2004-06-30 2007-01-23 International Business Machines Corporation System and method for adaptive run-time reconfiguration for a reconfigurable instruction set co-processor architecture
US20070074000A1 (en) * 2005-09-28 2007-03-29 Liga Systems, Inc. VLIW Acceleration System Using Multi-state Logic
US7444276B2 (en) * 2005-09-28 2008-10-28 Liga Systems, Inc. Hardware acceleration system for logic simulation using shift register as local cache
US20070073999A1 (en) * 2005-09-28 2007-03-29 Verheyen Henry T Hardware acceleration system for logic simulation using shift register as local cache with path for bypassing shift register
US20070074008A1 (en) * 2005-09-28 2007-03-29 Donofrio David D Mixed mode floating-point pipeline with extended functions
US20070106720A1 (en) * 2005-11-10 2007-05-10 Samsung Electronics Co., Ltd. Reconfigurable signal processor architecture using multiple complex multiply-accumulate units
US20070129924A1 (en) * 2005-12-06 2007-06-07 Verheyen Henry T Partitioning of tasks for execution by a VLIW hardware acceleration system
US20070129926A1 (en) * 2005-12-01 2007-06-07 Verheyen Henry T Hardware acceleration system for simulation of logic and memory
US7886969B2 (en) * 2005-12-06 2011-02-15 Visa U.S.A. Inc. Method and system for loading and reloading portable consumer devices
US20070150702A1 (en) * 2005-12-23 2007-06-28 Verheyen Henry T Processor
US20090063355A1 (en) * 2007-08-31 2009-03-05 Nizam Antoo Method and system using reloadable portable consumer devices
US8479133B2 (en) 2009-01-27 2013-07-02 Xilinx, Inc. Method of and circuit for implementing a filter in an integrated circuit
US8543635B2 (en) 2009-01-27 2013-09-24 Xilinx, Inc. Digital signal processing block with preadder stage
US8805916B2 (en) * 2009-03-03 2014-08-12 Altera Corporation Digital signal processing circuitry with redundancy and bidirectional data paths
US8886696B1 (en) * 2009-03-03 2014-11-11 Altera Corporation Digital signal processing circuitry with redundancy and ability to support larger multipliers
US8549055B2 (en) 2009-03-03 2013-10-01 Altera Corporation Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry
US10693469B2 (en) 2018-08-31 2020-06-23 Flex Logic Technologies, Inc. Multiplier-accumulator circuit, logic tile architecture for multiply-accumulate, and IC including logic tile array
US20220114431A1 (en) * 2019-01-28 2022-04-14 Rambus Inc. Memory-integrated neural network
US11194585B2 (en) 2019-03-25 2021-12-07 Flex Logix Technologies, Inc. Multiplier-accumulator circuitry having processing pipelines and methods of operating same
US11314504B2 (en) 2019-04-09 2022-04-26 Flex Logix Technologies, Inc. Multiplier-accumulator processing pipelines and processing component, and methods of operating same
US11416261B2 (en) 2019-08-08 2022-08-16 Blaize, Inc. Group load register of a graph streaming processor
US11288076B2 (en) 2019-09-13 2022-03-29 Flex Logix Technologies, Inc. IC including logic tile, having reconfigurable MAC pipeline, and reconfigurable memory
US11455368B2 (en) 2019-10-02 2022-09-27 Flex Logix Technologies, Inc. MAC processing pipeline having conversion circuitry, and methods of operating same
US11307860B1 (en) 2019-11-22 2022-04-19 Blaize, Inc. Iterating group sum of multiple accumulate operations
US11693625B2 (en) 2019-12-04 2023-07-04 Flex Logix Technologies, Inc. Logarithmic addition-accumulator circuitry, processing pipeline including same, and methods of operation
US11960856B1 (en) 2020-01-15 2024-04-16 Flex Logix Technologies, Inc. Multiplier-accumulator processing pipeline using filter weights having gaussian floating point data format
US11442881B2 (en) 2020-04-18 2022-09-13 Flex Logix Technologies, Inc. MAC processing pipelines, circuitry to control and configure same, and methods of operating same
US11604645B2 (en) 2020-07-22 2023-03-14 Flex Logix Technologies, Inc. MAC processing pipelines having programmable granularity, and methods of operating same
US11593001B1 (en) 2021-08-02 2023-02-28 Nvidia Corporation Using per memory bank load caches for reducing power use in a system on a chip
US11573921B1 (en) 2021-08-02 2023-02-07 Nvidia Corporation Built-in self-test for a programmable vision accelerator of a system on a chip
US11593290B1 (en) 2021-08-02 2023-02-28 Nvidia Corporation Using a hardware sequencer in a direct memory access system of a system on a chip
US11636063B2 (en) 2021-08-02 2023-04-25 Nvidia Corporation Hardware accelerated anomaly detection using a min/max collector in a system on a chip
US11954496B2 (en) 2021-08-02 2024-04-09 Nvidia Corporation Reduced memory write requirements in a system on a chip using automatic store predication
US11704067B2 (en) 2021-08-02 2023-07-18 Nvidia Corporation Performing multiple point table lookups in a single cycle in a system on chip
US11836527B2 (en) 2021-08-02 2023-12-05 Nvidia Corporation Accelerating table lookups using a decoupled lookup table accelerator in a system on a chip
US11573795B1 (en) 2021-08-02 2023-02-07 Nvidia Corporation Using a vector processor to configure a direct memory access system for feature tracking operations in a system on a chip
WO2024025618A1 (en) * 2022-07-28 2024-02-01 Microchip Technology Incorporated System and methods for matrix multiplication

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4524423A (en) * 1981-11-06 1985-06-18 Rca Corporation Digital signal separation filters
SG52303A1 (en) * 1993-12-20 1998-09-28 Motorola Inc Arithmetic engine
US6078939A (en) * 1997-09-30 2000-06-20 Intel Corporation Apparatus useful in floating point arithmetic

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Publication number Publication date
JPH11296493A (ja) 1999-10-29
US6298366B1 (en) 2001-10-02
DE69927075D1 (de) 2005-10-13

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